5.1 - Microcontroller and Microprocessor Architecture
5.1 - Microcontroller and Microprocessor Architecture
INTRODUCTION TO MICROCONTROLLER
At the end of this chapter, the
students should be able to.…
Controller Microcontroller
CPU
THE BUSES:
ADDRESS, DATA,
AND CONTROL
Terminology used for microcontrollers
Machine Cycle
To execute an instruction–the processor
must:
1. Fetch the instruction from memory
2. Decode the instruction
3. Execute the instruction
4. Store the result back in the memory.
Clock cycle
↓
Terminology used for microcontrollers
• For each read or write operation, the CPU specifies the location of the data
or instruction by placing an address on the address bus, then activates a signal
on the control bus indicating whether the operation is read or write.
• WRITE OPERATIONS put data from CPU on the data bus and store it in the
location specified.
Terminology used for microcontrollers
CONTROL/MONITOR
(INPUT/OUTPUT) DEVICES
• MONITORING DEVICES
are inputs, or sensors, that are
Example of control devices
stimulated by temperature,
pressure, light, motion, etc. and
convert this to voltage or
current signals to be read by the
computer.
Types of Microcontrollers
INTERNAL
BUS MEMORY INSTRUCTION
Microcontrollers ARCHITECTURE
WIDTH SET
can be classified
on the basis of
internal bus
width,
architecture,
memory and
instruction set.
FAMILY
Types of Microcontrollers
EMBEDDED MICROCONTROLLERS
When an embedded system has an microcontroller unit that has all the
functional blocks (including program as well as data memory) available
on a chip is called an embedded microcontroller. For example, 8051
having Program & Data Memory, I/O Ports, Serial Communication,
Counters and Timers and Interrupt Control logic on the chip is an
embedded microcontroller.
Harvard
and
von-Neumann Architecture
Design Operation of Memory
The Design and Operation of Memory
Memory in a microprocessor system is where
information (data and instructions) is kept. It can be
classified into two main types:
Main memory (RAM and ROM)
Storage memory (Disks , CD ROMs, etc.)
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Accessing Information in Memory
For the microprocessor to access (Read or Write)
information in memory (RAM or ROM), it needs to do
the following:
Select the right memory chip (using part of the address bus).
Identify the memory location (using the rest of the address
bus).
Access the data (using the data bus).
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The Basic Memory Element
The basic memory element is similar to a D latch.
This latch has an input where the data comes in. It has an
enable input and an output on which data comes out.
Enable
EN
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The Basic Memory Element
However, this is not safe.
Data is always present on the input and the output is always
set to the contents of the latch.
To avoid this, tri-state buffers are added at the input and
output of the latch.
WR RD
Enable
EN
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The Basic Memory Element
The WR signal controls the input buffer.
The bar over WR means that this is an active low signal.
So, if WR is 0 the input data reaches the latch input.
If WR is 1 the input of the latch looks like a wire connected to
nothing.
The RD signal controls the output in a similar manner.
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A Memory “Register”
If we take four of these latches and connect them
together, we would have a 4-bit memory register
I0 I1 I2 I3
WR
D D D D
Q Q Q Q
EN EN EN EN
EN
RD O0 O1 O2 O3
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A group of memory registers
D0 D1 D2 D3
o o o o
WR
D Q D Q D Q D Q
EN EN EN EN
D Q D Q D Q D Q
Expanding on this EN EN EN EN
D Q D Q D Q D Q
EN EN EN EN
o o o o
RD
D0 D1 D2 D3
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A group of Memory Registers
If we represent each memory location (Register) as a block we
get the following
I I I I
0 1 2 3
W Input Buffers
R
EN Memory Reg. 0
EN
0 Memory Reg. 1
EN
1 Memory Reg. 2
EN
2 Memory Reg. 3
3
Output Buffers
RD
O O O O
0 1 2 3
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The Design of a Memory Chip
Using the RD and WR controls we can determine the
direction of flow either into or out of memory. Then
using the appropriate Enable input we enable an individual
memory register.
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The Enable Inputs
How do we produce these enable line?
Since we can never have more than one of these enables active
at the same time, we can have them encoded to reduce the
number of lines coming into the chip.
These encoded lines are the address lines for memory.
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The Design of a Memory Chip
So, the previous diagram would now look like the following:
I I I I
0 1 2 3
W Input Buffers
R
A D Memory Reg. 0
A1 d e Memory Reg. 1
d c
Memory Reg. 2
A0 r o
e d Memory Reg. 3
s e
RD s r Output Buffers
O O O O
0 1 2 3
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The Design of a Memory Chip
Since we have tri-state buffers on both the inputs and
outputs of the flip flops, we can actually use one set of
pins only.
The chip would now look like this:
W Input Buffers
R
A D Memory Reg. 0 D0 D0
A1 d e Memory Reg. 1 A1
D1 D1
d c
Memory Reg. 2
A0 r o D2 A0 D2
e d Memory Reg. 3
D3 D3
s e
RD s r Output Buffers
RD W
R
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