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Assignment 4

This document contains 17 questions related to computer architecture and organization concepts like instruction timing diagrams, microprocessor clock frequency calculations, program execution timing, register and memory contents after program execution, flag register contents, 8086 architecture, registers, memory segmentation, and minimum and maximum mode system operations. The questions cover topics like instruction decoding, program flow, register usage, flag manipulation, I/O operations, and 8086 system design.

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40 views5 pages

Assignment 4

This document contains 17 questions related to computer architecture and organization concepts like instruction timing diagrams, microprocessor clock frequency calculations, program execution timing, register and memory contents after program execution, flag register contents, 8086 architecture, registers, memory segmentation, and minimum and maximum mode system operations. The questions cover topics like instruction decoding, program flow, register usage, flag manipulation, I/O operations, and 8086 system design.

Uploaded by

study with Harsh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Deadline on Moodle: 10/04/23

Assignment 4
Computer Architecture and Organization (230401)
Department of Information Technology (IT-IOT)

Q. 1. Draw timing diagram for instruction: STA 526AH


Q. 2. Clock frequency of the microprocessor is 2 MHz. What will be the value of “Data”
given in program to give delay of 40μsec.
XRA A
MVI B, 87 H
MVI C, Data
LOOP: ADD B
DCR C
JNZ LOOP
HLT
Q. 3. If the clock frequency is 5 MHz
a) What is the number of bytes required for the program,
b) How many times loop will be executed?
c) What is the total time taken by a program for complete execution?
Given Program:
XRA A
MVI B, 87 H
MVI C, 05 H
LOOP: ADD B
DCR C
JNZ LOOP
HLT
Q. 4. Find the content of PC, SP, B, C, H, L after HLT execution
Start 2000: LXI SP, 1000 H
LXI H, 2F37 H
XRA A
MOV A, H
INX H
PUSH H
CZ 20FF H
JMP 3000 H
HLT
20FF: ADD H
RZ
POP B
PUSH B
RNZ
HLT
3000: HLT

Q. 5. Find the value of SP (stack pointer) after RET (Return).


LXI SP, EFFF H
CALL 3000 H
.
.
.
3000 H: LXI H, 3CF4 H
PUSH PSW
SPHL
POP PSW
RET

Q. 6. Find the content of HL pair after execution of program.


Given data:
3000 H: 02 H
3001 H: 30 H
3002 H: 00 H
3003 H: 30 H
Program:
LHLD 3000 H
MOV E, M
INX H
MOV D, M
LDAX D
MOV L, A
INX D
LDAX D
MOV H, A
Q. 7. If the following sequence of a bytes is loaded in the accumulator then a sequence of
output will be?
Data (H)
58
64
73
B4
C8
FA

Program:
MVI A, Data
MVI B, 64 H
MVI C, C8 H
CMP B
JC RJCT
CMP C
JNC RJCT
OUT PORT 1
HLT

RJCT: SUB A
OUT PORT 1
HLT

Q. 8. Find value of accumulator after XRA B


MVI A, 45 H
MOV B, A
STC
CMC
RAR
XRA B

Q. 9. Find content of Accumulator after line 4. Also, find PSW after line 8
MVI A, B5 H
MVI B, 0E H
XRI 69 H
ADD B
ANI 9B H
CPI 9F H
STA 3010 H
HLT

Q. 10. What should be the content of accumulator to execute following operation?


a) to send logic 1 at SOD
b) to mask RST 5.5 and RST 6.5
Q. 11. Find flag register after execution of the given program.
MVI A, C5 H
ORA A
RAL
RRC
HLT

Q. 12. Explain 8086 Architecture


Q. 13. Explain 8086 Register organization
Q. 14. Explain 8086 Flag registers and its function
Q. 15. Explain memory segmentation in 8086. What is the advantage of memory
segmentation scheme?
Q. 16. Explain 8086 Minimum mode system operation with timing diagrams.
Q. 17. Explain 8086 Maximum mode system operation with timing diagrams.

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