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EE809: Analog Integrated Circuit Design: Week-4 4 - 8 Oct 2021

This document outlines topics to be covered in an integrated circuit design course between October 4-8, 2021. Last week's topics included problems on chapter 2 and single-stage amplifiers. This week will cover common source amplifiers with source degeneration, output resistance, source followers, common gate amplifiers, and cascode amplifiers. Source degeneration reduces gain but improves linearity and output resistance. Cascode amplifiers increase gain by stacking common gate and common source stages. Folded cascode topologies address voltage headroom issues through the use of a PMOS cascode transistor.

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Muhammad Faizan
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56 views24 pages

EE809: Analog Integrated Circuit Design: Week-4 4 - 8 Oct 2021

This document outlines topics to be covered in an integrated circuit design course between October 4-8, 2021. Last week's topics included problems on chapter 2 and single-stage amplifiers. This week will cover common source amplifiers with source degeneration, output resistance, source followers, common gate amplifiers, and cascode amplifiers. Source degeneration reduces gain but improves linearity and output resistance. Cascode amplifiers increase gain by stacking common gate and common source stages. Folded cascode topologies address voltage headroom issues through the use of a PMOS cascode transistor.

Uploaded by

Muhammad Faizan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EE809: Analog Integrated Circuit Design

Week-4
th th
4 – 8 Oct 2021

EE809 Fall 2021 Hammad M. Cheema Slide 1


RIMMS, NUST
Last week’s topics
• End problems - Chp2
• Chp-3: Single Stage Amplifiers
– Analog design octagon
– Common Source amplifier with
• Resistive Load
• Diode connected load
• Current source load
• Triode load

EE809 Fall 2021 Hammad M. Cheema Slide 2


RIMMS, NUST
This week’s topics
• CS stage with source degeneration
• Output resistance of degenerated CS stage
• Source follower (Common Drain stage)
• Common Gate amplifier
• Cascode amplifier

EE809 Fall 2021 Hammad M. Cheema Slide 3


RIMMS, NUST
CS stage with source degeneration
• A resistance in the source terminal
– Reduces gain of the amplifier (gain is weaker function of gm)
– Improves linearity
– Increases output resistance

EE809 Fall 2021 Hammad M. Cheema Slide 4


RIMMS, NUST
Voltage gain expressions by inspection
•Small-signal derived previously can be written
as

•Denominator = Series combination of inverse


transconductance + explicit resistance seen
from source to ground
•Called “resistance seen in the source path”
•Magnitude of gain = Resistance seen at the
drain/ Total resistance seen in the source path
•Above is applicable with CLM ignored

EE809 Fall 2021 Hammad M. Cheema Slide 5


RIMMS, NUST
Example 3.5
For λ=γ=0,
determine the
voltage gain

𝑅𝐷
𝐴𝑣 = −
1 1
+
𝑔𝑚1 𝑔𝑚2
EE809 Fall 2021 Hammad M. Cheema Slide 6
RIMMS, NUST
Output resistance of degenerated CS stage

𝑅𝑜𝑢𝑡 ≅ 1 + 𝑔𝑚 + 𝑔𝑚𝑏 𝑅𝑆 𝑟0

EE809 Fall 2021 Hammad M. Cheema Slide 7


RIMMS, NUST
Source follower (Common Drain stage)
• Input → Gate, Output →Source, Drain→ AC Ground
• Voltage gain less than unity
• Use as voltage buffer
• Low output resistance

EE809 Fall 2021 Hammad M. Cheema Slide 8


RIMMS, NUST
Voltage gain of source follower
Including body effect
𝑔𝑚 𝑅𝑆
𝐴𝑣 =
1 + (𝑔𝑚 +𝑔𝑚𝑏 )𝑅𝑆

Ignoring body effect


𝑔𝑚 𝑅𝑆 𝑅𝑆
𝐴𝑣 = = <1
1 + 𝑔𝑚 𝑅𝑆 1
+ 𝑅𝑆
𝑔𝑚

EE809 Fall 2021 Hammad M. Cheema Slide 9


RIMMS, NUST
Using current source with source follower
• Drain current heavily depends on input DC voltage
level → might result in non-linearity
• To circumvent this issue, a current source
implemented through a transistor is used

EE809 Fall 2021 Hammad M. Cheema Slide 10


RIMMS, NUST
Complete Source follower driving load resistance

Body effect ignored


𝑅𝐿 ||𝑟01 ||𝑟02
𝐴𝑣 =
1
+ 𝑅𝐿 ||𝑟01 ||𝑟02
𝑔𝑚

EE809 Fall 2021 Hammad M. Cheema Slide 11


RIMMS, NUST
Source follower output resistance
• Low output resistance due to connection at
source terminal

1 1 1
𝑅𝑜𝑢𝑡 = = || λ=0
𝑔𝑚 + 𝑔𝑚𝑏 𝑔𝑚 𝑔𝑚𝑏
1 1
𝑅𝑜𝑢𝑡 = || ||𝑟01 λ≠0
𝑔𝑚 𝑔𝑚𝑏
EE809 Fall 2021 Hammad M. Cheema Slide 12
RIMMS, NUST
Common Gate amplifier
• Input → Source, Output →Drain, Gate → AC Ground
• Low input resistance
• Gain similar to CS amplifier
• Bias current of M1 flows through the input signal source
• Alternatively, M1 can be biased by a constant current source, with
the signal capacitively coupled to the circuit

EE809 Fall 2021 Hammad M. Cheema Slide 13


RIMMS, NUST
Gain and input resistance of CG stage
Including body effect
𝐴𝑣 = 𝑔𝑚 1 + η 𝑅𝐷

Ignoring body effect


𝐴𝑣 = 𝑔𝑚 𝑅𝐷
• Output signal phase is same as input
• Depends on gm (and related parameters) and RD

EE809 Fall 2021 Hammad M. Cheema Slide 14


RIMMS, NUST
Gain of CG stage including channel length modulation and signal
source resistance

𝑔𝑚 +𝑔𝑚𝑏 𝑟0 +1
𝐴𝑣 = 𝑅𝐷
𝑟0 +(𝑔𝑚 +𝑔𝑚𝑏 )𝑟0 𝑅𝑆 +𝑅𝑆 +𝑅𝐷

EE809 Fall 2021 Hammad M. Cheema Slide 15


RIMMS, NUST
Input impedance of CG stage
• Resistance seen from the source with Gate AC
grounded is (ignoring channel length modulation)
1 1
𝐴𝑣 = =
(𝑔𝑚 +𝑔𝑚𝑏 ) 𝑔𝑚 1 + η
• Body effect decreases the input impedance of
the CG stage

EE809 Fall 2021 Hammad M. Cheema Slide 16


RIMMS, NUST
Output impedance of CG stage
𝑅𝑜𝑢𝑡 = 1 + 𝑔𝑚 + 𝑔𝑚𝑏 𝑟0 𝑅𝑆 + 𝑟0 || 𝑅𝐷

𝑅𝑜𝑢𝑡 ≅ 1 + 𝑔𝑚 + 𝑔𝑚𝑏 𝑅𝑆 𝑟0 || 𝑅𝐷

EE809 Fall 2021 Hammad M. Cheema Slide 17


RIMMS, NUST
Cascode stage
• Cascoding is used to increase the intrinsic gain of the
amplifier
• A common-gate stage stacked on top of a CS stage

EE809 Fall 2021 Hammad M. Cheema Slide 18


RIMMS, NUST
Output resistance boosting by Cascoding
• Output resistance is boosted by the intrinsic gain (gm
r0) of the Cascode transistor

𝑅𝑜𝑢𝑡 = 1 + 𝑔𝑚2 + 𝑔𝑚𝑏2 𝑟02 𝑟01 + 𝑟02


𝑅𝑜𝑢𝑡 ≅ 𝑔𝑚2 + 𝑔𝑚𝑏2 𝑟02 𝑟01 + 𝑟02

𝑅𝑜𝑢𝑡 ≅ 𝑔𝑚2 𝑟02 𝑟01 + 𝑟02


𝑅𝑜𝑢𝑡 ≅ 𝑔𝑚2 𝑟02 𝑟01

EE809 Fall 2021 Hammad M. Cheema Slide 19


RIMMS, NUST
Gain of Cascode amplifier
• Small signal model can be used for determining the gain
• Intuitively, it can be found by multiplying the output
resistance by transconductance (gm) of the amplifying
transistor

𝐴𝑣 = 𝑔𝑚1 𝑔𝑚2 𝑟02 𝑟01

• If all gms and r0s are matched, then


2
𝐴𝑣 = 𝑔𝑚 𝑟0

EE809 Fall 2021 Hammad M. Cheema Slide 20


RIMMS, NUST
Cascoding in current sources
• Resistance of current sources can also be
boosted by Cascoding

EE809 Fall 2021 Hammad M. Cheema Slide 21


RIMMS, NUST
Combining Cascode amplifier with Cascode current source

• Cascode amplifier and Cascode current source


can be combined for

2
𝑔𝑚 𝑟0
𝐴𝑣 =
2

EE809 Fall 2021 Hammad M. Cheema Slide 22


RIMMS, NUST
Folded Cascode
• Voltage headroom is major issue in Cascode amplifiers
• Solution: Use a PMOS Cascode transistor instead of a
NMOS transistor → Folded Cascode
• Downside: Requirement of two current sources

EE809 Fall 2021 Hammad M. Cheema Slide 23


RIMMS, NUST
The End

EE809 Fall 2021 Hammad M. Cheema Slide 24


RIMMS, NUST

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