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Module 3

This document discusses Kirchhoff's laws, which are key to analyzing electric circuits. Kirchhoff's current law (KCL) states that the algebraic sum of currents entering a node is zero. Kirchhoff's voltage law (KVL) states that the algebraic sum of voltages around any closed loop is zero. The document provides examples of applying KCL to combine current sources in parallel and KVL to combine voltage sources in series. Sample problems demonstrate using the laws to solve for unknown voltages and currents.
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0% found this document useful (0 votes)
72 views5 pages

Module 3

This document discusses Kirchhoff's laws, which are key to analyzing electric circuits. Kirchhoff's current law (KCL) states that the algebraic sum of currents entering a node is zero. Kirchhoff's voltage law (KVL) states that the algebraic sum of voltages around any closed loop is zero. The document provides examples of applying KCL to combine current sources in parallel and KVL to combine voltage sources in series. Sample problems demonstrate using the laws to solve for unknown voltages and currents.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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BATANGAS STATE UNIVERSITY

THE NATIONAL ENGINEERING UNIVERSITY

Leading Innovations, Transforming Lives


MODULE 3 - Laws, Theorems and Methods used
in Network Analysis
KIRCHOFF’S LAW
Ohm’s law by itself is not sufficient to analyze circuits. However, when it is coupled with
Kirchhoff’s two laws, we have a sufficient, powerful set of tools for analyzing a large variety of
electric circuits. Kirchhoff’s laws were first introduced in 1847 by the German physicist Gustav
Robert Kirchhoff (1824–1887). These laws are formally known as Kirchhoff’s current law (KCL)
and Kirchhoff’s voltage law (KVL). Kirchhoff’s first law is based on the law of conservation of
charge, which requires that the algebraic sum of charges within a system cannot change.

Kirchhoff’s current law (KCL) states that the algebraic sum of currents entering a node (or a
closed boundary) is zero.

Mathematically, KCL implies that ∑𝑁 𝑛=1 𝑖𝑛 = 0 where N is the number of branches connected to
the node and in is the nth current entering (or leaving) the node. By this law, currents entering a
node may be regarded as positive, while currents leaving the node may be taken as negative or
vice versa.

Consider the node in Figure below, Applying KCL gives

Figure 3.1 Currents at a node illustrating KCl

𝑖 1 + (-𝑖 2) + 𝑖 3 + 𝑖 4 + (-𝑖 5) = 0 eqn.1

Since currents 𝑖 1, 𝑖 3, and 𝑖 4 are entering the node, while the currents 𝑖 2 and 𝑖 5 are leaving it. By
rearranging the terms, we get
𝑖1 + 𝑖 3 + 𝑖 4 = 𝑖 2 + 𝑖 5

The sum of the currents entering a node is equal to the sum of the currents leaving the node.

Note that KCL also applies to a closed boundary. This may be regarded as a generalized case,
because a node may be regarded as a closed surface shrunk to a point. In two dimensions, a closed
boundary is the same as a closed path. As typically illustrated in the circuit of Figure 3.2, the total
current entering the closed surface is equal to the total current leaving the surface.

Figure 3.2 Applying KCL to a closed boundary

COLLEGE OF ENGINEERING
EE 419- BASIC ELECTRICAL ENGINEERING
ENGR. ERICKA RULLODA – GUEST LECTURER
BATANGAS STATE UNIVERSITY

THE NATIONAL ENGINEERING UNIVERSITY

Leading Innovations, Transforming Lives


A simple application of KCL is combining current sources in
parallel. The combined current is the algebraic sum of the current supplied by the individual
sources. For example, the current sources shown in Figure 3.3 (a) can be combined as in Figure
3.3(b). The combined or equivalent current source can be found by applying KCL to node a.

Figure 3.3 Current sources in parallel: (a) original circuit, (b) equivalent circuit.

IT + I2 = I1 +I3 or IT = I1 + I2 +I3 eqn.2

A circuit cannot contain two different currents, I1 and I2, in series, unless I1= I2; otherwise KCL
will be violated.

Kirchoff’s second law is based on the principle of conservation of energy:

Kirchoff’s voltage law (KVL) states that the algebraic sum of all voltages around a closed path
(or loop) is zero.

Expressed mathematically, KVL states that ∑𝑀 𝑚=1 𝑣𝑚 = 0 where M is the number of voltages in
the loop (or the number of branches in the loop) and vm is the mth voltage.

To illustrate KVL, consider the circuit in Figure 3.4. The sign on each voltage is the polarity of
the terminal encountered first as we travel around the loop. We can start with any branch and go
around the loop. We can start with any branch and go around the loop either clockwise or
counterclockwise. Suppose we start with the voltage source and go clockwise.

Figure 3.4 A single loop circuit illustrating KVL

Suppose we start with the voltage source and go clockwise around the loop as shown; then voltages
would be –v1 , + v2 + v3 , -v4 and v5, in that order. For example, as we teach branch 3, the positive
terminal is met first; hence, we have +v3. For branch 4, we reach the negative terminal first; hence,
-v4. Thus KVL yields
–v1 + v2 + v3 -v4 + v5 = 0 eqn.3

Rearranging terms gives


v2 + v3 + v5 = v1 + v4 eqn.4

COLLEGE OF ENGINEERING
EE 419- BASIC ELECTRICAL ENGINEERING
ENGR. ERICKA RULLODA – GUEST LECTURER
BATANGAS STATE UNIVERSITY

THE NATIONAL ENGINEERING UNIVERSITY

Leading Innovations, Transforming Lives


which can be interpreted as sum of voltage drops = sum of
voltage rises. This is an alternative form of KVL. Notice that if we had traveled counterclockwise,
the result would have been + v1, - v5, +v4, - v3, and – v2, which is the same as before except that
the signs are reversed. Hence, eqn 3 and 4 remain the same.

When the voltage sources are connected in series, KVL can be applied to obtain the total voltage.
The combined voltage is the algebraic sum of the voltage. The combined voltage is the algebraic
sum of the voltages of the individual sources. For example, for the voltage sources shown in Fig
3.5(a), the combined or equivalent voltage source in figure 3.5(b) is obtained by applying KVL.

-Vab + V1 +V2 - V3 = 0 or Vab = V1 +V2 - V3

To avoid violating KVL, a circuit cannot contain two different voltages V1 and V2 in parallel unless
V1 = V2.

Figure 3.5 Voltage sources in series: (a) original circuit, (b) equivalent circuit

COLLEGE OF ENGINEERING
EE 419- BASIC ELECTRICAL ENGINEERING
ENGR. ERICKA RULLODA – GUEST LECTURER
BATANGAS STATE UNIVERSITY

THE NATIONAL ENGINEERING UNIVERSITY

Leading Innovations, Transforming Lives


SAMPLE PROBLEM

1. For the circuit in figure below (a), find voltages v1 and v2.

COLLEGE OF ENGINEERING
EE 419- BASIC ELECTRICAL ENGINEERING
ENGR. ERICKA RULLODA – GUEST LECTURER
BATANGAS STATE UNIVERSITY

THE NATIONAL ENGINEERING UNIVERSITY

Leading Innovations, Transforming Lives

2. Determine vo and i in the circuit shown in the figure.

COLLEGE OF ENGINEERING
EE 419- BASIC ELECTRICAL ENGINEERING
ENGR. ERICKA RULLODA – GUEST LECTURER

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