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Logic Circuits 2012 Fall

This document is the exam paper for a Logic Circuits course taken at Pokhara University. It contains 7 questions testing various concepts in digital logic design. The exam is worth a total of 100 marks and candidates must answer all questions in their own words within 3 hours. The questions cover topics such as binary subtraction, digital vs analog systems, error detection, logic gate implementation, Boolean algebra, multiplexers, flip-flops, counters, and shift registers.

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Simant Chaudhary
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0% found this document useful (0 votes)
54 views2 pages

Logic Circuits 2012 Fall

This document is the exam paper for a Logic Circuits course taken at Pokhara University. It contains 7 questions testing various concepts in digital logic design. The exam is worth a total of 100 marks and candidates must answer all questions in their own words within 3 hours. The questions cover topics such as binary subtraction, digital vs analog systems, error detection, logic gate implementation, Boolean algebra, multiplexers, flip-flops, counters, and shift registers.

Uploaded by

Simant Chaudhary
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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POKHARA UNIVERSITY

Level: Bachelor Semester – Fall Year : 2012


Programme: BE Full Marks: 100
Course: Logic Circuits Pass Marks: 45
Time : 3hrs.
Candidates are required to give their answers in their own words as far
as practicable.
The figures in the margin indicate full marks.
Attempt all the questions.
1. a) User’s complement to subtract the following 5
i. (00101101)2 – (10110101)2
ii. (835701)10 - (569812)10
b) Compare and contrast digital system with analog system. 5
c) Explain the parity method of error detection with a suitable 5
example.
2. a) Realize all the basic gates using NOR gate only 5
b) Distinguish between minterms and maxterms. 5
c) What is processor unit? Draw it’s block diagram. 5
3. a) Simplify the following Boolean function: 7
F(W,X,Y,Z) = ∑(1,6,7,8,11,13) with don’t care condition
d(W,X,Y,Z) = ∑(0,2,3,4,10,12) and then implement the function
using NOR gates only
b) Design a code conversion circuit which converts BCD to excess-3 8
code.
OR
Design a code converter circuit to convert 8, 4,-1,-2 code to gray 8
codes.
4. a) Design a full Subtractor using two 4 ×1 MUX. 7
OR
Implement the following function using 8×1 multiplexer. 7
Y(A,B,C,D)= Σ (0,1,2,5,9,11,13,15)
b) Explain the following: 8
i. Synchronous and asynchronous logic

1
ii. Combinational and sequential logic
5. a) Explain the operation of a J-K flip flop along with it’s characteristic 7
table. Write down it’s characteristic equation and graphic symbol.
What are the drawback of R-S flip flop?
b) Design 4 bit updown counter using T flip flop. 8
6. a) Describe the operation of a four bit shifter with a neat diagram. 7
b) Discuss the purpose of shift register. Explain serial in parallel out 2+3+3
and parallel in parallel out shift register.
7. Write short notes on any two: 2×5
a) State table and State diagram
b) PLA
c) State diagram and state table

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