3

Pulse Width Modulation of Power

Electronic DC-AC Converter

Pulse Width Modulation (PWM)

. The Pulse Width Modulation (PWM) technique is applied in the inverter (DC/AC converter)
to output an AC waveform with variable voltage and variable frequency for use in mostly
variable speed motor drives.
. The implementation of the complex PWM algorithms have been made much easier due to the
advent of fast digital signal processors, microcontrollers, and Field Programmable Gate
Arrays (FPGA).

Pulse Width Modulated Inverters

Two Level Inverters

1. Single Phase Half Bridge Inverters

2. Single Phase Full Bridge Inverters
3. Three-phase PWM voltage source inverter

Multi Level Inverters

1. Diode Clamped or Neutral point clamped multi-level inverters

2. Capacitor clamped or flying capacitor multi-level inverters
3. Cascaded H-bridge multi-level inverters

Special Type Inverters

1. Impedance Source or Z-Source Inverter

2. Quasi Impedance Source or qZSI Inverter

High Performance Control of AC Drives with MATLAB/Simulink Models, First Edition.

Haitham Abu-Rub, Atif Iqbal, and Jaroslaw Guzinski.
Ó 2012 John Wiley & Sons, Ltd. Published 2012 by John Wiley & Sons, Ltd.
2 High Performance Control of AC Drives

1. Single Phase Half Bridge Inverters

S1
Vdc Da1
2 vao
Load VA

Vdc S’1 Da2

2

Figure 3.1 Power Circuit of a half wave bridge inverter.

The operation of the inverter can be well understood from Figure 3.2

(a) (b)

(c) (d)

Figure 3.2 Switching States in half-bridge inverter; a and c iao > 0 b and d. iao < 0.
Pulse Width Modulation 3

The output voltage is a square wave as shown in Figure 3.3

Figure 3.3 Switching signal and the output voltage and current in a half-bridge inverter.

A graphical view shows that the output contains a considerable amount of low-order
harmonics such as 3rd, 5th, 7th, etc and the magnitude of the harmonics varies as the inverse of
its order.

Figure 3.4 A typical harmonic spectrum of output voltage in a half-bridge inverter.

If the modulating or control signal amplitude (Vm) > carrier signal (Vc)
The upper switch S1 is on vao ¼ V2dc
If the modulating or control signal amplitude (Vm) < carrier signal (Vc)
The upper switch S1’ is on vao ¼  V2dc
4 High Performance Control of AC Drives

Figure 3.5 Bipolar PWM of single inverter leg.

The value of the average leg voltage VAO during a switching period TC can be determined
from Figure 3.6 (this shows one period of the triangular waveform).

Figure 3.6 One switching cycle in carrier-based sinusoidal PWM.

. Matlab/Simulink Model of Half Bridge Inverter

Half-Bridge Inverter

Discrete,
Ts = Ts s.
C
g

i
Vdc/2 = 0.5 p.u. S1 + I load
-
I1 Current
E

Double click here to plot

+
the Valeg FFT v
R-L Load - V inverter
V1
voltage
C
g

Vdc/2 = -0.5 p.u.

S1'
E

S1

S1'
Scope2
Gate-signal Generation

Figure 3.7 Simulink model to implement carrier-based sinusoidal PWM.

Pulse Width Modulation 5

Voltage [p.u.]
0

–1
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
Spectrum [p.u.]

0.8 Fundamental = 0.472721

0.6 fc
0.4 fc-2fm fc+2fm
0.2 fc-4fm fc+4fm

0
0 1000 2000 3000 4000 5000 6000
Frequency [Hz]

Figure 3.8 Output voltage and its spectrum for half bridge inverter.

Figure 3.9a Dead Band between upper and lower gating signals.

Out1
1 double Convert -1

In1
Data Type Conversion2 Data Type Conversion1 Gain1
Discrete

Edge Detector1

Figure 3.9b Dead band circuit.

2. Single Phase Full Bridge Inverters

Figure 3.9 Power circuit topology of a single-phase full-bridge inverter.

6 High Performance Control of AC Drives

(a) (b)

(c) (d)

Figure 3.10 Switching States in full-bridge inverter; a and c iao > 0 b and d. iao < 0.

S2, S1'

S1, S2'

vao 0.5Vdc

−0.5Vdc
vbo 0.5Vdc

−0.5Vdc
vab , i ab
Vdc

T 3T
2 T 2 2T

−Vdc
D a1, S1 ,S2' Da2, S2,S’1 Da1 , S1,S2 ' D a2, S2,S’1
D b2 ON Db1 ON D b2 ON Db1 ON
ON ON ON ON

Figure 3.11 Switching signal and the output voltage and current in a half-bridge inverter.
Pulse Width Modulation 7

Vm Vdc

0.5Vdc
VAO

0
–0.5Vdc
VBO

0.5Vdc

–0.5Vdc
VAB

Vdc

–Vdc

Figure 3.12 Unipolar PWM scheme for single-phase full-bridge inverter.

8 High Performance Control of AC Drives

. Matlab/Simulink Model of Single-phase Full-Bridge Inverter

DC/AC Full-Bridge Inverter

Double click here to plot

the Valeg FFT

C
g
g
S1 S2

E
Vdc = 1 p.u.
+ -i I load
I2
I_Load
+ v

C
C

g
g
R-L Load -
V inverter
S1' S2' V2
E

E
VAB

Discrete,
Ts = 1e-005 s.

S1
S1'
S2
S2'
Gate Signal

Figure 3.13 Simulink model to implement unipolar PWM scheme in a full bridge 1-phase inverter.

2
Voltage VAB [p.u.]

–2
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
0.4
Fundamental = 0.94638
Spectrum [p.u.]

2fc-fm 2f +f
c m
2f -3f 2fc+3fm
0.2 c m

0
0 1,000 2,000 fc 4,000 5,000 2fc 7,000
Frequency [Hz]

Figure 3.14 Voltage (VAB) and its spectrum for unipolar PWM scheme in a single-phase inverter.
Pulse Width Modulation 9

Three-phase PWM voltage source inverter

Figure 3.15 Power circuit topology of a three-phase voltage source inverter.

Figure 3.16 Waveforms for square wave/six-step mode of operation of a three-phase inverter.
10 High Performance Control of AC Drives

Table 3.1 Leg/Pole voltages of a three-phase VSI during six-step mode of operation

Switching Switches ON Leg voltage Leg voltage Leg voltage

Mode VA VB VC
1 S1, S’2, S3 0.5Vdc  0.5Vdc 0.5Vdc
2 S1, S’2, S’3 0.5Vdc  0.5Vdc  0.5Vdc
3 S1, S2, S’3, 0.5Vdc 0.5Vdc  0.5Vdc
4 S’1, S2, S’3  0.5Vdc 0.5Vdc  0.5Vdc
5 S’1, S2, S3  0.5Vdc 0.5Vdc 0.5Vdc
6 S’1, S’2, S3  0.5Vdc  0.5Vdc 0.5Vdc

Table 3.2 Phase-to-neutral voltages for six-step mode of operation

Switching Switches ON Phase voltage Phase voltage Phase voltage
mode van vbn vcn
1 S1, S’2, S3 1/3Vdc  2/3Vdc 1/3Vdc
2 S1, S’2, S’3 2/3Vdc  1/3Vdc  1/3Vdc
3 S1, S2, S’3, 1/3Vdc 1/3Vdc  2/3Vdc
4 S’1, S2, S’3  1/3Vdc 2/3Vdc  1/3Vdc
5 S’1, S2, S3  2/3Vdc 1/3Vdc 1/3Vdc
6 S’1, S’2, S3  1/3Vdc  1/3Vdc 2/3Vdc

Table 3.3 Line voltages for six-step mode of operation

Switching mode Switches ON Line voltage vab Line voltage vbc Line voltage Vca
1 S1, S0 2 , S3 Vdc  Vdc 0
2 S1, S0 2 , S0 3 Vdc 0  Vdc
3 S1, S2, S0 3 , 0 Vdc  Vdc
4 S0 1 , S2, S0 3  Vdc Vdc 0
5 S0 1 , S2, S3  Vdc 0 Vdc
6 S0 1 , S0 2 , S3 0  Vdc Vdc

The maximum output phase-to-neutral voltage in the six-step mode is 0.6367 Vdc or (2/p)
Vdc and that of the line to line voltage is 1.1Vdc.


2 1 1 1 1
van ðtÞ ¼ VDC sin vt þ sin 5vt þ sin 7vt þ sin 11vt þ sin 13vt þ . . . . . .
p 5 7 11 13
pffiffiffi
 
2 3 p 1  p 1  p
vab ðtÞ ¼ VDC sin vt  þ sin 5 vt  þ sin 7 vt  þ ......
p 6 5 6 7 6
Pulse Width Modulation 11

. Matlab/Simulink Model of Three-phase PWM voltage source inverter

Double click here to plot Discrete,

the Valeg FFT Ts = 1e-005 s. DC/AC Three-phase Inverter

C
g
g

g
S1 S2 S3

E
Vdc = 1 p.u.

C
g

g
Vdc = 1 p.u.1 S1' S2' S2'1
E

E
E
+
v
-
V1
VAB

S1
+
v
S1' R-L R-L -
R-L Load1
S2 Load2 Load3 V3
S2' Van
S3
S3'
Gate Signal

+
v
-
V4
VA0

Figure 3.17 Simulink for Six-step operation of inverter.

1
Van [p.u.]

–1
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
1
Fundamental = 0.63642
Spectrum [p.u.]

0.5
5th 7th
11th 13th 17th 19th
0
0 100 200 300 400 500 600 700 800 900 1000
Frequency [Hz]

Figure 3.18 Harmonic spectrum for six-step phase voltage.

12 High Performance Control of AC Drives

Pulse Width Modulation Schemes

. Classification of Pulse Width Modulation Schemes for Three Phase Voltage source inverters
a. Continuous PWM
1. Carrier Based PWM Scheme
2. Third Harmonic Injection Carrier-based PWM
3. Carrier-based PWM with Offset Addition
4. Space Vector PWM
5. Artificial Neural Network Based PWM
b. Discontinuous PWM
1. Carrier based Sinusoidal PWM

VAO
VAm VBm VCm V /2
dc
VAB Vdc/2
Van

2/3Vdc Vdc

1/3Vdc
d

Figure 3.18 Carrier-based sinusoidal PWM of a three-phase inverter.

Pulse Width Modulation 13

>= boolean 1
VA
S1
NOT 2
S1'

>= boolean 3
VB
S2
NOT 4
S2'

>= boolean 5
VC
S3
NOT 6
S3'

Carrier Wave

Figure 3.19 Gate signal generation in Matlab for three-phase inverter.

1
Van [p.u.]

-1
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
0.4
fc-2fm Fundamental = 0.47479
fc+2fm
Spectrum [p.u.]

2fc-fm 2f +f
0.2 c m 3f -2f 3f +2f
c m c m
3fc-2fm 3f +2fc m

0
0 1,000 fc 2,000 2fc 4000 3fc 5000 4fc Frequency [Hz]

Figure 3.20 Phase-to-neutral voltage and spectrum for carrier-based PWM.

14 High Performance Control of AC Drives

Figure 3.21 Varying frequency modulation ratios for different output frequency.

2. Third Harmonic Injection Carrier-based PWM

vAm ¼ Vm1 sinðvtÞ þ Vm3 sinð3vtÞ

 p
vBm ¼ Vm sin vt  2 þ Vm3 sinð3vtÞ
3
 p 
vCm ¼ Vm sin vt þ 2 þ Vm3 sinð3vtÞ
3

Figure 3.22 Block diagram of carrier-based PWM with third-harmonic injection.

Pulse Width Modulation 15

Gain Margin
Vm1+Vm3 Vc

Vm1
Vm3

Figure 3.23 Modulating signals and carrier-wave for third harmonic injection PWM.

>= boolean 1
VA
S1
NOT 2
S1'

>= boolean 3
VB
S2
NOT 4
S2'

>= boolean 5
VC
S3
NOT 6
S3'

3rd harmonic
Carrier Wave

Figure 3.24 Gate signal generation for third harmonic injection PWM.
16 High Performance Control of AC Drives

1
Va [p.u.]

–1
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
Spectrum Va [p.u.]

Fundamental = 0.57965
0.2

0.1

0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
Frequency [Hz]

Figure 3.25 Spectrum of phase ‘a’ voltage for third-harmonic injection.

3. Carrier-based PWM with Offset Addition

vAm ¼ Vm1 sinðvtÞ þ offset

 p
vBm ¼ Vm sin vt  2 þ offset
3
 p 
vCm ¼ Vm sin vt þ 2 þ offset
3

Where offset is given as;

Vmax þ Vmin
Offset ¼  ; Vmax ¼ MaxfvAm ; vBm ; vCm g; Vmin ¼ MinfvAm ; vBm ; vCm g
2

Gain Margin Vm1 + Offset

Vm1

Offset

Figure 3.26 Modulating signals and carrier-wave for offset addition PWM.
Pulse Width Modulation 17

>= boolean 1
VA
S1
NOT 2
S1'

>= boolean 3
VB
S2
NOT 4
S2'

>= boolean 5
VC
S3
max NOT 6
MinMax –0.5 S3'

min
Gain
Carrier Wave
MinMax1

Figure 3.27 Matlab/Simulink for offset addition PWM (File name: PWM_3_phase_CB_offset.mdl).

1
Va [p.u.]

–1
0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
Specturm Va [p.u.]

Fundamental = 0.57758
0.2

0.1

0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
Frequency [Hz]

Figure 3.28 Output voltage and voltage spectrum for offset addition PWM.
18 High Performance Control of AC Drives

4. Space Vector PWM

Space vector is defined as;

2 p p 
fs ¼ fa þ ej2 3 fb þ ej4 3 fc
3

Where fa, fb and fc are the three-phase quantities that can as voltages, currents or
fluxes.

The total possible outputs are 23 ¼ 8 (000, 001, 010, 011, 100, 101, 110, 111). Here 0 indicates
the upper switch is ‘off’ and 1 represents the upper switch is ‘on’.
The space vectors can be shown graphically in Figure 3.29.

Figure 3.29 Voltage space vector locations corresponding to different switching states.

The maximum obtainable fundamental output voltage is calculated from the right angled
triangle (Figure 3.30) as;

p
2 1
Vmax ¼ Vdc cos ¼ pffiffiffi Vdc
3 6 3
Pulse Width Modulation 19

2
V ma
x 3 Vdc

α = π/6

Figure 3.30 Determining the maximum possible output using space vector PWM.

SECTOR I
to /4 ta /2 tb / 2 to / 2 tb / 2 ta /2 to /4
0.5Vdc
SA
− 0.5Vdc

SB

SC

V7 V1 V2 V8 V2 V1 V7
Ts

Figure 3.31 Switching pattern for space vector PWM for sector I.

Discontinuous Space Vector PWM

Discontinuous space vector PWM results when one of the two zero vectors is not used in the
implementation of the space vector PWM. One of the leg of the inverter do not switch in
the whole switching period and remains tied to either the positive or negative dc bus. The nine
different discontinuous space vector PWM techniques are;

. t7 ¼ 0 for all sectors, known as DPWMMAX

. t8 ¼ 0 for all sectors, known as DPWMMIN
. Discontinuous modulation DPWM 0
. Discontinuous modulation DPWM1
. Discontinuous modulation DPWM 2
. Discontinuous modulation DPWM 3
. Discontinuous modulation DPWM 4
. Discontinuous modulation DPWM 5
. Discontinuous modulation DPWM 6
20 High Performance Control of AC Drives

Figure 3.32 Leg voltage (switching pattern) for discontinuous space vector PWM.

0.6
(0 1 0 ) V2
V3 (1 1 0 ) va
DPWMMAX
0.4
t7 = 0
Voltageg (volts)

Vavg
0.2
t7 = 0 t7 = 0
V4 V1 (1 0 0 ) 0
(0 1 1 )
t7 = 0 t7 = 0
-0.2
t7 = 0
-0.4
V5 V N
VnN

(0 0 1 ) V6 (1 0 1 )
0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04
Time (sec)

(a) (b)
DPWMMAX

Figure 3.33 (a) Zero voltage distributions (b) associated voltage waveforms for discontinuous space
vector PWM.
Pulse Width Modulation 21

. Matlab/Simulink Model for space vector PWM:

Sa Va
mag

reference
voltage Low pass
MATLAB 3-Ph Voltage
generator Sb Vb Filter
Function VSI Acquisition
Bank
angle MATLAB Fcn

Zero-Order
Hold
Se Ve

Repeating
Sequence

Figure 3.35 Sub-blocks of Matlab/Simulink model, a. Reference voltage generation, b. VSI, c. Filters.

. Simulation Results for space vector PWM:

22 High Performance Control of AC Drives

Figure 3.37 a. Filtered leg voltages for continu- Figure 3.37 b. Filtered phase voltages for DSVPWM.
ous SVPWM.

Figure 3.38 Zero vector time of application in linear modulation range in sector I.
. Space Vector PWM in Over-modulation Region

Figure 3.39 Linear and over-modulation range.

Pulse Width Modulation 23

q Desired
p Reference

–γ
Vector

π /3
C Locus of Modified
v*s Reference Vector
vb
v *'
α s
y
γ
O va A x B

Figure 3.40 Over-modulation I in space vector PWM-Case 1.

Area = A3
q s Desired
y
3–

p Reference
π/

Vector
Area = A2
* C
vs
Locus of Modified
vb Reference Vector
v *'
α s y
r Area = A1
γ
O va A x B

Figure 3.41 Over-modulation I in SVPWM-Case 2.

24 High Performance Control of AC Drives

q
p
Desired

3–y
Reference

π/
Vector
Locus of Modified
v*s Reference Vector

v *'
s
α αm y
γ x
O

Figure 3.42 Over-modulation II in space vector PWM.

. Matlab/Simulink Model to implement space vector PWM in Over-modulation Regions

0.6 0.6
voltage(volts)

0.4 0.4
voltage(volts)

0.2 0.2

0 0

-0.2 -0.2

-0.4 -0.4

-0.6 -0.6

0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
time(sec) time (sec)
(a) MI = 0.907 (b) MI = 0.952
0.6
0.6

0.4 0.4
voltage(volts)
voltage(volts)

0.2 0.2

0 0

-0.2 -0.2

-0.4 -0.4

-0.6 -0.6

0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
time (sec) time(sec)
(c) MI = 0.980 (d) MI = 1.000

Figure 3.43 Inverter Phase ‘a’ voltage waveform at different modulation indices.

. Harmonic Analysis
Harmonic component of the output voltage is given using the Fourier series expression as:
2p 3
ð=2
46 7
Fn ðuÞ ¼ 4 f ðuÞsinðnuÞdu5
p
0
Pulse Width Modulation 25

Figure 3.44 Harmonic spectra by FFT, normalized to fundamental component.

.Total Harmonic Distortion (THD)

The Total Harmonic Distortion (THD) factor is defined as
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
Vr2  V12
THD ¼
V12

Total Harmonic Distortion

35

30

25

20
THD [%]

15

10

0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1
MI

Figure 3.45 Total Harmonic Distortion in over-modulation region.

26 High Performance Control of AC Drives

5. Artificial Neural Network Based PWM

UP/
Sa
Down
Neural Network Counter

De-normalization
Sb
Normalization

V* ( )
f V*

Sc

α* ( )
g α*

Ts/4
Figure 3.46 Functional Block diagram of ANN based Space Vector PWM for a three-phase VSI.

1.5

1
gA(α*), gB(α*), gC(α*)

0.5

–0.5

–1

–1.5
0 0.004 0.01 0.016 0.02
Time (s)

Figure 3.47 Turn –on pulse width function of phase A, B, C as a function of Angle a in different sector.
Pulse Width Modulation 27

. Matlab/Simulink Model of Implementing ANN based Space Vector PWM

1 -K-
Vd
Gain

g{a}
1
2 Product Sa
Vq
x{1} g{b}

Product1 comparator
Cartesian to 2
Polar block
g{c} Sb

Product2
Neural Network
3
Sc

T/4 Subsystem1
Constant1
Repeating
Sequence

1 x p p{1} a{1}

x{1} Process Input 1 Layer 1 a{1}

a{1} a{2}

a{1} Layer 2 a{2}

a{2} a{3} 1
a{2} Layer 3 a{3} g{a}

a{3} a{4} ay 2
a{3} Layer 4 Process Output 1 g{b}

3
g{c}

Figure 3.48 Matlab/Simulink model of ANN based space vector PWM.

1
VA (p.u.)

–1
0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04
VA-filtered (p.u.) Leg voltage (p.u.)

0.5

0
0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04

–1
0.02 0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038 0.04
Time (s)

Figure 3.49 ANN based Space vector PWM waveforms.

28 High Performance Control of AC Drives

Table 3.5 Relationship between the space vector and modulating signal

Sector No. UA UB UC
I ðta þ tb þ t8 þ t7 Þ=Ts ð  ta þ tb þ t8  t7 Þ=Ts ð  ta  tb þ t8  t7 Þ=Ts
II ðta  tb þ t8  t7 Þ=Ts ðta þ tb þ t8  t7 Þ=Ts ð  ta  tb þ t8  t7 Þ=Ts
III ð  ta  tb þ t8  t7 Þ=Ts ðta þ tb þ t8  t7 Þ=Ts ð  ta þ tb þ t8  t7 Þ=Ts
IV ð  ta  tb þ t8  t7 Þ=Ts ðta  tb þ t8  t7 Þ=Ts ðta þ tb þ t8  t7 Þ=Ts
V ð  ta þ tb þ t8  t7 Þ=Ts ð  ta  tb þ t8  t7 Þ=Ts ðta þ tb þ t8  t7 Þ=Ts
IV ðta þ tb þ t8  t7 Þ=Ts ð  ta  tb þ t8  t7 Þ=Ts ðta  tb þ t8  t7 Þ=Ts

Figure 3.50 Relationship between carrier-based and space vector PWM in sector I.

Figure 3.51 Relationship between modulating signal and space vector sectors.
Pulse Width Modulation 29

Multi-level Inverters
The most popular configurations are;

1. Diode Clamped or Neutral point clamped multi-level inverters

2. Capacitor clamped or flying capacitor multi-level inverters
3. Cascaded H-bridge multi-level inverters

1. Diode Clamped Multi-level Inverters

The leg voltages can then be written as

VAN ¼ ðSA1  SA2 ÞVdc

VBN ¼ ðSB1  SB2 ÞVdc
VCN ¼ ðSC1  SC2 ÞVdc

Figure 3.52 Neutral Point Clamped 3-level inverter topology.

30 High Performance Control of AC Drives

Carrier and Modulating wave [p.u.]

Time [s]
(a)
Carrier and Modulating wave [p.u]

0 Time [s]
(b)
Carrier and Modulating wave [p.u.]

Time [s]
(c)

Figure 3.53 Principle of SPWM for a five-level diode clamped inverter: (a) IPD; (b) POD;
and (c) APOD.
Pulse Width Modulation 31

. Matlab/Simulink Model of Carrier-based PWM scheme for three-level NPC

Double click here to plot

the Valeg FFT

Vc1 Van van ia

Vc2 Vbn vbn ib

Sabc Vcn vcn ic

R-L Load ia

ib Vc1
ic

Sa Sa

Sb Sb

Sc Sc Vc2
dc

S-PWM 1 Vdc

Figure 3.54 Matlab/Simulink model of Carrier-based PWM for a 3-level NPC.

1.5 2.5
2
1
Line voltage Vab [p.u.]

1.5
Phase 'a' voltage [p.u.]

1
0.5
0.5
0 0
–0.5
–0.5
–1

–1 –1.5
–2
–1.5 –2.5
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
Time [s] Time [s]
Phase 'a' voltage [p.u.]

0.06 2

0.04
0
Phase currents [p.u.]

0.02
–2
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04
0 Time [s]
Spectrum voltage [p.u.]

Fundamental = 0.89287
–0.02 0.1

–0.04 0.05

–0.06 0
0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0 1000 2000 3000 4000 5000 6000 7000 8000
Time [s] Frequency [Hz]

Figure 3.55 Response of a three-level NPC.

32 High Performance Control of AC Drives

2. Flying Capacitor Type Multi-level Inverter

Figure 3.56 Power Circuit of a 3-level three-phase flying capacitor type inverter.
Pulse Width Modulation 33

0.5Vdc

0.5Vdc
Sa1 Da1 Sa1 Da1
C C1
Sa2 Da2 Sa2 Da2
Cf Cf

0.5Vdc

0.5Vdc
S’a2 Da3 S’a2 Da3
C2

S’a1 Da4 S’a1 Da4

va va
(a) (b)
0.5Vdc

0.5Vdc
Sa1 Da1 Sa1 Da1
C1 C1
Sa2 Da2 Sa2 Da2
Cf Cf
S’a2
0.5Vdc

Da3 S’a2 Da3

0.5Vdc
C2 C2
S’a1 Da4 S’a1 Da4

va va
(c) (d)
0.5Vdc

0.5Vdc

Sa1 Da1 Sa1 Da1

C1 C1
Sa2 Da2 Sa2 Da2
Cf Cf
S’a2 S’a2
0.5Vdc

0.5Vdc

C2 Da3 C2
Da3
S’a1 S’a1
Da4 Da4
va va
(e) (f)
0.5Vdc

0.5Vdc

Sa1 Da1 Sa1 Da1

C1 C1
Sa2 Da2 Sa2 Da2
Cf Cf

S’a2 S’a2
0.5Vdc

0.5Vdc

C2 Da3 C2
Da3
S’a1 Da4 S’a1 Da4

(g) va (h) va

Figure 3.57 (a) Switch State 1100 with positive current flow; (b) Switch state 1100 with negative current
flow; (c) Switch state 1010 with positive current flow (Flying capacitor charges); (d) Switch state 1010
with negative current flow (Flying capacitor discharges); (e) Switch state 0101 with positive current flow
(Flying capacitor discharges); (f) Switch state 0101 with negative current flow (Flying capacitor charges);
(g) Switch state 0011 with positive current flow; (h) Switch state 0011 with negative current flow.
34 High Performance Control of AC Drives

Vdc

Vdc/2

Vdc /2

0
Ts 2Ts 3Ts 4Ts

Figure 3.58 Carrier wave for Sn1 and Sn10 in FLC inverter.

Vdc

Vdc /2

Vdc/2

0
Ts 2Ts 3Ts 4Ts

Figure 3.59 Carrier wave for Sn2 and Sn20 in FLC inverter.

Vdc

Vdc /2
S n1

Sn2

Ts 2Ts 3Ts 4Ts

Figure 3.60 Gate signal generation when Vdc =2  vref  Vdc .

Vdc /2

Sn1

Sn2

Ts 2Ts 3Ts 4Ts

Figure 3.61 Gate signal generation when 0  vref  Vdc =2.
. Matlab/Simulink Model of 3-level Capacitor Clamped or FLC inverter
Discre te ,
Ts = 1e-005 s.
powergui

C5
+
v
-
+
v Voltage Measurement1 Scope2
Scope3 -
Voltage Measurement4 Scope5
Pulse Width Modulation

g
C

g
g
+

C
C
v
-
Sa5
Voltage Measurement2 Sa1 Sa3
C7 C1 C6

E
E
C1

g
C

g
g

C
C
Sa6
Sa2 Sa4
C4

E
E
Vdc C3

g
C

g
g

C
C
i Scope1
Sa1'2 +
Sa1' Sa1'1 -

E
C urrent Measurement

E
E
g
C

g
g

C
C
Sa2'2
Sa2' Sa2'1 +
v
-
E

E
E
Voltage Measurement5 Scope6

Out1
Out1 Out1
Out2
Out2 Out2
Out3
Out3 Out3
Out4
Out4 Out4
swutch state2
swutch state swutch state1
35
36 High Performance Control of AC Drives

1000

Vab(V)
0

–1000
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

500
Van(V)

–500

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]

Figure 3.63 Output line and phase voltages from 3-level FLC inverter.

3. Cascaded H-Bridge Multi-level Inverter

va vb vc

Sa11 Sa22 Sb11 Sb22 Sc11 Sc22

Vdc vN1 Vdc Vdc

S’a11 S’a22 S’b11 S’b22 S’c11 S’c22

Sa12 Sa21 Sb12 Sb21 Sc12 Sc21

Vdc vN2 Vdc Vdc

’
’
S a12 S’a21 ’
S b12 S b21 S’c12 S’c21

Figure 3.64 Power circuit topology of a five-level Cascaded H-bridge inverter.

. Matlab/Simulink Model of 5-level CHB inverter
INVERTER PWM LOGIC

Continuous [aaG1_2]
powergui [aaG2_2] -T- -T-
-T- -T- -T- -T-
[aaG3_2]
Out1 g C g C
[aaG4_2] g C g C
g C g C IGBT1_6 IGBT2_17
IGBT1_3 IGBT2_8 IGBT1_9 IGBT2_26
E E
E E
E E
Vdc 5
Vdc 2 Vdc 8
0.9 In2

Constant -T- -T-

[aG1_2] -T- -T- -T- -T-

[aG2_2] g C g C g C g C
Out2 g C g C IGBT2_16 IGBT2_18
IGBT2_7 IGBT2_9 IGBT2_25 IGBT2_27
[aG3_2]
E E
Pulse Width Modulation

[aG4_2] E E
E E

-T- -T- -T-

[aG1_2] -T-
INVERTER PWM LOGIC1 [aG3_2]
g C g C g C g C
g C g C IGBT1_4 IGBT2_11
IGBT1_1 IGBT2_2 IGBT1_7 IGBT2_20

-T- E E
E E
E E
-T- Vdc 4
Out1 Vdc 1 Vdc 7
-T-

-T- -T- -T- -T- -T-

[aG2_2] [aG4_2]
g C g C
In2 g C g C
g C g C IGBT2_10 IGBT2_12
IGBT2_1 IGBT2_3 IGBT2_19 IGBT2_21
E E
E E
[aG1_2K] E E

[aG2_2K]
Out2
[aG3_2K]
[aG4_2K] + + +
v v
v - -
- V7 V3
+
v Scope
-
V1
V8 1 oh1
1 oh3 1 oh2
INVERTER PWM LOGIC2

OUTPUT -2
Scope1
-T-
OUPUT-1
OUTPUT -3
Out1 -T-
-T-

-T-

In2
Scope3

[aG1_2A]

[aG2_2A]
Out2
[aG3_2A]

[aG4_2A]

Figure 3.65 Matlab/Simulink of 5-level 3-phase CHB.

37
38 High Performance Control of AC Drives

Vab( p.u)
0

–5
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

2
Vab( p.u)

–2
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time [s]
Figure 3.66 Output line and phase voltages from 5-level CHB inverter.
1. Impedance Source or Z-Source Inverter

Figure 3.67 Power circuit topology of a Z-source inverter.

Circuit Analysis

Figure 3.68 Equivalent circuit of a Z-source inverter; (a). non-shoot-through mode, (b). shoot through
mode.
Pulse Width Modulation 39

. Carrier-based Simple Boost PWM control of a Z-source Inverter

Carrier Modulating signals

V*P
v*a
v*b
v*c
V*N
S1 1 1 1 0 0 1 1 1
S2 1 1 0 0 0 0 1 1
S3 1 0 0 0 0 0 0 1
S’1
S’2
S’3
Shoot-through zero states

Figure 3.69 Principle of Carrier-based simple boost PWM for a Z-source inverter.
. Carrier-based Maximum Boost PWM control of a Z-source Inverter
Modulating signals
V*P Carrier
v*a
v*b
v*c
V*N
S1 1 1 1 0 0 1 1 1
S2 1 1 0 0 0 0 1 1
S3 1 0 0 0 0 0 0 1
S’1
S’2
S’3
Shoot-through zero states

Figure 3.70 Principle of Carrier-based Maximum boost PWM for a Z-source inverter.

10

8
Voltage Gain (G)

Simple boost
2
Maximum constant boost

0
0 0.2 0.4 0.6 0.8 1
Modulation Index (M)

Figure 3.71 Voltage gain versus modulation index for Z-source inverter.
 40
. Matlab/Simulink model of Z-source inverter

Discrete,
Ts = 1e-006 s.

ZSI CARRIER BASED

CONTROL

VARIABLE LOAD

Commanded Voltage

DC-source ZSI
Isolated Load

Vab
Vpn
Vin Vab_filtered
Vc1
Vabc
Iin
Vc2
INPUT Iabc
D
OUTPUT
ZSI

Figure 3.72 Matlab/Simulink model of Z-source inverter (File name: ZSI_SPWM_RL_load.mdl).

High Performance Control of AC Drives
Pulse Width Modulation 41

1000

Vinv (V)
0
–1000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VL1 and VL2 (V) Vc1 and Vc2 (V)

500

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

500
0
–500
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s)

Figure 3.73 Voltages at the source side, a. at the input of the bridge inverter, b. across two capacitors, c.
across two inductors.

200
Vabc Filtered (V)

-200
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
20
Iabc (A)

-20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1000
Vab (V)

-1000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

Figure 3.74 Outputs from Z-Source inverter, a. Filtered three-phase voltages, b. Three-phase load
current, c. Line voltage.
42 High Performance Control of AC Drives

2. Quasi Impedance Source or qZSI Inverter

Impedance Network, qZSI

vc 2
DC L1 C2 L2
Source i L1 iL2
vL2
v L1
S1 S2 S3
Vdc Da1 Db2 Dc1
2
o C1 vc1 vinv V
A VB VC
’
Vdc S’ 1 Da2 S2 Db2 S’3 Dc2
2

Figure 3.75 Power Circuit topology of the voltage fed qZSI.

Circuit Analysis

Figure 3.76 Equivalent circuit of the qZSI; (a) non-shoot-through state, (b) shoot-through state.
. Matlab/Simulink model of qZ-source inverter
Discrete,
QZSI CARRIER BASED Ts = 1e-006 s.
CONTROL

Control
Pulse Width Modulation

VARIABLE LOAD

Commanded
Voltage DC-source

QZSI
Isolated Load
Vin

Vpn Vab
Iin Vc2
Vab_filtered
INPUT D
Fo 20H
Vc1 Vabc

Vab1
Iabc

OUTPUT

Figure 3.77 Matlab/Simulink model of Z-source inverter.

43
44 High Performance Control of AC Drives

1000
Vinv (V)
0

-1000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Vc1 and Vc2 (V)

400

200

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VL1 and VL2 (V)

500

-500
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s)

Figure 3.78 Voltages at the source side: upper - at the input of the bridge inverter; middle - across two
capacitors; lower - across two inductors.

200
Vabc Filtered (V)

-200
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
20
Iabc (A)

-20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
1000
Vab (V)

-1000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (s)

Figure 3.79 Outputs from qZ-Source inverter, a. Filtered three-phase voltages, b. Three-phase load
current, c. Line voltage.