HW7 SPR 2018
HW7 SPR 2018
VCC=10 V
Rc
R1 Cout
Vout, collector
Cin
2N3904
vin
R2 Re Ce
0V
Use R1 = 91 kΩ, R2 = 20 kΩ, Re = 1 kΩ and Rc = 5 kΩ. Assume Ce, Cin, and Cout are ‘large
enough’ to neglect in the AC analysis.
In the lecture, relatively low-valued voltage and current noise sources were disregarded to speed
analysis. You are encouraged to make the same approximations, but you must explicitly state
your justification so I can judge your understanding of this process.
1. Assume that the circuit is driven from a generator with 50 Ω source resistance. What is the
total input referred voltage noise over a 1 kHz to 11 kHz frequency at room temperature?
What is the noise when referred to the output?
2. Your noise analysis is based upon a 10kHz bandwidth, though the circuit is not band-limited
to this value. Provide analysis to estimate the lower/upper frequency limits (i.e. 3dB cutoff
frequencies) and estimate the noise levels RTI/RTO expected over this (greater than 10kHz)
bandwidth.
3. Perform a SPICE AC analysis to compare with your bandwidth estimate. Performa a SPICE
noise analysis over the same frequency limits calculated in problem 2 and compare with your
analysis in problem 2.
4. Redesign the circuit to noise match to the 50 Ω source resistance and state the noise voltage.
Compare this value with that of problem 1 and comment on the differences.
Rc Rc
R1 Cc R1 COUT
CIN
V
R2 Re Ce R2 Re Ce
5. Connect two identical amplifier stages like the one above in cascade (one after the other
using values from problem 1 – not noise matched). What are the voltage gain, and input and
output impedances of the combination?
6. Assume that the circuit is driven from a 50 Ω source. What is the total (rms) voltage noise
(referred to the input of the first stage) for a bandwidth from 1 kHz to 11 kHz frequency at
room temperature? What is the total noise referred to the output (of the second stage)? For
this problem, assume the circuit is bandlimited to only operate over 1kHz to 11kHz.