AN1159

DGD2106M Application Information

The DGD2106M, high-side/low-side gate driver is used to optimally drive the gate of MOSFETs or IGBTs. Below (Figure 1) is an example
application using DGD2106M with MOSFETs to make three half-bridge circuits used to drive a three phase motor. Typical motor
applications are AC Induction motors, PMSMs, and BLDC motors. DGD2106M can also be used in power supplies. In this document, the
important parameters needed to design in the DGD2106M are discussed. Main sections are bootstrap resistor, diode, and capacitor
selection, gate driver component selection, decoupling capacitor discussion, and PCB layout suggestions.

Figure 1. Three Phase Motor Driver application example of DGD2106M

AN1159 – Rev 2 1 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

Bootstrap Component Selection

Bootstrap Resistor

Considering Figure 1, when the low-side MOSFET (Q2, Q4, or Q6) turns on, Vs pulls to GND and the bootstrap capacitor (CB1, CB2, or CB3)
is charged. When the high-side MOSFET (Q1, Q3, or Q5) is turned on, VS swings above Vcc and the charge on the bootstrap capacitor (CB)
provides current to drive the IC high-side gate driver. The first charge of CB from Vcc through the bootstrap resistor (RBS1, RBS2, or RBS3) and
bootstrap diode (DBS1, DBS2, or DBS3) occurs when power is first applied and the low-side turns on the first time. At this time the charge
current is the largest as typically CB is not discharged fully at each cycle during normal operation.

A bootstrap resistor (RBS) is included in the bootstrap circuit to limit the inrush current that charges CB when Vs pulls below Vcc; this inrush
current is largest with the first charge. Limiting inrush current is desirable to limit noise spike on Vs and COM, potentially causing shoot-
through. The amplitude and length of time of the inrush current is determined mostly by the component value of R BS and CBS as well as Vcc
level. The aim in resistor selection for the application is to slow down the inrush current but have minimal effect on the RC time constant of
charging CBS.

Typically, values for RBS are 3Ω to 10Ω, enough to dampen the inrush current but have little effect on the V BS turn on. Figures 2-5 illustrate
the effect of different RBS values.

Figure 2. Bootstrap Peak inrush current ≈3A Figure 3. Bootstrap Peak inrush current ≈1.2A
with RBS=3Ω, CBS=2.2µF with RBS=10Ω, CBS=2.2µF

Figure 4. VBS Rise Time (11.8µs) with Figure 5. VBS Rise Time (20.5µs) with
RBS=3Ω, CBS=2.2µF RBS=10Ω, CBS=2.2µF

AN1159 – Rev 2 2 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

Bootstrap Diode

The chosen bootstrap diode (DBS) should be rated higher than the maximum rail voltage since the diode must be able to block the full rail
voltage and any spikes seen at the VS node. The diode’s current rating is simply the product of total charge (QT) required by the HVIC (High
Voltage Integrated Circuit) and the switching frequency. An ultrafast recovery diode is recommended to minimize any delay of charging the
CBS cap. A 1A ultrafast recovery diode is typical for DGD2106M applications.

Bootstrap Capacitor

The initial step in determining the value of the bootstrap capacitor is to determine the minimum voltage drop (ΔV BS) that can be guaranteed
when the high-side device is turned on. In other words, the minimum gate-source voltage (VGS_min) must be greater than the UVLO of the
high-side circuit, specifically VBSUV- level. Therefore, if VGS_min is the minimum gate-source voltage such that:

VGS_min > VBSUV-

Then:

ΔVBS = Vcc - Vf - VGS_min - VX

Where:
- Vcc is the supply voltage to the DGD2106M
- Vf is the voltage drop across the bootstrap diode (DBS)
- VX is the voltage drop across the MOSFET

VX is calculated as the current seen across low-side MOSFET multiplied by its RDS_ON and is simply VCE_ON at the specific output current if an
IGBT were used instead.

In addition to the voltage drops across these components, other factors that cause V BS to drop are leakages, charge required to turn on the
power devices, and duration of the high-side on time. The total charge (QT) required by the gate driver then equals:

QT = QG + QLS + [ILK_N] * TH_ON

Where:

QG = gate charge of power device

QLS = level shift charge required per cycle
TH_ON = high-side on time
ILK_N = sum of all leakages that include:
- IGSS/IGES: Gate-source leakage of the power device
- ILK_DB: Bootstrap diode leakage
- ILK_IC: Offset supply leakage of HVIC
- IQ_BS: Quiescent current for high-side supply
- ILK_CB: Bootstrap capacitor leakage

Bootstrap capacitor leakage (ILK_CBS) only applies to electrolytic types. Therefore, it is best not to use an electrolytic capacitor. Thus,
bootstrap capacitor leakages will not be included in the calculations.

QLS is not listed in the datasheet; depending on the process technology, it could range anywhere from 3-20nC for 500V to 1200V process
respectively. Assuming a value of 10nC for the 600V process should be sufficient with added margin.

From the basic equation, then the minimum bootstrap capacitor is calculated as:

CB_min ≥ QT /ΔVBS

Example using MOSFET, DMNH6021SK3Q

HVIC=DGD2106M

Vcc = 12V
QG = 20nC
IGSS = 100nA
TH_ON = 10µs
RDSON = 25mΩ max, 125˚C
Iout = 5A
IQ_BS = 130µA
ILK_IC = 50µA
QLS = 10nC
VF = 1.0V
ILK_DB = 100µA
VGSmin = 10.0V

AN1159 – Rev 2 3 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

From equations:

ΔVBS = 12V- 1.0V-10V-(0.125V) = 0.875V

QT = QG + QLS + (ILK_N * TH_ON) where ILK_N * TH_ON = 2.8nC

= 20nC + 10nC + 2.8nC

= 32.8nC

Thus CBS min = 32.8nC/0.875V = 37nF.

The bootstrap capacitor calculated in the above example is the minimal value required to supply the needed charge. It is recommended that
a margin of 2-3 times the calculated value be used. Utilizing values lower than this could result in over charging of the bootstrap capacitor
especially during –VS transients.

Typically for motor driver applications CBS = 1µF to 10µF are used. It is recommended to use low ESR ceramic capacitors as close to the V B
and VS pin as possible (see PCB layout suggestions section).

Gate Resistor Component Selection

The most crucial time in the gate drive is the turn on and turn off of the MOSFET, and performing this function quickly, but with minimal
noise and ringing is key. Too fast a rise/fall time can cause unnecessary ringing and poor EMI, and too slow a rise/fall time will increase
switching losses in the MOSFET.

Figure 6. Gate Drive High-Side and Low-Side Components for DGD2106M

Considering the gate driver components for DGD2106M in Figure 6, with the careful selection of RGn and RRGn, it is possible to selectively
control the rise time and fall time of the gate drive to the MOSFET Qn. For turn on, all current will go from the IC through RG1 and charge the
MOSFET gate capacitance, hence increasing or decreasing RGn will increase or decrease rise time in the application. With the addition of
DRGn, the fall time can be separately controlled as the turn off current flows from the MOSFET gate capacitor, through R RGn and DRGn to the
driver in the IC to VS for high-side and COM for low-side. So, increasing or decreasing RRGn will increase or decrease the fall time.
Sometimes finer control is not needed and only RG1 and RG2 is used.

Increasing turn on and turn off has the effect of limiting ringing and noise due to parasitic inductances, hence with a noisy environment, it
may be necessary to increase the gate resistors. Gate component selection is a compromise of faster rise time with more ringing, and a
poorer EMI but better efficiency, and a slower rise time with better EMI, better noise performance but poorer efficiency. The exact value
depends on the parameters of the application and system requirements. Generally, for motors the switching speed is slower, and the
application has more inherent noise, higher values are recommended, for example RG = 20Ω - 100Ω.

To have equal switching times for high-side and low-side, it is recommended that the gate driver components for high-side and low-side are
mirrored. For example RRG1 = RRG2, DRG1 = DRG2 and RG1 = RG2.

AN1159 – Rev 2 4 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

Decoupling Capacitor Selection

For optimal operation, Vcc decoupling is crucial for all gate driver ICs. With poor decoupling, larger Vcc transients will occur at the IC when
switching, and for greater and longer Vcc drops the IC can go into UVLO.

Figure 7. Suggested Vcc decoupling

As shown in Figure 7, two decoupling capacitors are recommended CV1 and CV2. CV1 can be a larger electrolytic, for example 47µF (50V),
and is used to dampen low frequency drains on supply: CV1 does not need to be right next to the IC, but CV2 is used to decouple faster edge
changes to Vcc, and should be a low ESR ceramic capacitor placed close to the Vcc pin. This component provides stability when Vcc is
quickly pulled down with load from the IC. Typical values for CV2 are 0.1µF to 1µF.

For applications with multiple gate driver ICs (for example BLDC motor drive with 3 x gate drivers as shown in Figure 1), one larger
electrolytic (CV1) can be used and the three low ESR ceramic caps (CV2, CV3, CV4) should be used close to the Vcc pin (see Layout section
also).

Input Resistors
The DGD2106M PWM inputs, HIN and LIN, are very high impedance inputs with a pull-down resistor on both inputs to COM
(see Figure. 8). The pull-down resistor on HIN and LIN has a value of approximately 1MΩ.

1MΩ

1MΩ

Figure 8. Input Logic for DGD2106M

AN1159 – Rev 2 5 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

Matching Gate Driver with MOSFET or IGBT

IC drive current and MOSFET/IGBT gate charge

Gate Driver ICs are defined by their output drive current, its ability to source current to the gate of the MOSFET/IGBT at turn on and to sink
current from the gate of the MOSFET/IGBT at turn off. For the DGD2106M, the drive current is IO+=290mA typical and IO-=600mA typical.

For a given MOSFET/IGBT, with the known drive current of the DGD2106M, you can calculate how long it will take to turn on/off the
MOSFET/IGBT with the equation:

t = Qg/I

Qg = total charge of the MOSFET/IGBT as provided by the datasheet

I = sink/source capability of the gate driver IC
t = calculated rise/fall time with the given charge and drive current

For example with the Diodes’ DGTD65T15H2TF, 650V IGBT, Qg = 61nC; and with the DGD2106M IO+=290mA and IO-=600mA, the tr =
210ns and tf = 102ns. These are estimates as the total charge given in the datasheet may not be the same conditions in the application.
Also, an addition of a gate resistor will increase the tr and tf.

Unexpected shoot-through with dVDS/dt

Unwanted MOSFET turn-on, caused by CGD x dVDS/dt (see Figure 9) is often the cause of unexplained shoot through in the half-bridge
circuit. Depending on the ratio of CGS/ CGD , when the dVDS/dt across low-side MOSFET (Q2) occurs (i.e when high-side MOSFET turns on),
there can be a voltage applied to the gate of the Q2 MOSFET, turning on Q2 and causing shoot through. In effect a gate bouncing occurs
causing a ringing on the VS line and the power ground.

Figure 9. Unexpected shoot through with dVDS/dt

Considering Figure 9,

IGD = CGD x dVDS/dt

IGD will flow towards the resistive load (and small inductance due to parasitics) of the gate driver and the CGS of the MOSFET. Hence this
unwanted condition may be minimized by looking at the Ciss/Cres in the MOSFET datasheet (Ciss/Cres gives an indication of CGS/CGD);
having a Ciss/Cres as large as possible will minimize this phenomenon. Also an external capacitor can be added to the gate-source of the
MOSFET (for example 1nF) which will increase CGS/CGD.

AN1159 – Rev 2 6 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

Minimum Pulse Requirement

The DGD2106M has RC filters on the input lines to be more resilient in noisy environments. With a rising edge at the input to the gate
driver, followed by the propagation delay of the IC, delay from gate resistor, and rise time of the MOSFET, the half-bridge will then turn on
producing bus voltage at the output. This MOSFET turn on produces significant system noise. For optimal operation, it is suggested to
provide a minimum pulse width at the input to the IC from the MCU to ensure the turn off occurs after this event. As a rule of thumb, this
minimum pulse should be 2 x propagation delay for high-side/low-side gate drivers; hence for the DGD2106M, the minimum pulse
recommended at the logic inputs is 440ns.

During typical operation, the DGD2106M will respond to an input greater than 50ns (approximate value from the RC input filter response).
Hence for an input pulse greater than 50ns approximately the IC will follow the pulse as expected; and for an input pulse less than 50ns,
there will be no response from the IC.

PCB layout suggestions

Layout plays an important role in minimizing unwanted noise coupling, unpredicted glitches, and abnormal operation which can arise from a
poor layout of the associated components. Figure 10 shows a schematic with parasitic inductances in the high-current path (LP1, LP2, LP3,
LP4), which would be caused by inductance in the metal of the trace. Considering Figure 10, the length of the tracks in red should be
minimized, and the bootstrap capacitor (CB) and the decoupling capacitor (CD) should be placed as close to the IC as possible in addition to
using low ESR ceramic capacitors. And finally, the gate resistors (RGH and RGL) and the sense resistor (RS) should be surface mount
devices. These suggestions will reduce the parasitics due to the PCB traces.

Figure 10. Layout suggestions for DGD2106M in a half-bridge, lines in red

should be as short as possible.

Figure 11. Schematic for layout example in Figure 12.

`
AN1159 – Rev 2 7 of 9 March 2021
© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

HIN
LIN

Fig 12. Layout of the schematic shown in Figure 11, DGD2106M in SOIC8.
All routing and components on top except for HIN and LIN from input

AN1159 – Rev 2 8 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com
 AN1159

IMPORTANT NOTICE

1. DIODES INCORPORATED AND ITS SUBSIDIARIES (“DIODES”) MAKE NO WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes
products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this
document or any product described herein. This document is intended for skilled and technically trained engineering customers and users
who design with Diodes products. Diodes products may be used to facilitate safety-related applications; however, in all instances customers
and users are responsible for (a) selecting the appropriate Diodes products for their applications, (b) evaluating the suitability of the Diodes
products for their intended applications, (c) ensuring their applications, which incorporate Diodes products, comply the applicable legal and
regulatory requirements as well as safety and functional-safety related standards, and (d) ensuring they design with appropriate safeguards
(including testing, validation, quality control techniques, redundancy, malfunction prevention, and appropriate treatment for aging
degradation) to minimize the risks associated with their applications.

3. Diodes assumes no liability for any application-related information, support, assistance or feedback that may be provided by
Diodes from time to time. Any customer or user of this document or products described herein will assume all risks and liabilities associated
with such use, and will hold Diodes and all companies whose products are represented herein or on Diodes’ websites, harmless against all
damages and liabilities.

4. Products described herein may be covered by one or more United States, international or foreign patents and pending patent
applications. Product names and markings noted herein may also be covered by one or more United States, international or foreign
trademarks and trademark applications. Diodes does not convey any license under any of its intellectual property rights or the rights of any
third parties (including third parties whose products and services may be described in this document or on Diodes’ website) under this
document.

5. Diodes products are provided subject to Diodes’ Standard Terms and Conditions of Sale
(https://www.diodes.com/about/company/terms-and-conditions/terms-and-conditions-of-sales/) or other applicable terms. This document
does not alter or expand the applicable warranties provided by Diodes. Diodes does not warrant or accept any liability whatsoever in
respect of any products purchased through unauthorized sales channel.

6. Diodes products and technology may not be used for or incorporated into any products or systems whose manufacture, use or
sale is prohibited under any applicable laws and regulations. Should customers or users use Diodes products in contravention of any
applicable laws or regulations, or for any unintended or unauthorized application, customers and users will (a) be solely responsible for any
damages, losses or penalties arising in connection therewith or as a result thereof, and (b) indemnify and hold Diodes and its
representatives and agents harmless against any and all claims, damages, expenses, and attorney fees arising out of, directly or indirectly,
any claim relating to any noncompliance with the applicable laws and regulations, as well as any unintended or unauthorized application.

7. While efforts have been made to ensure the information contained in this document is accurate, complete and current, it may
contain technical inaccuracies, omissions and typographical errors. Diodes does not warrant that information contained in this document is
error-free and Diodes is under no obligation to update or otherwise correct this information. Notwithstanding the foregoing, Diodes reserves
the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any
product described herein. This document is written in English but may be translated into multiple languages for reference. Only the English
version of this document is the final and determinative format released by Diodes.

8. Any unauthorized copying, modification, distribution, transmission, display or other use of this document (or any portion hereof) is
prohibited. Diodes assumes no responsibility for any losses incurred by the customers or users or any third parties arising from any such
unauthorized use.

Copyright © 2021 Diodes Incorporated

www.diodes.com

AN1159 – Rev 2 9 of 9 March 2021

© Diodes Incorporated
Application Note
www.diodes.com