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Hardaddsoft

This document describes the design of a 2-bit adder circuit using behavioral modeling in VHDL. It includes the truth tables for a half adder and full adder, Boolean equations for a full adder, a block diagram showing how two full adders are used to add 2-bit numbers, and VHDL code to model the 2-bit adder circuit. The output of the adder is then verified to match the expected results.

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SHYAM
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105 views8 pages

Hardaddsoft

This document describes the design of a 2-bit adder circuit using behavioral modeling in VHDL. It includes the truth tables for a half adder and full adder, Boolean equations for a full adder, a block diagram showing how two full adders are used to add 2-bit numbers, and VHDL code to model the 2-bit adder circuit. The output of the adder is then verified to match the expected results.

Uploaded by

SHYAM
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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1.

DESIGN OF ADDER CIRCUIT

EX.NO:1
DATE:23/11/2022

Aim:
To design an adder circuit which adds length of any bits using minimal components
using Behavioural Modelling.

Design:
For a 2 bit-adder
Let A = A1A0 be the first two bits number

Let B = B1B0 be the second two bits number

TRUTH TABLE – HALF ADDER

A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

TRUTH TABLE – FULL ADDER

A B Cin Sum Carry


0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Boolean Equations:

For a Full adder:


Sum(S) = A B Cin

Carry(Cout) = AC+BC+AB

For a Half Adder:


Sum(S) = A B
Carry(C) = AB
For adding two n bit numbers , we need n full adders.
Hence for adding two 2 bits numbers , we need 2 full adders.

BLOCK DIAGRAM:
Each Full adder contains:
PIN DIAGRAMS

OR GATE – IC 7432 AND GATE – IC 7408

EX – OR GATE – IC 7486
VHDL CODE:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity adder is
port(a,b:in std_logic_vector(1 downto 0);
sum:out std_logic_vector(1 downto 0);
carry:out std_logic);
end adder;
architecture Behavioral of adder is
begin
sum(0)<=a(0) xor b(0);
sum(1)<=a(1) XOR b(1) XOR (a(0) and b(0));
carry<=((a(0) and b(0))and(a(1) XOR b(1)))or(a(1) and b(1));
end Behavioral;

OUTPUT:

Result:
Thus to program to design a 2-bit adder circuit is executed and the output is verified.

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