Si MOS technology for

spin-based quantum computing

L. Hutin1*, B. Bertrand1, R. Maurand2, A. Crippa2, M. Urdampilleta3, Y.J. Kim1, A. Amisse1,2, H. Bohuslavskyi1,2,
L. Bourdet2, S. Barraud1, X. Jehl2, Y.-M. Niquet2, M. Sanquer2, C. Bäuerle3, T. Meunier3, S. De Franceschi2, M. Vinet1
1
CEA, LETI, Minatec Campus, F-38054 Grenoble, France 2 CEA, INAC, F-38054 Grenoble, France
3
CNRS, Institut Néel, F-38042 Grenoble, France *e-mail: [email protected]

Abstract — We present recent advances made towards the may exist in a superposition of |0⟩ and |1⟩ and thus point to
realization of hole and electron spin quantum bits (qubits) anywhere on the unit sphere. Furthermore, a state of N
localized within Si Quantum Dots (QDs). These devices, operated entangled qubits is expressed as a superposition of all N-tuples
at cryogenic temperatures, can be defined by slightly modifying
of the two basis-states, and is hence characterized by 2N
an SOI NanoWire FET fabrication flow, and are thus
particularly relevant in the perspective of large-scale co-
complex coefficients corresponding to their normalized
integration of qubits and their cryogenic control electronics. probabilities.
The first of DiVincenzo’s criteria [4] for a physical
implementation of a quantum computer is the ability to define
I. INTRODUCTION such two-level quantum-mechanical systems, and several
By leveraging the phenomena of quantum superposition candidates have emerged in the past decades. Roughly
and entanglement, some specifically designed quantum speaking, they can be divided into two main types. On one
algorithms [1] can achieve polynomial to exponential speed up hand, systems in which the information is stored in the internal
when compared to their best classical counterparts, thus degree of freedom of the atom. Since those can be very well
holding great promise for a variety of applications such as isolated, they tend to feature long relaxation and decoherence
secure data exchange, database search, machine learning, and times, but are rather difficult to manipulate beyond the MHz.
simulation of quantum processes. Quantum computers are Furthermore, another issue is the difficulty of experimentally
envisioned as hybrid devices [2] where quantum cores operate demonstrating their scalability. On the other hand, solid-state
in conjunction with classical circuitry, part of which is qubits which can be controlled electrically are generally
dedicated to programming, control and post-processing thought to be more scalable and their manipulation can be
functions. While the engineering challenges span across performed at the GHz timescale, though it comes at the cost of
various fields such as physics, electronics, computer science shorter decoherence times. Among the latter, superconducting
and computer engineering [3], we focus in the following on qubits have been historically leading the race in the
the matter of integrating qubits with long coherence times and implementation of quantum logic. These are however
high-fidelity operations. A common graphical representation macroscopic objects and as such prone to coupling to probes
of a qubit state space, the Bloch sphere, is shown Fig.1. and environment. Spin qubits, in which the quantum
information is encoded in the spin degree of freedom of one
1-qubit state: superposition of 2 eigenstates
[5] or several [6],[7] charged particles, offer a good
compromise as they are microscopic objects and thus in
principle more protected from external excitations.

II. SI-BASED SPIN QUBITS
Silicon spin qubits in particular have recently emerged as a
 promising option, first due to the recent observation of long
coherence times and high fidelity [8]-[10], and second thanks
to their compatibility with state-of-the-art technologies
perfected over several decades by the IC manufacturing
industry.
Regarding the first point, the latest notable achievements
Fig. 1. Bloch sphere representation of the quantum state space. A are the demonstration of single qubit Gates with >99% fidelity
qubit state can be described by a linear combination of eigenstates, [10],[11], and the implementation of quantum algorithms on a
e.g. “spin-up” and “spin-down”. two-qubit processor [12]. Fig. 2 shows the evolution of a
figure of merit sometimes called “Q-factor” for experimental
Whereas a classical bit could only be represented by a realizations in the relatively recent area of Si spin qubits. This
vector pointing to either the North or the South Pole, a qubit quantity is related to how many operations can be performed

978-1-5386-5401-9/18/$31.00 ©2018 IEEE 12

 FET SET
(a) (b)

on the qubit (e.g. a  rotation of the spin) before an error pitch (≤ 80nm) along a silicon mesa to achieve a linear array
occurs (e.g. spin dephasing). One factor limiting the coherence of quantum dots [20], as shown on Fig. 3 (a).
of spin qubits is the possible interaction with nuclear spins in Applying n+a Gate i potential on a standardi FET biased at
n+ n+ n+

the host crystal. An advantage of Si versus other large VDS and operating at 300K induces a continuous flow of
SiO2
S channel D S QD D
semiconductors (in particular III-V) is that 29Si, its only stable carriers from Source to Drain (Fig. 3 (b)). At very low
isotope with non-zero nuclear spin, has a naturally low temperatures (typically ~1K and below), adjusting the gate
abundance (~4.7%). Yet notably, most of the best performing voltage allows controlling the number of charges confined in

Energy
qubits on Fig.2 were fabricated on isotopically pure 28Si. the QD (Coulomb blockade),VDS
hence enabling
VDS in principle to
isolate a1 single electron or a single
0 T=300K 1 0 hole between
T < 1K the tunnel
f(E) f(E)
1000000 junctions (Fig. 3 (c)).
x x
100000 3D cavities
(c)
Operations per error

10000
Improved
3D Transmon
Ref.[10]: e- in 28Si/SiGe QD
(a)
3D Transmon
1000 Ref. [13]: e- in Si/SiGe QD
cQED
Fluxonium
100 Transmon Ref. [11]: e- in 28Si/SiGe QD
Quantronium
Ref. [9]: e- in 28Si QD
10
Ref. [17]: h+ in Si QD
1 Ref. [14] e- in Si/SiGe QD
CPB Charge echo
Ref. [15]: Donor-bound e- in Si
0,1
1998 2002 2006 2010 2014 2018

Year of publication SET

FET
(a)
(b) (b)
(c)
Fig. 2. Figure adapted from [16], showing the number of operations
per error for various implementations of superconducting qubits vs.
publication year. The added star symbols represent recent
demonstrations of Si spin qubits. The figure of merit was estimated as
the dephasing time T2* divided by the time needed to induce a - n+
i
n+ n+
i
n+

rotation of the spin (cf. angle  on the Bloch sphere Fig.1). SiO2
S channel D S QD D

The second point represents a key asset in the perspective

of defining a very large number of identical objects, as well as

Energy
for seamlessly co-integrating qubits with the classical VDS
VDS
electronics aimed at controlling and measuring them. In this 1 0 T=300K 1 0 T < 1K
context, single hole and electron spin qubits were recently f(E) f(E)

implemented [17]-[19] on devices extremely similar to x x

nanowire transistors realized on an SOI CMOS technology Fig. 3. (a)
(c)Scanning Electron Microscope (SEM) image of multiple
platform. quantum dots duplicated in series along a silicon nanowire.
A popular way of isolating charges starts with forming a Schematic representations and energy profiles along (b) the channel
junction between two semiconductors of different bandgaps, of a silicon on insulator (SOI) FET operated at room temperature and
(c) a Single Electron Transistor (SET) at cryogenic temperature.
such as Si and SiGe, hence forming a 2-Dimensional Electron
Gas (2DEG) at the interface. Lateral confinement is then The degeneracy between the spin states (spin-down |↓⟩ or
obtained by using several depletion Gates to tailor the spin-up |↑⟩) can then be lifted by applying a static magnetic
potential into a Quantum Dot. The main advantages of this field B, and the isolated particle can be used to encode a qubit.
approach are the high quality of the confinement interface and The separation (Zeeman) energy is EZ=|g|.µB.B, where g is a
a high degree of tunability. However, using many Gates for dimensionless quantity related to the gyromagnetic ratio of the
defining a single QD may get in the way of scaling up. particle, and µB is the Bohr magneton. Assuming a cryostat
A more compact approach consists in using accumulation temperature on the order of ~100mK, the energy difference
field-effect Gates to define the confinement potential under that can be resolved is of the order of 10µeV (implying B ~
e.g. a Si/SiO2 interface. Lateral definition can be assisted by 0.1T). Spin transitions may occur if an electromagnetic
patterning the Si active area (mesa or Shallow Trench
excitation of energy h. matching EZ is provided to the
Isolation). Carrier reservoirs are more or less remotely formed
system. Considering the above, it follows that the frequency of
by ion implantation and coupled to the QDs. In [17]-[18], the
the control signal is typically a few GHz.
fabrication only differs from a standard CMOS process flow
by the deposition of larger SiN spacers with respect to the case III. ELECTRICAL CONTROL OF THE QUBIT
of classical devices (typically 30nm vs. ~10nm). They are
A. ESR and EDSR
designed to protect the intrinsic Si film from self-aligned ion
implantation, thus preserving the tunnel barriers coupling A first way of driving coherent rotation of a spin is
adjacent QDs and separating them from the leads. It is then through Electron Spin Resonance, or ESR (Fig. 4).
straightforward to duplicate this structure with dense Gate Experimentally, one can deposit in close proximity of the
device a microstrip line that is used to flow a large AC current

13
and generate an oscillating magnetic field resonant with the inter-Gate separation and protecting it from self-aligned
spin transition frequency [8],[9]. Coupling the spin to an RF doping. Gate 1 defines the target qubit, Gate 2 is used to
magnetic field seems like the most straightforward method, localize a particle with a spin initialized to a reference state,
although the excitation is hardly applied locally. This can be a acting as a filter. Following Pauli’s Spin Blockade (PSB), a
drawback for maximizing the manipulation speed, which charge confined under Gate 1 may only travel to the Drain via
depends on the coupling strength. the QD under Gate 2 if the spins in each QD are antiparallel.
A second mechanism is the Electric Dipole Spin A control burst is applied on Gate 1 at the resonant frequency
Resonance (EDSR). In this case, the spin rotation is induced of the target qubit. As the burst duration is varied, the
by an oscillating electric field, which can be provided by a probability of flipping the hole spin confined in the QD
field-effect Gate placed directly above the QD. If the oscillates (Fig. 5(b) and (c)), with observed Rabi frequency up
properties of the system are such that Spin-Orbit Coupling to 80 MHz (T= 6.25ns). A Ramsey pulse sequence (Fig. 5
(SOC) is significant, the orbital motion caused by an RF E- (d)) leads to extracting a dephasing time T2* of 270 ns, hence a
Field alone can drive spin rotations. Otherwise, a possible Q-factor of 43. Charge noise is believed to be the dominant
approach consists in embedding a micro-magnet as an factor limiting decoherence in this case, pointing to a trade-off
auxiliary in the vicinity of the device, causing the particle between manipulation speed and longevity.
traveling back and forth to perceive an oscillating B-field [10]-
[14],[21]. Although efficient for fast manipulation of a few
qubits, this technique may become problematic for the design
and integration of large-scale qubit arrays.

Electron Spin Resonance (ESR)

Energy E

50nm
h.1

h.2

Microstrip
IAC
B1 B2

2 oscill. B
Frequency 

1

➢ AC current in inductance
➢ Oscillating B-field
 Spin rotation
0
Static magnetic field B

Electric Dipole Spin Resonance (EDSR): all-electrical control

S N Micromagnet
VAC
Fig. 5. (a) Top view Scanning Electron Microscope (SEM) image of
Gate
oscill. E static B
the device, and schematics showing the connection to the
experimental setup. (b) Rabi oscillations for a single hole spin (base
oscill. E
temperature T=10mK). (c) Typical chevron pattern obtained when
Gate
varying the excitation burst frequency and duration. (d) Dephasing
VAC measurement using Ramsey pulse sequence varying the free
➢ E-field oscillates
➢ Orbital motion ➢ E-field oscillates evolution time 
➢ Movement across B-field gradient 
 Spin rotation if strong ➢ Perceived B-field oscillation
Spin-Orbit Coupling
 Spin rotation
C. Electron spin qubits
In contrast with holes, the SOC is intrinsically quite weak
Fig. 4. (Top left) Principle of Zeeman splitting between |↓⟩ and |↑⟩, for electrons in silicon. As a result, Si electron spin qubits
resonant transitions and spin resonance signature. (Top right) B-field- were so far manipulated either by resorting to integrating ESR
mediated ESR. (Bottom) E-field-mediated EDSR, either relying on microstrips or magnets.
intrinsic Spin-Orbit Coupling (SOC), or using a micro-magnet as an It was recently demonstrated experimentally that a slight
auxiliary. difference in g-factors between two Si QDs with tunable
exchange could be leveraged to drive resonant oscillations
B. Hole spin qubits (fRabi ~ 0.2MHz) between the |↑↓⟩ and |↓↑⟩ states of a two-
Luckily, SOC is relatively strong for holes in silicon and electron system using all-electrical control pulses [23].
allows for more straightforward EDSR manipulations [22]. In single-electron systems, it was shown that thanks to a
Typical results [17],[18] are presented on Fig. 5. The device is combination of the multi-valley structure of silicon together
essentially a two-Gate pFET with wide spacers covering the with some specific device geometries resulting in broken

14
symmetries of the electron wavefunction, non-negligible IV. TUNABLE COUPLING AND READOUT
coupling terms of inter-valley SOC could emerge [24]. In fact, While easy to implement and useful for proof-of-concept
devices with Gates wrapping over mesa-defined Si NanoWires qubit demonstrations, the transport-based spin readout
lead to a “corner dot” confinement [25] (Fig. 6), and therefore technique discussed shown in the previous section presents
fall into this category. When the valley splitting between low- significant limitations: 1) it does not allow single-shot readout,
lying v1 and v2 is close to the Zeeman splitting EZ, mixing i.e. the ability to perform individual spin measurements; 2) it
between the coupled |v1, ↑⟩ and |v2, ↓⟩ states occurs, giving is not scalable. In this section, we discuss an alternative two-
access to spin control via inter-valley transitions. This gate geometry for which both of these limitations could be
mechanism enabled the first experimental measurement of E- overcome.
field electron spin manipulation in silicon without micro-
magnet [19]. A. Tunable coupling
Bias tee Fig. 6 having introduced “corner dot” confinement, for
MW VG1
(a) (b) large enough channel widths and fully overlapping Gates, two
VG2 pronounced potential minima develop at the upper nanowire
109 V/A
corners leading to a pair of clearly distinct QDs. These QDs
can be controlled independently by splitting the Gate over the
I/V VDS NW, resulting in the so-called “face-to-face” geometry. Once
again, the SOI back-Gate can be used to tune the position of
∆Valley = ∆Zeeman
the electron confinement potential. Experimental evidence of
(c) Poly-Si SiN (d) adjustable capacitive coupling between two corner dots using
E-field frequency 

the back-Gate is provided in [20]. Fig. 7 below shows

TiN numerical calculations carried out for a split-gate device with
HfO2
SiO2
Buried oxide comparable geometrical parameters, showing the tunability of
inter-dot tunnel coupling by Vbg. This feature is essential for
Static magnetic field B the realization of two-qubit Gates, but also in certain readout
(e) schemes.
T=15mK z

y
LG x

SGG
W

Fig. 6. (a) SEM image after gate patterning and measurement setup
description. (b) Schematic view of the partially wrapping gates. (c) THfO2 = 1.9 nm
LG = 30.0 nm
Cross-section along a gate showing the location of the asymmetrical TSiO2 = 2.5 nm
SGG= 20.0nm
TSi = 11.0 nm
electron wavefunction in the corner of the nanowire. (d) Diagram of TBOX = 145 nm W = 40.0 nm

the expected EDSR transition as a function of magnetic field, taking

into account the inter-valley SOC. (e) EDSR signal measurement
(T=15mK), showing spin transitions as a function of magnetic field
and microwave frequency.
 2.4 GHz tunneling rate

Furthermore, the fact that these devices are fabricated on

SOI substrates offer the possibility of using the back-Gate in
order to tune the valley splitting via vertical (de-)confinement.
At fixed Zeeman energy, this implies the ability to travel
adiabatically between two regimes for which the low-lying
states are either |v1, ↓⟩ and |v1, ↑⟩ (spin qubit), or |v1, ↓⟩ and Fig. 7. (Top left) Structure and dimensions of the n-type face-to-face
|v2, ↓⟩ (valley qubit), using only VBG [26],[27]. The first one is device with undoped channel. (Right) A two-band k.p model
accounting for valley-orbit coupling was used to calculate single-
stable but hardly addressable, the second one has a short electron states. The Configuration Interaction (CI) method was then
coherence time but enables fast E-field manipulation. This used to calculate the two-electron states. The wave function squared
scheme may hence be helpful towards optimizing the Q-factor of the corner states at VG1=VG2=0.2V, and respectively VBG=-10V,
trade-off. 0V and +5V are shown. (Bottom left) Tunnel coupling t extracted
versus VBG from the anticrossing between the lowest single-electron
states.


15
B. Single-shot readout “helper dot” initialized in the reference spin state, connected
The DC transport-based Pauli Spin Blockade readout to the reflectometry setup for parallelism measurements (Fig.
scheme shown in section III needs to be re-initialized and 9). Since coupling to the reservoirs near each QD is no longer
repeated as fast and for as many times as it takes to obtain a necessary, this elementary tile can be extended into a linear
measurable current. This, of course, is quite incompatible with array of QDs [20],[33].
both the notion of large-scale computing and any expected
“quantum speedup”. Provided that it is mapped to a spin
event, a single charge event should be sensed practically as it Target dot Reference dot

occurs, and if possible without losing the particle carrying the ??

quantum information.
Coupling the QD to a charge detector, e.g. a Single Electron
Transistor (SET) or Quantum Point Contact (QPC) device
enables to indirectly monitor spin-dependent transport by
choosing an appropriate read point and monitoring the time-
evolution of the channel impedance (Fig. 8). This was done by Fig. 9. Principle of the RF Gate reflectometry measurement setup
ISET current measurement in [28], enabling to extract spin applied to a face-to-face device, enabling scalable, fast single-shot
relaxation times in a corner dot of a “face-to-face” device. readout of the spin qubit state under G1. Operations are performed on
Notably, the ability to tune the cross-capacitance CCROSS by the target dot while the reference dot is kept in its initial known state.
using the SOI back-Gate can lead to improving the Owing to PSB, tunnel coupling between the (1,1) and (0,2) charge
measurement speed/fidelity trade-off. states and the measurement of the associated quantum capacitance is
VD
VD only possible if the two-electron system is in the singlet
configuration. Thus, information on the target spin can be sensed by
DQ VG q VSET reflectometry.
DVpeak CCROSS
VS DVth VS V. CONCLUSION AND PERSPECTIVES
log |ID|

ISET

Among all possible implementations of quantum bits,

spins in Si offer an interesting trade-off between fast
manipulation and stability. Within this rapidly growing field,
VG VSET
each existing embodiment of the elementary building block
D QD1 D comes with its own balancing of some qualities which are all
desirable for a scalable quantum computer; i.e. fidelity,
tunability, compactness, addressability, and compatibility with
in out

CCROSS classical control electronics. We shed light on SOI devices

G1 VSET
QD1 SET which were obtained by a relatively straightforward adaptation
of a NanoWire FET process flow. Their characteristics and
geometry allow investigating various manipulation and
in readout schemes for electron and hole spin qubits, some of
S
which enabled or enhanced by the additional lever that is the
back-Gate. In the context of cryo-CMOS for control
Fig. 8. Principle of single-shot detection through a coupled charge electronics [34], this technology platform also displays a
detector. (Top) In the same way that a charge coupled to the channel strong potential stemming from the back-biasing functionality.
would shift the transfer characteristics of a MOSFET by DVth, a
Power dissipation close to the qubits being a major challenge,
single charge event occurring near an SET causes a shift of the
Coulomb peaks proportional to the cross-capacitance CCROSS.
it puts high performance, low VDD operation back within reach
(Bottom left) Charge detector coupled to a Quantum Dot. The spin- despite the conjunction of steepening subthreshold slope and
charge conversion mechanism is energy-selective readout [29], i.e. rising threshold voltages at low temperature [35]. Building
charge movement may occur for the excited spin state |E⟩, but not for from this starting ground, future efforts may be directed
the ground state |G⟩. Observing the current trace through the SET towards developing architectures with increased connectivity,
detector determines the spin state of the qubit in QD1. compatible with the implementation of Quantum Error
Correction (QEC) codes for large-scale fault-tolerant
Alternatively, the impedance shift can be observed by RF computing.
reflectometry. In principle, it consists in connecting an LC
tank circuit to the impedance to be probed, and analyzing the ACKNOWLEDGMENT
amplitude and/or phase of the reflected signal. The LC This research is performed at CEA-LETI, CEA-INAC, and
resonator may be connected directly to the dot-defining Gate CNRS-Institut Néel, Grenoble, (http://www.quantumsilicon-
[30]-[32]. In the face-to-face geometry, this technique can be grenoble.eu). The authors acknowledge support from the EU
used to sense the spin-dependent quantum capacitance H2020 program under project MOSQUITO
between the two coupled corner QDs. One can then imagine (https://www.mosquito.eu) and ANR project ANR-15-IDEX-
having the actual qubit on one side, and on the other side a 02.

16
 REFERENCES [20] S. De Franceschi et al., “SOI technology for quantum information
processing,” IEEE International Electron Devices Meeting (IEDM),
[1] http://math.nist.gov/quantum/zoo/ 2016.
[2] R. Van Meter, C. Horsman, "A Blueprint For Building a Quantum [21] M. Pioro-Ladrière et al., "Electrically driven single-electron spin
Computer", Communications of the ACM, 56, 10, 2013. resonance in a slanting Zeeman field," Nat. Phys., vol. 4, 10, pp. 776-
[3] C. G. Almudever et al., "The engineering challenges in quantum 779, 2008.
computing", IEEE Design, Automation & Test in Europe Conference & [22] A. Crippa et al., "Electrical spin driving by g-matrix modulation in spin-
Exhbition (DATE), 2017. orbit qubits," Phys. Rev. Lett., 120, 137702, 2018.
[4] D. P. DiVincenzo, "The Physical Implementation of Quantum [23] P. Harvey-Collard et al., "All-electrical universal control of a double
Computation", arXiv:quant-ph/0002077, 2000. quantum dot qubit in silicon MOS", IEEE International Electron
[5] D. Loss, D. P. DiVincenzo, "Quantum computation with quantum dots", Devices Meeting (IEDM), 2017.
Phys. Rev. A, 57, 120, 1998. [24] W. Huang et al., "Electrically driven spin qubit based on valley mixing",
[6] D. P. DiVincenzo et al., "Universal quantum computation with the Phys. Rev. B, 95, 075403, 2017.
exchange interaction", Nature, 408, 339-342, 2000. [25] B. Voisin et al., "Few-Electron Edge-State Quantum Dots in a Silicon
[7] J. Levy, "Universal Quantum Computation with Spin-1/2 Pairs and Nanowire Field-Effect Transistor", Nano Lett., 14, 4, 2014.
Heisenberg Exchange", Phys. Rev. Lett., 89, 147902, 2002. [26] L. Bourdet, Y.-M. Niquet, "All-electrical manipulation of silicon spin
[8] M. Veldhorst et al., "An addressable quantum dot qubit with fault- qubits with tunable spin-valley mixing", Phys. Rev. B, 97, 155433, 2018.
tolerant control-fidelity," Nat. Nanotechnol., 9, 981-985, 2014. [27] L. Hutin et al., "All-electrical control of a hybrid electron spin/valley
[9] M. Veldhorst et al., "A two-qubit logic gate in silicon," Nature, 526, quantum bit in SOI CMOS technology", IEEE Symposium on VLSI
410-414, 2015. Technology, 2018.
[10] J. Yoneda et al., "A quantum-dot spin qubit with coherence limited by [28] M. Urdampilleta et al., "Towards Quantum Computing in Si MOS
charge noise and fidelity higher than 99.9%", Nat. Nanotechnol., 13, Technology: Single-shot Readout of Spin states in a FDSOI Split-Gate
102-106, 2018. Device with Built-in Charge Detector", IEEE Symposium on VLSI
[11] D. M. Zajac et al., "Resonantly driven CNOT gate for electron spins", Technology, 2017.
Science, 359, 439-442, 2018. [29] M. Elzerman et al., "Single-shot read-out of an individual electron spin
[12] T. F. Watson et al., "A programmable two-qubit quantum processor in in a quantum dot", Nature, 430, 431-435, 2004.
silicon", Nature, 555, 633-637, 2018. [30] J. I. Colless et al., "Dispersive Readout of a Few-Electron Double
[13] K. Takeda et al., "A fault-tolerant addressable spin qubit in a natural Quantum Dot with Fast rf Gate Sensors", Phys. Rev. Lett., 110, 046805,
silicon quantum dot", Science Advances, 2, 8, 2016. 2013.
[14] E. Kawakami et al., "Electrical control of a long-lived spin qubit in a [31] A. C. Betz et al., "Dispersively Detected Pauli Spin-Blockade in a
Si/SiGe quantum dot," Nat. Nanotechnology, vol. 9, pp. 666-670, 2014. Silicon Nanowire Field-Effect Transistor", Nano Lett., 15, 7, 2015.
[15] J. J. Pla et al., "A single-atom electron spin qubit in silicon", Nature, [32] A. Crippa et al., "Level Spectrum and Charge Relaxation in a Silicon
489, 2012. Double Quantum Dot Probed by Dual-Gate Reflectometry", Nano Lett.,
17, 2, 2017.
[16] M. H. Devoret, R. J. Schoelkopf, "Superconducting Circuits for
Quantum Information: An Outlook", Science, 339, 6124, 2013. [33] C. Jones et al., "A logical qubit in a linear array of semiconductor
quantum dots", arXiv:1608.06335v2, 2017.
[17] R. Maurand et al., “A CMOS silicon spin qubit,” Nature Commun., vol.
7, 13575, 2016. [34] E. Charbon et al., "Cryo-CMOS Circuits and Systems for Scalable
Quantum Computing", IEEE International Solid-State Circuits
[18] L. Hutin et al., “Si CMOS platform for quantum information
Conference (ISSCC), 2017.
processing,” IEEE Symposium on VLSI Technology, 2016.
[35] H. Bohuslavskyi et al., "28nm Fully-depleted SOI technology:
[19] A. Corna et al., “Electrically driven electron spin resonance mediated by
Cryogenic control electronics for quantum computing", IEEE Silicon
spin-valley-orbit coupling in a silicon quantum dot,” npj Quantum
Nanoelectronics Workshop, 2017.
Information, vol. 4, 6, 2018.

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