Unit 1
Unit 1
programmable Logic structures Programmable Logic Arrays (PLAs), Programmable Array Logic
(PALs), Programmable Gate Arrays (PGAs), Field Programmable Gate Arrays (FPGAs)
Sequential network design with Programmable Logic Devices (PLDs) Design of sequential
networks using ROMs and PLAs Traffic light controller using PAL.
Here, the inputs of AND gates are programmable. That means each AND gate has both normal
and complemented inputs of variables. So, based on the requirement, we can program any of
those inputs. So, we can generate only the required product terms by using these AND gates.
Here, the inputs of OR gates are not of programmable type. So, the number of inputs to each OR
gate will be of fixed type. Hence, apply those required product terms to each OR gate as inputs.
Therefore, the outputs of PAL will be in the form of sum of products form.
Example
Let us implement the following Boolean functions using PAL.
A=XY+XZ′ B=XY′+YZ′
The given two functions are in sum of products form. There are two product terms present in
each Boolean function. So, we require four programmable AND gates & two fixed OR gates for
producing those two functions. The corresponding PAL is shown in the following figure.
Here, the inputs of OR gates are of fixed type. So, the necessary product terms are connected to
inputs of each OR gate. So that the OR gates produce the respective Boolean functions. The
symbol ‘.’ is used for fixed connections.
2. Programmable Logic Array PLA
PLA is a programmable logic device that has both Programmable AND array & Programmable
OR array. Hence, it is the most flexible PLD. The block diagram of PLA is shown in the
following figure.
Here, the inputs of AND gates are programmable. That means each AND gate has both normal
and complemented inputs of variables. So, based on the requirement, we can program any of
those inputs. So, we can generate only the required product terms by using these AND gates.
Here, the inputs of OR gates are also programmable. So, we can program any number of required
product terms, since all the outputs of AND gates are applied as inputs to each OR gate.
Therefore, the outputs of PAL will be in the form of sum of products form.
Example
Let us implement the following Boolean functions using PLA.
A=XY+XZ′
B=XY′+YZ+XZ′
The given two functions are in sum of products form. The number of product terms present in the
given Boolean functions A & B are two and three respectively. One product term, Z′X
is common in each function.
So, we require four programmable AND gates & two programmable OR gates for producing
those two functions. The corresponding PLA is shown in the following figure.
All these product terms are available at the inputs of each programmable OR gate. But, only
program the required product terms in order to produce the respective Boolean functions by each
OR gate. The symbol ‘X’ is used for programmable connections.