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FX505GD/GE Block Diagram

nVIDIA Channel A
DDR4 SO-DIMM 2666 MHz
N17P-G0/G1 PEG Gen3 X16
GDDR5
INTEL
D D

2GB : 32 X128M X4pcs GB4C-128 Channel B

4GB : 32 X256M X4pcs 29mm x 29mm DDR4 SO-DIMM 2666 MHz
CPU CFL-H
HDMI2.0 HDMI Re-driver IFP-C TDP 45W eDP 1.4 X4 15.6" FHD Panel
HDMI Conn.
PS8209 60/144 Hz

DMI 3.0 X4

LAN PCIe Gen1 X1(port 13) SPI SPI Flash

RJ45 Conn.
RTL-8111H 16MB

C
SPI C

USB POWER SW USB3.0(port 1) LPC EC

USB3.0 Conn. Fan X2
APL3518ABI-TRG USB2.0(port 1) ITE/IT8987E

USB POWER SW USB3.0(port 3)

USB3.0 Conn. Keyboard
APL3518ABI-TRG USB2.0(port 2)

INTEL
USB POWER SW USB2.0(port 6)
USB2.0 Conn. KB backlight
APL3518ABI-TRG
PCH CNL-H
B
HD/VGA Camera USB2.0 (port11) HM-370 I2C
Click pad
B

TDP 2.8W
M.2 TYPE 2230 PCIe X1(port 14)+USB2.0 (port14) HDA Audio codec
Phone Jack
WLAN+BT CNVi ALC233

M.2 TYPE 2280 SATA Gen3(port 1) Microphone

SSD PCIe X4(port 9,10,11,12) Single/array

2.5" SATA HDD SATA Gen3(port 4)

A
Speaker L/R A

Title : BLOCK DIAGRAM

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 1 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

I2C_Port Module DEVICE 7-bit addr

D
I2C_0 TOUCH PAD D

I2C_1

DDR Channel A(CON1601)

SMBUS DDR Channel B(CON1701)

C C

BATTERY 0X0B
SMBUS0
(EC)
B CHARGE IC BQ24780SRUYR 0X09 B

SMBUS1
(EC)
GPU

A A

Title : I2C MAP

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 2 99 1.0
Date: Sheet of
5 4 3 2 1
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5 4 3 2 1

D D

U0300D

K36 D29 EDP_TXP0

DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 45
K37 E29 EDP_TXN0
DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 45
J35 F28 EDP_TXP1
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 45
J34 E28 EDP_TXN1
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 45
H37 A29 EDP_TXP2
DDI1_TXP[2] EDP_TXP[2] EDP_TXP2 45
H36 B29 EDP_TXN2
DDI1_TXN[2] EDP_TXN[2] EDP_TXN2 45
J37 C28 EDP_TXP3
DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 45
J38 B28 EDP_TXN3
DDI1_TXN[3] EDP_TXN[3] EDP_TXN3 45
D27 C26 EDP_AUXP
DDI1_AUXP EDP_AUXP EDP_AUXP 45
E27 B26 EDP_AUXN
DDI1_AUXN EDP_AUXN EDP_AUXN 45
H34
H33 DDI2_TXP[0]
F37 DDI2_TXN[0] A33 EDP_DISP_UTIL 1 T0311
G38 DDI2_TXP[1] EDP_DISP_UTIL +VCCIO
F34 DDI2_TXN[1]
C F35 DDI2_TXP[2] D37 eDP_RCOMP 24.9Ohm 1 1% 2 R0300 C
DDI2_TXN[2] DISP_RCOMP 571391_CFL_H_PDG_Rev1p0_P.163/661
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27
PROC_AUDIO_CLK PROC_AUDIO_CLK 23
A27 G25 PROC_AUDIO_SDI 23
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PROC_AUDIO_SDO_R R0302 1 1% 2 30OHM
DDI3_AUXN PROC_AUDIO_SDO PROC_AUDIO_SDO 23

*G15FR
CL8068403359717
0101-03VP000

B B

A A

Title : DDI/EDP
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 3 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

16 M_CHA_DQ[0..63]
U0300A
M_CHA_DQ0 BR6 AG1
DDR0_DQ[0]/DDR0_DQ[0] DDR0_CKP[0]/DDR0_CKP[0] M_CHA_CLK0 16
D M_CHA_DQ1 BT6 AG2 D
DDR0_DQ[1]/DDR0_DQ[1] DDR0_CKN[0]/DDR0_CKN[0] M_CHA_CLK0# 16
M_CHA_DQ2 BP3 AK2
DDR0_DQ[2]/DDR0_DQ[2] DDR0_CKP[1]/DDR0_CKP[1] M_CHA_CLK1 16
M_CHA_DQ3 BR3 AK1
DDR0_DQ[3]/DDR0_DQ[3] DDR0_CKN[1]/DDR0_CKN[1] M_CHA_CLK1# 16
M_CHA_DQ4 BN5 AL3
M_CHA_DQ5 BP6 DDR0_DQ[4]/DDR0_DQ[4] NC/DDR0_CKP[2] AK3
M_CHA_DQ6 BP2 DDR0_DQ[5]/DDR0_DQ[5] NC/DDR0_CKN[2] AL2
M_CHA_DQ7 BN3 DDR0_DQ[6]/DDR0_DQ[6] NC/DDR0_CKP[3] AL1
M_CHA_DQ8 BL4 DDR0_DQ[7]/DDR0_DQ[7] NC/DDR0_CKN[3]
M_CHA_DQ9 BL5 DDR0_DQ[8]/DDR0_DQ[8] AT1
DDR0_DQ[9]/DDR0_DQ[9] DDR0_CKE[0]/DDR0_CKE[0] M_CHA_CKE0 16
M_CHA_DQ10 BL2 AT2
DDR0_DQ[10]/DDR0_DQ[10] DDR0_CKE[1]/DDR0_CKE[1] M_CHA_CKE1 16
M_CHA_DQ11 BM1 AT3
M_CHA_DQ12 BK4 DDR0_DQ[11]/DDR0_DQ[11] DDR0_CKE[2]/DDR0_CKE[2] AT5
M_CHA_DQ13 BK5 DDR0_DQ[12]/DDR0_DQ[12] DDR0_CKE[3]/DDR0_CKE[3]
M_CHA_DQ14 BK1 DDR0_DQ[13]/DDR0_DQ[13] AD5
DDR0_DQ[14]/DDR0_DQ[14] DDR0_CS#[0]/DDR0_CS#[0] M_CHA_CS#0 16
M_CHA_DQ15 BK2 AE2
DDR0_DQ[15]/DDR0_DQ[15] DDR0_CS#[1]/DDR0_CS#[1] M_CHA_CS#1 16
M_CHA_DQ16 BG4 AD2
M_CHA_DQ17 BG5 DDR0_DQ[16]/DDR0_DQ[32] NC/DDR0_CS#[2] AE5
M_CHA_DQ18 BF4 DDR0_DQ[17]/DDR0_DQ[33] NC/DDR0_CS#[3]
M_CHA_DQ19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3
DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0]/DDR0_ODT[0] M_CHA_ODT0 16
M_CHA_DQ20 BG2 AE4
DDR0_DQ[20]/DDR0_DQ[36] NC/DDR0_ODT[1] M_CHA_ODT1 16
M_CHA_DQ21 BG1 AE1
M_CHA_DQ22 BF1 DDR0_DQ[21]/DDR0_DQ[37] NC/DDR0_ODT[2] AD4
M_CHA_DQ23 BF2 DDR0_DQ[22]/DDR0_DQ[38] NC/DDR0_ODT[3]
M_CHA_DQ24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5
DDR0_DQ[24]/DDR0_DQ[40] DDR0_CAB[4]/DDR0_BA[0] M_CHA_BA0 16
M_CHA_DQ25 BD1 AH1
DDR0_DQ[25]/DDR0_DQ[41] DDR0_CAB[6]/DDR0_BA[1] M_CHA_BA1 16
M_CHA_DQ26 BC4 AU1
DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAA[5]/DDR0_BG[0] M_CHA_BG0 16
M_CHA_DQ27 BC5
DDR0_DQ[27]/DDR0_DQ[43] M_CHA_MAA[0..16] 16
M_CHA_DQ28 BD5 AH4 M_CHA_MAA16
M_CHA_DQ29 BD4 DDR0_DQ[28]/DDR0_DQ[44] DDR0_CAB[3]/DDR0_MA[16] AG4 M_CHA_MAA14
C M_CHA_DQ30 BC1 DDR0_DQ[29]/DDR0_DQ[45] DDR0_CAB[2]/DDR0_MA[14] AD1 M_CHA_MAA15 C
M_CHA_DQ31 BC2 DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAB[1]/DDR0_MA[15]
M_CHA_DQ32 AB1 DDR0_DQ[31]/DDR0_DQ[47] AH3 M_CHA_MAA0
M_CHA_DQ33 AB2 DDR0_DQ[32]/DDR1_DQ[0] DDR0_CAB[9]/DDR0_MA[0] AP4 M_CHA_MAA1
M_CHA_DQ34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_CAB[8]/DDR0_MA[1] AN4 M_CHA_MAA2
M_CHA_DQ35 AA5 DDR0_DQ[34]/DDR1_DQ[2] DDR0_CAB[5]/DDR0_MA[2] AP5 M_CHA_MAA3
M_CHA_DQ36 AB5 DDR0_DQ[35]/DDR1_DQ[3] NC/DDR0_MA[3] AP2 M_CHA_MAA4
M_CHA_DQ37 AB4 DDR0_DQ[36]/DDR1_DQ[4] NC/DDR0_MA[4] AP1 M_CHA_MAA5
M_CHA_DQ38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_CAA[0]/DDR0_MA[5] AP3 M_CHA_MAA6
M_CHA_DQ39 AA1 DDR0_DQ[38]/DDR1_DQ[6] DDR0_CAA[2]/DDR0_MA[6] AN1 M_CHA_MAA7
M_CHA_DQ40 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_CAA[4]/DDR0_MA[7] AN3 M_CHA_MAA8
M_CHA_DQ41 V2 DDR0_DQ[40]/DDR1_DQ[8] DDR0_CAA[3]/DDR0_MA[8] AT4 M_CHA_MAA9
M_CHA_DQ42 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_CAA[1]/DDR0_MA[9] AH2 M_CHA_MAA10
M_CHA_DQ43 U2 DDR0_DQ[42]/DDR1_DQ[10] DDR0_CAB[7]/DDR0_MA[10] AN2 M_CHA_MAA11
M_CHA_DQ44 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_CAA[7]/DDR0_MA[11] AU4 M_CHA_MAA12
M_CHA_DQ45 V4 DDR0_DQ[44]/DDR1_DQ[12] DDR0_CAA[6]/DDR0_MA[12] AE3 M_CHA_MAA13
M_CHA_DQ46 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_CAB[0]/DDR0_MA[13] AU2
DDR0_DQ[46]/DDR1_DQ[14] DDR0_CAA[9]/DDR0_BG[1] M_CHA_BG1 16
M_CHA_DQ47 U4 AU3
DDR0_DQ[47]/DDR1_DQ[15] DDR0_CAA[8]/DDR0_ACT# M_CHA_ACT# 16
M_CHA_DQ48 R2
M_CHA_DQ49 P5 DDR0_DQ[48]/DDR1_DQ[32] AG3
DDR0_DQ[49]/DDR1_DQ[33] NC/DDR0_PAR M_CHA_PAR 16
M_CHA_DQ50 R4 AU5
DDR0_DQ[50]/DDR1_DQ[34] NC/DDR0_ALERT# M_CHA_ALERT# 16
M_CHA_DQ51 P4
M_CHA_DQ52 R5 DDR0_DQ[51]/DDR1_DQ[35]
M_CHA_DQ53 P2 DDR0_DQ[52]/DDR1_DQ[36] BR5 M_CHA_DQS0#
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0]/DDR0_DQSN[0] M_CHA_DQS0# 16
M_CHA_DQ54 R1 BL3 M_CHA_DQS1#
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1]/DDR0_DQSN[1] M_CHA_DQS1# 16
M_CHA_DQ55 P1 BG3 M_CHA_DQS2#
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_CHA_DQS2# 16
M_CHA_DQ56 M4 BD3 M_CHA_DQS3#
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_CHA_DQS3# 16
M_CHA_DQ57 M1 AA3 M_CHA_DQS4#
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[4]/DDR1_DQSN[0] M_CHA_DQS4# 16
M_CHA_DQ58 L4 U3 M_CHA_DQS5#
B DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSN[5]/DDR1_DQSN[1] M_CHA_DQS5# 16 B
M_CHA_DQ59 L2 P3 M_CHA_DQS6#
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[6]/DDR1_DQSN[4] M_CHA_DQS6# 16
M_CHA_DQ60 M5 L3 M_CHA_DQS7#
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSN[7]/DDR1_DQSN[5] M_CHA_DQS7# 16
M_CHA_DQ61 M2
M_CHA_DQ62 L5 DDR0_DQ[61]/DDR1_DQ[45] BP5 M_CHA_DQS0
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0]/DDR0_DQSP[0] M_CHA_DQS0 16
M_CHA_DQ63 L1 BK3 M_CHA_DQS1
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1]/DDR0_DQSP[1] M_CHA_DQS1 16
BF3 M_CHA_DQS2
DDR0_DQSP[2]/DDR0_DQSP[4] M_CHA_DQS2 16
BA2 BC3 M_CHA_DQS3
NC/DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_CHA_DQS3 16
BA1 AB3 M_CHA_DQS4
NC/DDR0_ECC[1] DDR0_DQSP[4]/DDR1_DQSP[0] M_CHA_DQS4 16
AY4 V3 M_CHA_DQS5
NC/DDR0_ECC[2] DDR0_DQSP[5]/DDR1_DQSP[1] M_CHA_DQS5 16
AY5 R3 M_CHA_DQS6
NC/DDR0_ECC[3] DDR0_DQSP[6]/DDR1_DQSP[4] M_CHA_DQS6 16
BA5 M3 M_CHA_DQS7
NC/DDR0_ECC[4] DDR0_DQSP[7]/DDR1_DQSP[5] M_CHA_DQS7 16
BA4
AY1 NC/DDR0_ECC[5] AY3
AY2 NC/DDR0_ECC[6] DDR0_DQSP[8]/DDR0_DQSP[8] BA3
NC/DDR0_ECC[7] DDR0_DQSN[8]/DDR0_DQSN[8]
CL8068403359717

A A

Title : DDR4 A
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 4 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

17 M_CHB_DQ[0..63] +1P2V +1P2V 7,10,16,17,18,24,57,83

U0300B
M_CHB_DQ0 BT11 AM9
DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0]/DDR1_CKP[0] M_CHB_CLK0 17
M_CHB_DQ1 BR11 AN9
DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0]/DDR1_CKN[0] M_CHB_CLK0# 17
M_CHB_DQ2 BT9 AM7
DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[1]/DDR1_CKP[1] M_CHB_CLK1 17
M_CHB_DQ3 BR8 AM8
DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKN[1]/DDR1_CKN[1] M_CHB_CLK1# 17
M_CHB_DQ4 BP11 AM11
M_CHB_DQ5 BN11 DDR1_DQ[4]/DDR0_DQ[20] NC/DDR1_CKP[2] AM10
M_CHB_DQ6 BP8 DDR1_DQ[5]/DDR0_DQ[21] NC/DDR1_CKN[2] AJ10
M_CHB_DQ7 BN8 DDR1_DQ[6]/DDR0_DQ[22] NC/DDR1_CKP[3] AJ11
M_CHB_DQ8 BL12 DDR1_DQ[7]/DDR0_DQ[23] NC/DDR1_CKN[3]
M_CHB_DQ9 BL11 DDR1_DQ[8]/DDR0_DQ[24] AT8
D M_CHB_CKE0 17 D
M_CHB_DQ10 BL8 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0]/DDR1_CKE[0] AT10
DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1]/DDR1_CKE[1] M_CHB_CKE1 17
M_CHB_DQ11 BJ8 AT7
M_CHB_DQ12 BJ11 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2]/DDR1_CKE[2] AT11
M_CHB_DQ13 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]/DDR1_CKE[3]
M_CHB_DQ14 BL7 DDR1_DQ[13]/DDR0_DQ[29] AF11
DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0]/DDR1_CS#[0] M_CHB_CS#0 17
M_CHB_DQ15 BJ7 AE7
DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1]/DDR1_CS#[1] M_CHB_CS#1 17
M_CHB_DQ16 BG11 AF10
M_CHB_DQ17 BG10 DDR1_DQ[16]/DDR0_DQ[48] NC/DDR1_CS#[2] AE10
M_CHB_DQ18 BG8 DDR1_DQ[17]/DDR0_DQ[49] NC/DDR1_CS#[3]
M_CHB_DQ19 BF8 DDR1_DQ[18]/DDR0_DQ[50] AF7
DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0]/DDR1_ODT[0] M_CHB_ODT0 17
M_CHB_DQ20 BF11 AE8
DDR1_DQ[20]/DDR0_DQ[52] NC/DDR1_ODT[1] M_CHB_ODT1 17 M_CHB_MAA[0..16] 17
M_CHB_DQ21 BF10 AE9
M_CHB_DQ22 BG7 DDR1_DQ[21]/DDR0_DQ[53] NC/DDR1_ODT[2] AE11
M_CHB_DQ23 BF7 DDR1_DQ[22]/DDR0_DQ[54] NC/DDR1_ODT[3]
M_CHB_DQ24 BB11 DDR1_DQ[23]/DDR0_DQ[55] AH10 M_CHB_MAA16
M_CHB_DQ25 BC11 DDR1_DQ[24]/DDR0_DQ[56] DDR1_CAB[3]/DDR1_MA[16] AH11 M_CHB_MAA14
M_CHB_DQ26 BB8 DDR1_DQ[25]/DDR0_DQ[57] DDR1_CAB[2]/DDR1_MA[14] AF8 M_CHB_MAA15
M_CHB_DQ27 BC8 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAB[1]/DDR1_MA[15]
M_CHB_DQ28 BC10 DDR1_DQ[27]/DDR0_DQ[59] AH8
DDR1_DQ[28]/DDR0_DQ[60] DDR1_CAB[4]/DDR1_BA[0] M_CHB_BA0 17
M_CHB_DQ29 BB10 AH9
DDR1_DQ[29]/DDR0_DQ[61] DDR1_CAB[6]/DDR1_BA[1] M_CHB_BA1 17
M_CHB_DQ30 BC7 AR9
DDR1_DQ[30]/DDR0_DQ[62] DDR1_CAA[5]/DDR1_BG[0] M_CHB_BG0 17
M_CHB_DQ31 BB7
M_CHB_DQ32 AA11 DDR1_DQ[31]/DDR0_DQ[63] AJ9 M_CHB_MAA0
M_CHB_DQ33 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_CAB[9]/DDR1_MA[0] AK6 M_CHB_MAA1
M_CHB_DQ34 AC11 DDR1_DQ[33]/DDR1_DQ[17] DDR1_CAB[8]/DDR1_MA[1] AK5 M_CHB_MAA2
M_CHB_DQ35 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_CAB[5]/DDR1_MA[2] AL5 M_CHB_MAA3
M_CHB_DQ36 AA7 DDR1_DQ[35]/DDR1_DQ[19] NC/DDR1_MA[3] AL6 M_CHB_MAA4
M_CHB_DQ37 AA8 DDR1_DQ[36]/DDR1_DQ[20] NC/DDR1_MA[4] AM6 M_CHB_MAA5
C M_CHB_DQ38 AC8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_CAA[0]/DDR1_MA[5] AN7 M_CHB_MAA6 C
M_CHB_DQ39 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_CAA[2]/DDR1_MA[6] AN10 M_CHB_MAA7
DDR1_DQ[39]/DDR1_DQ[23] DDR1_CAA[4]/DDR1_MA[7]
M_CHB_DQ40 W8 AN8 M_CHB_MAA8
M_CHB_DQ41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_CAA[3]/DDR1_MA[8] AR11 M_CHB_MAA9
M_CHB_DQ42 V10 DDR1_DQ[41]/DDR1_DQ[25] DDR1_CAA[1]/DDR1_MA[9] AH7 M_CHB_MAA10
M_CHB_DQ43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_CAB[7]/DDR1_MA[10] AN11 M_CHB_MAA11
M_CHB_DQ44 W11 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAA[7]/DDR1_MA[11] AR10 M_CHB_MAA12
M_CHB_DQ45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_CAA[6]/DDR1_MA[12] AF9 M_CHB_MAA13
M_CHB_DQ46 V7 DDR1_DQ[45]/DDR1_DQ[29] DDR1_CAB[0]/DDR1_MA[13] AR7
DDR1_DQ[46]/DDR1_DQ[30] DDR1_CAA[9]/DDR1_BG[1] M_CHB_BG1 17
M_CHB_DQ47 V8 AT9
DDR1_DQ[47]/DDR1_DQ[31] DDR1_CAA[8]/DDR1_ACT# M_CHB_ACT# 17
M_CHB_DQ48 R11
M_CHB_DQ49 P11 DDR1_DQ[48]/DDR1_DQ[48] AJ7
DDR1_DQ[49]/DDR1_DQ[49] NC/DDR1_PAR M_CHB_PAR 17
M_CHB_DQ50 P7 AR8
DDR1_DQ[50]/DDR1_DQ[50] NC/DDR1_ALERT# M_CHB_ALERT# 17
M_CHB_DQ51 R8
M_CHB_DQ52 R10 DDR1_DQ[51]/DDR1_DQ[51]
M_CHB_DQ53 P10 DDR1_DQ[52]/DDR1_DQ[52] BN9 M_CHB_DQS0#
DDR1_DQ[53]/DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] M_CHB_DQS0# 17
M_CHB_DQ54 R7 BL9 M_CHB_DQS1#
DDR1_DQ[54]/DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] M_CHB_DQS1# 17
M_CHB_DQ55 P8 BG9 M_CHB_DQS2#
DDR1_DQ[55]/DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] M_CHB_DQS2# 17
M_CHB_DQ56 L11 BC9 M_CHB_DQS3#
DDR1_DQ[56]/DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_CHB_DQS3# 17
M_CHB_DQ57 M11 AC9 M_CHB_DQS4#
DDR1_DQ[57]/DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] M_CHB_DQS4# 17
M_CHB_DQ58 L7 W9 M_CHB_DQS5#
DDR1_DQ[58]/DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] M_CHB_DQS5# 17
M_CHB_DQ59 M8 R9 M_CHB_DQS6#
DDR1_DQ[59]/DDR1_DQ[59] DDR1_DQSN[6]/DDR1_DQSN[6] M_CHB_DQS6# 17
M_CHB_DQ60 L10 M9 M_CHB_DQS7#
DDR1_DQ[60]/DDR1_DQ[60] DDR1_DQSN[7]/DDR1_DQSN[7] M_CHB_DQS7# 17
M_CHB_DQ61 M10
M_CHB_DQ62 M7 DDR1_DQ[61]/DDR1_DQ[61] BP9 M_CHB_DQS0
DDR1_DQ[62]/DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] M_CHB_DQS0 17
M_CHB_DQ63 L8 BJ9 M_CHB_DQS1
DDR1_DQ[63]/DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] M_CHB_DQS1 17
BF9 M_CHB_DQS2
DDR1_DQSP[2]/DDR0_DQSP[6] M_CHB_DQS2 17
AW11 BB9 M_CHB_DQS3
B NC/DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_CHB_DQS3 17 B
AY11 AA9 M_CHB_DQS4
NC/DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] M_CHB_DQS4 17
AY8 V9 M_CHB_DQS5
NC/DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] M_CHB_DQS5 17
AW8 P9 M_CHB_DQS6
NC/DDR1_ECC[3] DDR1_DQSP[6]/DDR1_DQSP[6] M_CHB_DQS6 17
AY10 L9 M_CHB_DQS7
NC/DDR1_ECC[4] DDR1_DQSP[7]/DDR1_DQSP[7] M_CHB_DQS7 17
AW10
AY7 NC/DDR1_ECC[5] AW9
AW7 NC/DDR1_ECC[6] DDR1_DQSP[8]/DDR1_DQSP[8] AY9
NC/DDR1_ECC[7] DDR1_DQSN[8]/DDR1_DQSN[8]
571391_PDG_P.134 571483_RVP_TDK_SCH P.27
All VREF traces should be at least 20 mils wide with 20 mils spacing to other signals/planes. R2.0 modify
R0505
R0504 1 1% 2 121OHM SM_RCOMP_0 G1 BN13 DDRA_VREF_CA_R_W10S12 R2.0 modify 1 2
DDRA_VREF_CA_W10S12 16
R0506 1 1% 2 75Ohm SM_RCOMP_1 H1 DDR_RCOMP[0] DDR_VREF_CA BP13 VREF_DQ 1 T0500
DDR_RCOMP[1] DDR0_VREF_DQ R0508
R0507 2 1% 1 100Ohm SM_RCOMP_2 J2 BR13 DDRB_VREF_CA_R_W10S12 1 2 2Ohm
DDR_RCOMP[2] DDR1_VREF_DQ DDRB_VREF_CA_W10S12 17 Channel A
CL8068403359717 2Ohm
Channel B
1

C0502 C0501
0.022UF/16V 0.022UF/16V
2

571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.16/224 10% 10%

AVREF_CA_RC
BVREF_CA_RC

1
1

A R0510 A
R0511 24.9Ohm
24.9Ohm 1%
1%
2
2

Title : DDR4 B
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 5 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2

+VCCIO +VCCIO 3,7,10,94

D U0300C
PCIENB_RXP15 E25 B25 PCIEG_TXP15_C C0601 2 1 0.22UF/10V PCIEG_TXP15
PCIENB_RXN15 D25 PEG_RXP[0] PEG_TXP[0] A25 PCIEG_TXN15_C C0602 2 1 0.22UF/10V PCIEG_TXN15
PEG_RXN[0] PEG_TXN[0]
PCIENB_RXP14 E24 B24 PCIEG_TXP14_C C0603 2 1 0.22UF/10V PCIEG_TXP14
PCIENB_RXN14 F24 PEG_RXP[1] PEG_TXP[1] C24 PCIEG_TXN14_C C0604 2 1 0.22UF/10V PCIEG_TXN14
PEG_RXN[1] PEG_TXN[1]
PCIENB_RXP13 E23 B23 PCIEG_TXP13_C C0605 2 1 0.22UF/10V PCIEG_TXP13
PCIENB_RXN13 D23 PEG_RXP[2] PEG_TXP[2] A23 PCIEG_TXN13_C C0606 2 1 0.22UF/10V PCIEG_TXN13
PEG_RXN[2] PEG_TXN[2]
PCIENB_RXP12 E22 B22 PCIEG_TXP12_C C0607 2 1 0.22UF/10V PCIEG_TXP12
PCIENB_RXN12 F22 PEG_RXP[3] PEG_TXP[3] C22 PCIEG_TXN12_C C0608 2 1 0.22UF/10V PCIEG_TXN12
PEG_RXN[3] PEG_TXN[3]

70 PCIENB_RXN[15:0] PCIENB_RXP11 E21 B21 PCIEG_TXP11_C C0609 2 1 0.22UF/10V PCIEG_TXP11

PEG_RXP[4] PEG_TXP[4] PCIEG_TXN[15:0] 70
70 PCIENB_RXP[15:0] PCIENB_RXN11 D21 A21 PCIEG_TXN11_C C0610 2 1 0.22UF/10V PCIEG_TXN11
PEG_RXN[4] PEG_TXN[4] PCIEG_TXP[15:0] 70
PCIENB_RXP10 E20 B20 PCIEG_TXP10_C C0611 2 1 0.22UF/10V PCIEG_TXP10
PCIENB_RXN10 F20 PEG_RXP[5] PEG_TXP[5] C20 PCIEG_TXN10_C C0612 2 1 0.22UF/10V PCIEG_TXN10
PEG_RXN[5] PEG_TXN[5]
PCIENB_RXP9 E19 B19 PCIEG_TXP9_C C0613 2 1 0.22UF/10V PCIEG_TXP9
PCIENB_RXN9 D19 PEG_RXP[6] PEG_TXP[6] A19 PCIEG_TXN9_C C0614 2 1 0.22UF/10V PCIEG_TXN9
PEG_RXN[6] PEG_TXN[6]
PEG Lane reversal PCIENB_RXP8 E18 B18 PCIEG_TXP8_C C0615 2 1 0.22UF/10V PCIEG_TXP8
PCIENB_RXN8 F18 PEG_RXP[7] PEG_TXP[7] C18 PCIEG_TXN8_C C0616 2 1 0.22UF/10V PCIEG_TXN8
PEG_RXN[7] PEG_TXN[7]
PCIENB_RXP7 D17 A17 PCIEG_TXP7_C C0617 2 1 0.22UF/10V PCIEG_TXP7
PCIENB_RXN7 E17 PEG_RXP[8] PEG_TXP[8] B17 PCIEG_TXN7_C C0618 2 1 0.22UF/10V PCIEG_TXN7
PEG_RXN[8] PEG_TXN[8]
PCIENB_RXP6 F16 C16 PCIEG_TXP6_C C0619 2 1 0.22UF/10V PCIEG_TXP6
C PCIENB_RXN6 E16 PEG_RXP[9] PEG_TXP[9] B16 PCIEG_TXN6_C C0620 2 1 0.22UF/10V PCIEG_TXN6 C
PEG_RXN[9] PEG_TXN[9]
PCIENB_RXP5 D15 A15 PCIEG_TXP5_C C0621 2 1 0.22UF/10V PCIEG_TXP5
PCIENB_RXN5 E15 PEG_RXP[10] PEG_TXP[10] B15 PCIEG_TXN5_C C0622 2 1 0.22UF/10V PCIEG_TXN5
PEG_RXN[10] PEG_TXN[10]
PCIENB_RXP4 F14 C14 PCIEG_TXP4_C C0623 2 1 0.22UF/10V PCIEG_TXP4
PCIENB_RXN4 E14 PEG_RXP[11] PEG_TXP[11] B14 PCIEG_TXN4_C C0624 2 1 0.22UF/10V PCIEG_TXN4
PEG_RXN[11] PEG_TXN[11]
PCIENB_RXP3 D13 A13 PCIEG_TXP3_C C0625 2 1 0.22UF/10V PCIEG_TXP3
PCIENB_RXN3 E13 PEG_RXP[12] PEG_TXP[12] B13 PCIEG_TXN3_C C0626 2 1 0.22UF/10V PCIEG_TXN3
PEG_RXN[12] PEG_TXN[12]
PCIENB_RXP2 F12 C12 PCIEG_TXP2_C C0627 2 1 0.22UF/10V PCIEG_TXP2
PCIENB_RXN2 E12 PEG_RXP[13] PEG_TXP[13] B12 PCIEG_TXN2_C C0628 2 1 0.22UF/10V PCIEG_TXN2
PEG_RXN[13] PEG_TXN[13]
PCIENB_RXP1 D11 A11 PCIEG_TXP1_C C0629 2 1 0.22UF/10V PCIEG_TXP1
PCIENB_RXN1 E11 PEG_RXP[14] PEG_TXP[14] B11 PCIEG_TXN1_C C0630 2 1 0.22UF/10V PCIEG_TXN1
PEG_RXN[14] PEG_TXN[14]
PCIENB_RXP0 F10 C10 PCIEG_TXP0_C C0631 2 1 0.22UF/10V PCIEG_TXP0
PCIENB_RXN0 E10 PEG_RXP[15] PEG_TXP[15] B10 PCIEG_TXN0_C C0632 2 1 0.22UF/10V PCIEG_TXN0
PEG_RXN[15] PEG_TXN[15]
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.18/224
+VCCIO R0600 1 1% 2 24.9Ohm PEG_RCOMP G2
PEG_RCOMP
NOTE:
W/S=12/15 mil, length<400mil
D8 B8
20 DMI_RXP0 DMI_RXP[0] DMI_TXP[0] DMI_TXP0 20
E8 A8
20 DMI_RXN0 DMI_RXN[0] DMI_TXN[0] DMI_TXN0 20
B E6 C6 B
20 DMI_RXP1 DMI_RXP[1] DMI_TXP[1] DMI_TXP1 20
F6 B6
20 DMI_RXN1 DMI_RXN[1] DMI_TXN[1] DMI_TXN1 20
D5 B5
20 DMI_RXP2 DMI_RXP[2] DMI_TXP[2] DMI_TXP2 20
E5 A5
20 DMI_RXN2 DMI_RXN[2] DMI_TXN[2] DMI_TXN2 20
J8 D4
20 DMI_RXP3 DMI_RXP[3] DMI_TXP[3] DMI_TXP3 20
J9 B4
20 DMI_RXN3 DMI_RXN[3] DMI_TXN[3] DMI_TXN3 20
CL8068403359717

A A

Title : DMI/PEG
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 6 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+VCCIO +VCCIO 3,6,10,94

+1.05V +1.05V 10,24,32,57,80,91
+1.05VS +1.05VS 10,57,91

+3VSUS +3VSUS 21,22,23,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

+3VS +3VS 16,21,22,23,24,28,30,31,32,33,36,44,45,48,50,51,57,70,74,87,88,89,91,92,96

+1P2V +1P2V 10,16,17,18,24,57,83

570805_CFL_Processor_EDS_Vol1_Rev_1.4_P.123/156
U0300E The following are the general types of reserved (RSVD) signals and connection
guidelines:
+1.05V 25 CK_100M_BCK
B31 BN25 H_CFG0 RSVD : these signals should not be connected
A32 BCLKP CFG[0] BN27 RSVD_TP: these signals should be routed to a test point
25 CK_100M_BCK# BCLKN CFG[1] BN26 H_CFG2 RSVD_NCTF :these signals are non-critical to function and may be left unconnected
D35 CFG[2] BN28
D 25 CK_100M_PCIE D
C36 PCI_BCLKP CFG[3] BR20 H_CFG4
+1.05VS 25 CK_100M_PCIE# PCI_BCLKN CFG[4] U0300M
BM20 H_CFG5
E31 CFG[5] BT20 H_CFG6
25 CK_24M_BCK CLK24P CFG[6]
1

D31 BP20 H_CFG7

25 CK_24M_BCK# CLK24N CFG[7] T0702 1 RSVD_TP5 E2
R0707 R0708 BR23 RSVD_TP_5
CFG[8] T0704 1 IST_TRIG E3
100Ohm 56Ohm BR22 IST_TRIG
CFG[9] T0705 1 RSVD_TP4 E1
2

BT23 RSVD_TP_4
CFG[10] T0706 1 RSVD_TP3 D1
R0706 BT22 RSVD_TP_3
CFG[11]
2

1KOhm BM19
CFG[12] T0709 1 RSVD_TP1 BR1 BK28
BR19 RSVD_TP_1 RSVD_13
CFG[13] T0710 1 RSVD_TP2 BT2 BJ28
BP19 RSVD_TP_2 RSVD_12
CFG[14]
1

R0717 2 1 220Ohm CPU_VIDALERT# BH31 BT19

BN35
80 VIDALERT# BH32 VIDALERT# CFG[15]
80 VIDSCLK RSVD_17
BH29 VIDSCK BN23 +1.05VS
80 VIDSOUT VIDSOUT CFG[17] J24
R0727 1 1% 2 499Ohm PROCHOT#_R BR30 BP23
H24 RSVD_30
80,88 PROCHOT# PROCHOT# CFG[16] BP22
BN33 RSVD_29
DDR_VTT_CNTL_R BT13 CFG[19] BN22
BL34 RSVD_16
DDR_VTT_CNTL CFG[18]
RSVD_15

1
N29
BR27 R0777 RSVD_32
BPM#[0] R14
R0729 2 1 1KOhm BT27 51Ohm RSVD_33
+1.05V BPM#[1] AE29
BM31 RSVD_2
BPM#[2] AA14
VCCST_PG R0730 1 1% 2 60.4Ohm VCCST_PG_R H13 BT30
AP29 RSVD_1
VCCST_PWRGD BPM#[3]

2
AP14 RSVD_5
3

3 BT31 RSVD_4
D 24 CPUPWRGD PROCPWRGD A36
Q0702 BP35 BT28 OD VSS_14
24 PLTRST_CPU# RESET# PROC_TDO H_TDO 23
2N7002 BM34 BL32
22 PM_SYNC PM_SYNC PROC_TDI H_TDI 23 A37
11 R0731 1 2 20Ohm CPU_PM_DOWN BP31 BP28 VSS_15
30 THRO_CPU 22 PM_DOWN PM_DOWN PROC_TMS H_TMS 23
G R0746 1 2 13Ohm CPU_PECI BT34 BR28
H_TCK 23 H23
2 S 22 H_PECI_PCH
R0733 1 2 33Ohm J31 PECI PROC_TCK 25 H_TRIGIN PROC_TRIGIN
30 H_PECI_EC THERMTRIP# R0743 1 2 30OHM J23
2

BP30 25 H_TRIGOUT PROC_TRIGOUT

24,32 H_THMTRIP# PROC_TRST# H_TRST# 23
T0752 1 SKTOCC# BR33 BL30
SKTOCC# PROC_PREQ# H_PREQ# 23 F30
R0734 1 @ 2 0Ohm BN1 BP27OD
H_PRDY# 23 RSVD_26
PROC_SELECT# PROC_PRDY#
R0778 1 2 10KOhm CATERR# BM30
+1.05V CATERR# E30
BT25 CFG_RCOMP RSVD_25
AT13 CFG_RCOMP
571391_CFL_H_PDG_Rev1p0 ZVM#
1

T0707 1 AW13
(1) P.228/661_PM_DOWN: Rs=20 ohm MSM# B30 BL31
(2) P.226/661_PECI: Rec:33 ohm,Rpch=13 ohm 20171120 BSOD debug R0741 C30 RSVD_9 RSVD_14 AJ8
1

AU13 51Ohm RSVD_23 RSVD_3

RSVD_6 G13
C AY13 R0742 RSVD_27 C
RSVD_7
49.9Ohm G3
2

1% J3 RSVD_28 C38
RSVD_31 RSVD_24 C1
2

CL8068403359717 RSVD_22 BR2

GND BR35 RSVD_19 BP1
BR31 RSVD_21 RSVD_18 B38
BH30 RSVD_20 RSVD_10 B2
GND RSVD_11 RSVD_8

CL8068403359717
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.17/224
571391_CFL_H_PDG_Rev1p0_P.224/661
VCCST_PWRGD

+3VSUS

@
U0702 570805_CFL_Processor_EDS_Vol1_Rev_1.4_p.117/156
10Kohm PU +3V P.68
1 NC 5
VCC
2 A
24,68 DELAY_ALL_SYSTEM_PWRGD 3 Y 4 VCCST_PG
GND
1

C0702
74AUP1G07GW R1.1 modify 0.1UF/6.3V
2

GND @
+3VSUS
GND +VCCIO
1

R0722
10KOhm
3

B B
Q0705B
2

5 UM6K1N
Vgs=1.5V +VCCIO_OUT_CFG_PU R0753 1 @ 2 10KOhm H_CFG0 R0769 1 @ 2 1KOhm
4
6

Q0705A
2 UM6K1N
Vgs=1.5V
1

R0755 1 @ 2 10KOhm H_CFG2 R0771 1 2 1KOhm

For cost reduction!! SR Check!! R0757 1 @ 2 10KOhm H_CFG4 R0773 1 2 1KOhm

R0758 1 2 10KOhm H_CFG5 R0774 1 @ 2 1KOhm

+3VS +1P2V

R0759 1 2 10KOhm H_CFG6 R0775 1 @ 2 1KOhm

R0760 1 @ 2 10KOhm H_CFG7 R0776 1 @ 2 1KOhm

1

R0704 C0701
10KOhm 0.1UF/6.3V
2

@
@
U0701
2

GND 5 NC 1
VCC
A 2 DDR_VTT_CNTL_R
4 Y 3
83 DDR_VTT_CNTRL GND

Control Pin to turn on VTT R1.1 modify 74AUP1G07GW

GND
+5V

A A
1

R0719
3

3 10KOhm
D
Q0701
2N7002
2

Vgs=2.5V 11
G
S 2 3
2

C
B 1 330Ohm 1 2 R0718

E
2
Q0703
PMBS3904
Title : MISC
PEGATRON PROPRIETARY AND CONFIDENTIAL
Vbe=0.95V
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 7 99 1.0
For cost reduction!! SR Check!! Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

U0300F U0300G U0300H

A10 AK4 AW5 BJ15 BN4 F15
A12 VSS_1 VSS_78 AL10 AY12 VSS_146 VSS_220 BJ18 BN7 VSS_288 VSS_367 F17
A16 VSS_2 VSS_79 AL12 AY33 VSS_147 VSS_221 BJ22 BP12 VSS_289 VSS_368 F19
D D
A18 VSS_4 VSS_80 AL14 AY34 VSS_149 VSS_222 BJ25 BP14 VSS_290 VSS_369 F2
A20 VSS_5 VSS_81 AL33 B9 VSS_150 VSS_223 BJ29 BP18 VSS_291 VSS_370 F21
A22 VSS_6 VSS_82 AL34 BA10 VSS_153 VSS_224 BJ30 BP21 VSS_292 VSS_371 F23
A24 VSS_7 VSS_83 AL4 BA11 VSS_154 VSS_225 BJ31 BP24 VSS_293 VSS_372 F25
A26 VSS_8 VSS_84 AL7 BA12 VSS_155 VSS_226 BJ32 BP25 VSS_294 VSS_373 F27
A28 VSS_9 VSS_85 AL8 BA37 VSS_156 VSS_227 BJ33 BP26 VSS_295 VSS_374 F29
A30 VSS_10 VSS_86 AL9 BA38 VSS_157 VSS_228 BJ34 BP29 VSS_296 VSS_375 F3
A6 VSS_12 VSS_87 AM1 BA6 VSS_158 VSS_229 BJ35 BP33 VSS_297 VSS_376 F31
A9 VSS_17 VSS_88 AM12 BA7 VSS_159 VSS_230 BJ36 BP34 VSS_298 VSS_377 F36
AA12 VSS_18 VSS_89 AM2 BA8 VSS_160 VSS_231 BK13 BP7 VSS_299 VSS_378 F4
AA29 VSS_19 VSS_90 AM3 BA9 VSS_161 VSS_232 BK14 BR12 VSS_300 VSS_379 F5
AA30 VSS_20 VSS_91 AM37 BB1 VSS_162 VSS_233 BK15 BR14 VSS_301 VSS_380 F8
AB33 VSS_21 VSS_92 AM38 BB12 VSS_163 VSS_234 BK18 BR18 VSS_302 VSS_381 F9
AB34 VSS_22 VSS_93 AM4 BB2 VSS_164 VSS_235 BK22 BR21 VSS_303 VSS_382 G10
AB6 VSS_23 VSS_94 AM5 BB29 VSS_165 VSS_236 BK25 BR24 VSS_304 VSS_383 G12
AC1 VSS_24 VSS_95 AN12 BB3 VSS_166 VSS_237 BK29 BR25 VSS_305 VSS_384 G14
AC12 VSS_25 VSS_96 AN29 BB30 VSS_167 VSS_238 BK6 BR26 VSS_306 VSS_385 G16
AC2 VSS_26 VSS_97 AN30 BB4 VSS_168 VSS_239 BL13 BR29 VSS_307 VSS_386 G18
AC3 VSS_27 VSS_98 AN5 BB5 VSS_169 VSS_240 BL14 BR34 VSS_308 VSS_387 G20
AC37 VSS_28 VSS_99 AN6 BB6 VSS_170 VSS_241 BL18 BR36 VSS_309 VSS_388 G22
AC38 VSS_29 VSS_100 AP10 BC12 VSS_171 VSS_242 BL19 BR7 VSS_310 VSS_389 G23
AC4 VSS_30 VSS_101 AP11 BC13 VSS_172 VSS_243 BL20 BT12 VSS_312 VSS_390 G24
AC5 VSS_31 VSS_102 AP12 BC14 VSS_173 VSS_244 BL21 BT14 VSS_314 VSS_391 G26
AC6 VSS_32 VSS_103 AP33 BC33 VSS_174 VSS_245 BL22 BT18 VSS_315 VSS_392 G28
AD10 VSS_33 VSS_104 AP34 BC34 VSS_175 VSS_246 BL29 BT21 VSS_316 VSS_393 G4
AD11 VSS_34 VSS_105 AP8 BC6 VSS_176 VSS_247 BL33 BT24 VSS_317 VSS_394 G5
AD12 VSS_35 VSS_106 AP9 BD10 VSS_177 VSS_248 BL35 BT26 VSS_318 VSS_395 G6
AD29 VSS_36 VSS_107 AR1 BD11 VSS_178 VSS_249 BL38 BT29 VSS_319 VSS_396 G8
C AD30 VSS_37 VSS_108 AR13 BD12 VSS_179 VSS_250 BL6 BT32 VSS_320 VSS_397 G9 C
AD6 VSS_38 VSS_109 AR14 BD37 VSS_180 VSS_251 BM11 BT5 VSS_322 VSS_398 H11
AD8 VSS_39 VSS_110 AR2 BD6 VSS_181 VSS_252 BM12 C11 VSS_326 VSS_399 H12
AD9 VSS_41 VSS_111 AR29 BD7 VSS_183 VSS_253 BM13 C13 VSS_328 VSS_400 H18
AE33 VSS_42 VSS_112 AR3 BD8 VSS_184 VSS_254 BM14 C15 VSS_329 VSS_401 H22
AE34 VSS_43 VSS_113 AR30 BD9 VSS_185 VSS_255 BM18 C17 VSS_330 VSS_402 H25
AE6 VSS_44 VSS_114 AR31 BE1 VSS_186 VSS_256 BM2 C19 VSS_331 VSS_403 H32
AF1 VSS_45 VSS_115 AR32 BE2 VSS_187 VSS_257 BM21 C21 VSS_332 VSS_404 H35
AF12 VSS_46 VSS_116 AR33 BE29 VSS_188 VSS_258 BM22 C23 VSS_334 VSS_405 J10
AF13 VSS_47 VSS_117 AR34 BE3 VSS_189 VSS_259 BM23 C25 VSS_335 VSS_406 J18
AF14 VSS_48 VSS_118 AR35 BE30 VSS_190 VSS_260 BM24 C27 VSS_336 VSS_407 J22
AF2 VSS_49 VSS_119 AR36 BE4 VSS_191 VSS_261 BM25 C29 VSS_337 VSS_408 J25
AF3 VSS_50 VSS_120 AR37 BE5 VSS_192 VSS_262 BM26 C31 VSS_338 VSS_409 J32
AF4 VSS_51 VSS_121 AR38 BE6 VSS_193 VSS_263 BM27 C37 VSS_339 VSS_410 J33
AG10 VSS_52 VSS_122 AR4 BF12 VSS_194 VSS_264 BM28 C5 VSS_340 VSS_411 J36
AG11 VSS_53 VSS_123 AR5 BF33 VSS_195 VSS_265 BM29 C8 VSS_341 VSS_412 J4
AG13 VSS_54 VSS_124 AT29 BF34 VSS_196 VSS_266 BM3 C9 VSS_342 VSS_413 J7
AG29 VSS_55 VSS_125 AT30 BF6 VSS_197 VSS_267 BM33 D10 VSS_343 VSS_414 K1
AG30 VSS_56 VSS_126 AT6 BG12 VSS_198 VSS_268 BM35 D12 VSS_344 VSS_415 K10
AG6 VSS_57 VSS_127 AU10 BG13 VSS_199 VSS_269 BM38 D14 VSS_345 VSS_416 K11
AG7 VSS_58 VSS_128 AU11 BG14 VSS_200 VSS_270 BM5 D16 VSS_346 VSS_417 K2
AG8 VSS_59 VSS_129 AU12 BG37 VSS_201 VSS_271 BM6 D18 VSS_347 VSS_418 K3
AH12 VSS_60 VSS_130 AU33 BG38 VSS_202 VSS_272 BM7 D20 VSS_348 VSS_419 K38
AH33 VSS_61 VSS_131 AU34 BG6 VSS_203 VSS_273 BM8 D22 VSS_349 VSS_420 K4
AH34 VSS_62 VSS_132 AU6 BH1 VSS_204 VSS_274 BM9 D24 VSS_350 VSS_421 K5
AH35 VSS_63 VSS_133 AU7 BH10 VSS_205 VSS_275 BN12 D26 VSS_351 VSS_422 K7
AH36 VSS_64 VSS_134 AU8 BH11 VSS_206 VSS_276 BN14 D28 VSS_352 VSS_423 K8
AH6 VSS_65 VSS_135 AU9 BH12 VSS_207 VSS_277 BN18 D3 VSS_353 VSS_424 K9
AJ1 VSS_66 VSS_136 AV37 BH14 VSS_208 VSS_278 BN19 D30 VSS_354 VSS_425 L29
B AJ13 VSS_67 VSS_137 AV38 BH2 VSS_209 VSS_279 BN2 D33 VSS_355 VSS_426 L30 B
AJ2 VSS_68 VSS_138 AW1 BH3 VSS_210 VSS_280 BN20 D6 VSS_356 VSS_427 L33
AJ3 VSS_69 VSS_139 AW12 BH4 VSS_211 VSS_281 BN21 D9 VSS_358 VSS_428 L34
AJ37 VSS_70 VSS_140 AW2 BH5 VSS_212 VSS_282 BN24 E34 VSS_359 VSS_429 M12
AJ38 VSS_71 VSS_141 AW29 BH6 VSS_213 VSS_283 BN29 E35 VSS_360 VSS_430 M13
AJ4 VSS_72 VSS_142 AW3 BH7 VSS_214 VSS_284 BN30 E38 VSS_361 VSS_431 N10
AJ5 VSS_73 VSS_143 AW30 BH8 VSS_215 VSS_285 BN31 E4 VSS_362 VSS_435 N11
AJ6 VSS_74 VSS_144 AW4 BH9 VSS_216 VSS_286 BN34 E9 VSS_363 VSS_436 N12
W4 VSS_75 VSS_145 U6 T2 VSS_217 VSS_287 P38 N3 VSS_364 VSS_437 N2
W5 VSS_483 VSS_472 V12 T3 VSS_461 VSS_450 P6 N33 VSS_439 VSS_438 BT8
Y10 VSS_484 VSS_473 V29 T33 VSS_462 VSS_451 R12 N34 VSS_440 VSS_327 BR9
Y11 VSS_485 VSS_474 V30 T34 VSS_463 VSS_452 R29 N4 VSS_441 VSS_313
Y13 VSS_486 VSS_475 A14 T4 VSS_464 VSS_453 AY14 N5 VSS_442 A3
Y14 VSS_487 VSS_3 AD7 T5 VSS_465 VSS_148 BD38 N6 VSS_443 VSS_11 A34
Y37 VSS_488 VSS_40 V6 T7 VSS_466 VSS_182 R30 N7 VSS_444 VSS_13 A4
Y38 VSS_489 VSS_476 W1 T8 VSS_467 VSS_454 T1 N8 VSS_445 VSS_16 B3
Y7 VSS_490 VSS_477 W12 T9 VSS_468 VSS_455 T10 N9 VSS_446 VSS_151 B37
Y8 VSS_491 VSS_478 W2 U37 VSS_469 VSS_456 T11 P12 VSS_447 VSS_152 BR38
Y9 VSS_492 VSS_479 W3 U38 VSS_470 VSS_457 T12 P37 VSS_448 VSS_311 BT3
AK29 VSS_493 VSS_480 W33 BJ12 VSS_471 VSS_458 T13 M14 VSS_449 VSS_321 BT35
AK30 VSS_76 VSS_481 W34 BJ14 VSS_218 VSS_459 T14 M6 VSS_432 VSS_323 BT36
VSS_77 VSS_482 VSS_219 VSS_460 N1 VSS_433 VSS_324 BT4
CL8068403359717 CL8068403359717 F11 VSS_434 VSS_325 C2
F13 VSS_365 VSS_333 D38
VSS_366 VSS_357
CL8068403359717

A GND A
GND GND GND GND GND

Title : VSS
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 8 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+VCORE +VCORE 80
+VCCGT +VCCGT 80

+VCCGT

+VCCGT U0300K
AT14 BD35
+VCORE AT31 VCCGT_1 VCCGT_80 BD36
+VCORE +VCORE VCCGT_2 VCCGT_81
+VCORE AT32 BE31
AT33 VCCGT_3 VCCGT_82 BE32
D U0300J VCCGT_4 VCCGT_83
U0300I AT34 BE33
AA13 AH13 AT35 VCCGT_5 VCCGT_84 BE34
VCC_1 VCC_64 K14 W35 VCCGT_6 VCCGT_85
AA31 AH14 VCC_125 VCC_188 AT36 BE35
VCC_2 VCC_65 L13 W36 VCCGT_7 VCCGT_86
AA32 AH29 VCC_126 VCC_189 AT37 BE36
VCC_3 VCC_66 L14 W37 VCCGT_8 VCCGT_87
AA33
AA34 VCC_4
VCC_5
VCC_67
VCC_68
AH30
AH31 128A N13
N14
VCC_127
VCC_128
VCC_190
VCC_191
W38
Y29
AT38
AU14 VCCGT_9
VCCGT_10
VCCGT_88
VCCGT_89
BE37
BE38
AA35 AH32 VCC_129 VCC_192 AU29 BF13
VCC_6 VCC_69 N30 Y30 VCCGT_11 VCCGT_90
AA36 AJ14 VCC_130 VCC_193 AU30 BF14
VCC_7 VCC_70 N31 Y31 VCCGT_12 VCCGT_91
AA37 AJ29 VCC_131 VCC_194 AU31 BF29
AA38
AB29
VCC_8
VCC_9
VCC_71
VCC_72
AJ30
AJ31
N32
N35 VCC_132
VCC_133
VCC_195
VCC_196
Y32
Y33
AU32
AU35
VCCGT_13
VCCGT_14
VCCGT_92
VCCGT_93
BF30
BF31
32A
VCC_10 VCC_73 N36 Y34 VCCGT_15 VCCGT_94
AB30 AJ32 VCC_134 VCC_197 AU36 BF32
VCC_11 VCC_74 N37 Y35 VCCGT_16 VCCGT_95
AB31 AJ33 VCC_135 VCC_198 AU37 BF35
VCC_12 VCC_75 N38 Y36 VCCGT_17 VCCGT_96
AB32 AJ34 VCC_136 VCC_199 AU38 BF36
VCC_13 VCC_76 P13 VCCGT_18 VCCGT_97
AB35 AJ35 VCC_137 AV29 BF37
VCC_14 VCC_77 P14 VCCGT_19 VCCGT_98
AB36 AJ36 VCC_138 AV30 BF38
VCC_15 VCC_78 P29 VCCGT_20 VCCGT_99
AB37 AK31 VCC_139 AV31 BG29
VCC_16 VCC_79 P30 VCCGT_21 VCCGT_100
AB38 AK32 VCC_140 AV32 BG30
VCC_17 VCC_80 P31 VCCGT_22 VCCGT_101
AC13 AK33 VCC_141 AV33 BG31
VCC_18 VCC_81 P32 VCCGT_23 VCCGT_102
AC14 AK34 VCC_142 AV34 BG32
VCC_19 VCC_82 P33 VCCGT_24 VCCGT_103
AC29 AK35 VCC_143 AV35 BG33
VCC_20 VCC_83 P34 VCCGT_25 VCCGT_104
AC30 AK36 VCC_144 AV36 BG34
VCC_21 VCC_84 P35 VCCGT_26 VCCGT_105
AC31 AK37 VCC_145 AW14 BG35
VCC_22 VCC_85 P36 VCCGT_27 VCCGT_106
AC32 AK38 VCC_146 AW31 BG36
VCC_23 VCC_86 R13 VCCGT_28 VCCGT_107
AC33 AL13 VCC_147 AW32 BH33
VCC_24 VCC_87 R31 VCCGT_29 VCCGT_108
AC34 AL29 VCC_148 AW33 BH34
VCC_25 VCC_88 R32 VCCGT_30 VCCGT_109
AC35 AL30 VCC_149 AW34 BH35
VCC_26 VCC_89 R33 VCCGT_31 VCCGT_110
AC36 AL31 VCC_150 AW35 BH36
VCC_27 VCC_90 R34 VCCGT_32 VCCGT_111
AD13 AL32 VCC_151 AW36 BH37
C VCC_28 VCC_91 R35 VCCGT_33 VCCGT_112 C
AD14 AL35 VCC_152 AW37 BH38
VCC_29 VCC_92 R36 VCCGT_34 VCCGT_113
AD31 AL36 VCC_153 AW38 BJ16
VCC_30 VCC_93 R37 VCCGT_35 VCCGT_114
AD32 AL37 VCC_154 AY29 BJ17
VCC_31 VCC_94 R38 VCCGT_36 VCCGT_115
AD33 AL38 VCC_155 AY30 BJ19
VCC_32 VCC_95 T29 VCCGT_37 VCCGT_116
AD34 AM13 VCC_156 AY31 BJ20
VCC_33 VCC_96 T30 VCCGT_38 VCCGT_117
AD35 AM14 VCC_157 AY32 BJ21
VCC_34 VCC_97 T31 VCCGT_39 VCCGT_118
AD36 AM29 VCC_158 AY35 BJ23
VCC_35 VCC_98 T32 VCCGT_40 VCCGT_119
AD37 AM30 VCC_159 AY36 BJ24
VCC_36 VCC_99 T35 VCCGT_41 VCCGT_120
AD38 AM31 VCC_160 AY37 BJ26
VCC_37 VCC_100 T36 VCCGT_42 VCCGT_121
AE13 AM32 VCC_161 AY38 BJ27
VCC_38 VCC_101 T37 VCCGT_43 VCCGT_122
AE14 AM33 VCC_162 BA13 BJ37
VCC_39 VCC_102 T38 VCCGT_44 VCCGT_123
AE30 AM34 VCC_163 BA14 BJ38
VCC_40 VCC_103 U29 VCCGT_45 VCCGT_124
AE31 AM35 VCC_164 BA29 BK16
VCC_41 VCC_104 U30 VCCGT_46 VCCGT_125
AE32 AM36 VCC_165 BA30 BK17
VCC_42 VCC_105 U31 VCCGT_47 VCCGT_126
AE35 AN13 VCC_166 BA31 BK19
VCC_43 VCC_106 U32 VCCGT_48 VCCGT_127
AE36 AN14 VCC_167 BA32 BK20
VCC_44 VCC_107 U33 VCCGT_49 VCCGT_128
AE37 AN31 VCC_168 BA33 BK21
VCC_45 VCC_108 U34 VCCGT_50 VCCGT_129
AE38 AN32 VCC_169 BA34 BK23
VCC_46 VCC_109 U35 VCCGT_51 VCCGT_130
AF29 AN33 VCC_170 BA35 BK24
VCC_47 VCC_110 U36 VCCGT_52 VCCGT_131
AF30 AN34 VCC_171 BA36 BK26
VCC_48 VCC_111 V13 VCCGT_53 VCCGT_132
AF31 AN35 VCC_172 BB13 BK27
VCC_49 VCC_112 V14 VCCGT_54 VCCGT_133
AF32 AN36 VCC_173 BB14 BL15
VCC_50 VCC_113 V31 VCCGT_55 VCCGT_134
AF33 AN37 VCC_174 BB31 BL16
VCC_51 VCC_114 V32 VCCGT_56 VCCGT_135
AF34 AN38 VCC_175 BB32 BL17
VCC_52 VCC_115 V33 VCCGT_57 VCCGT_136
AF35 AP13 VCC_176 BB33 BL23
VCC_53 VCC_116 V34 VCCGT_58 VCCGT_137
AF36 AP30 VCC_177 BB34 BL24
VCC_54 VCC_117 V35 VCCGT_59 VCCGT_138
AF37 AP31 VCC_178 BB35 BL25
VCC_55 VCC_118 V36 VCCGT_60 VCCGT_139
AF38 AP32 VCC_179 BB36 BL26
VCC_56 VCC_119 V37 VCCGT_61 VCCGT_140
B AG14 AP35 VCC_180 BB37 BL27 B
VCC_57 VCC_120 V38 VCCGT_62 VCCGT_141
AG31 AP36 VCC_181 BB38 BL28
VCC_58 VCC_121 W13 VCCGT_63 VCCGT_142
AG32 AP37 VCC_182 BC29 BL36
VCC_59 VCC_122 W14 VCCGT_64 VCCGT_143
AG33 AP38 VCC_183 BC30 BL37
VCC_60 VCC_123 W29 VCCGT_65 VCCGT_144
AG34 K13 VCC_184 BC31 BM15
VCC_61 VCC_124 W30 VCCGT_66 VCCGT_145
AG35 VCC_185 BC32 BM16
VCC_62 W31 VCCGT_67 VCCGT_146
AG36 VCC_186 BC35 BM17
VCC_63 W32 VCCGT_68 VCCGT_147
VCC_187 BC36 BM36
BC37 VCCGT_69 VCCGT_148 BM37
CL8068403359717 VCCGT_70 VCCGT_149
BC38 BN15
AG37 BD13 VCCGT_71 VCCGT_150 BN16
VCC_SENSE VCORE_VCCSENSE 80 VCCGT_72 VCCGT_151
AG38 VCORE_VSSSENSE 80 BD14 BN17
VSS_SENSE BD29 VCCGT_73 VCCGT_152 BN36
CL8068403359717 BD30 VCCGT_74 VCCGT_153 BN37
BD31 VCCGT_75 VCCGT_154 BN38
BD32 VCCGT_76 VCCGT_155 BP15
BD33 VCCGT_77 VCCGT_156 BP16
BD34 VCCGT_78 VCCGT_157 BP17
BP37 VCCGT_79 VCCGT_158 BR37
BP38 VCCGT_159 VCCGT_164 BT15
BR15 VCCGT_160 VCCGT_165 BT16
BR16 VCCGT_161 VCCGT_166 BT17
BR17 VCCGT_162 VCCGT_167 BT37
VCCGT_163 VCCGT_168

AH37 VCCGT_VSSSENSE 80
VSSGT_SENSE AH38
VCCGT_SENSE VCCGT_VCCSENSE 80
CL8068403359717
A A

Title : CPU POWER1

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 9 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+VCCSA +VCCSA 80

+VCCIO +VCCIO 3,6,7,94

+VCCSA +1P2V_CPU

+1P2V +1P2V 7,16,17,18,24,57,83

U0300L

11.1A J30
K29 VCCSA_1
VCCSA_2
VDDQ_1
VDDQ_2
AA6
AE12 3.3A +1.05V
+1.05VS
+1.05V
+1.05VS
7,24,32,57,80,91
7,57,91
K30 AF5
K31 VCCSA_3 VDDQ_3 AF6
D D
K32 VCCSA_4 VDDQ_4 AG5
K33 VCCSA_5 VDDQ_5 AG9
K34 VCCSA_6 VDDQ_6 AJ12
K35 VCCSA_7 VDDQ_7 AL11
L31 VCCSA_8 VDDQ_8 AP6
L32 VCCSA_9 VDDQ_9 AP7
L35 VCCSA_10 VDDQ_10 AR12
L36 VCCSA_11 VDDQ_11 AR6
L37 VCCSA_12 VDDQ_12 AT12
L38 VCCSA_13 VDDQ_13 AW6
M29 VCCSA_14 VDDQ_14 AY6
M30 VCCSA_15 VDDQ_15 J5
M31 VCCSA_16 VDDQ_16 J6
M32 VCCSA_17 VDDQ_17 K12
M33 VCCSA_18 VDDQ_18 K6
M34 VCCSA_19 VDDQ_19 L12
M35 VCCSA_20 VDDQ_20 L6
M36 VCCSA_21 VDDQ_21 R6
VCCSA_22 VDDQ_22 T6
+VCCIO VDDQ_23 W6
VDDQ_24 Y12
AG12 VDDQ_25 +VccPLL_OC
G15 VCCIO_1
VCCIO_2

6.4A
G17
G19 VCCIO_3
VCCIO_4 VCCPLL_OC_1
BH13 130mA
G21 BJ13
VCCIO_5 VCCPLL_OC_2 C1001 C1002 C1025 C1026
1

1
H15 G11 +1.05V
VCCIO_6 VCCPLL_OC_3 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V
C
H16
H17 VCCIO_7
VCCIO_8 VCCST
H30 60mA 0201
X5R/+/-10%
0201
X5R/+/-10%
0201
X5R/+/-10%
0201
X5R/+/-10%
C
2

2
H19
VCCIO_9 20mA +1.05VS
C1003 C1030 @ @
1

H20 H29
VCCIO_10 VCCSTG_2 1uF/6.3V 1uF/6.3V
H21
VCCIO_11 C1004 C1005 C1028 C1029 0201 0201
1

H26 G30
VCCIO_12 VCCSTG_1 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V X5R/+/-10% X5R/+/-10%
2

H27 +1.05V
VCCIO_13 0201 0201 0201 0201 @
J15
VCCIO_14 VCCPLL_1
H28
150mA X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%
2

J16 J28
VCCIO_15 VCCPLL_2 @ @
J17
VCCIO_16 C1006 C1027
1

J19
VCCIO_17 1uF/6.3V 1uF/6.3V
J20 M38 VCCSA_VCCSENSE 80
VCCIO_18 VCCSA_SENSE 0201 0201
J21 M37 VCCSA_VSSSENSE 80
VCCIO_19 VSSSA_SENSE X5R/+/-10% X5R/+/-10%
2

J26
VCCIO_20 @
J27 H14 R1001 1 2 100Ohm +VCCIO
VCCIO_21 VCCIO_SENSE J14 @
VSSIO_SENSE
2

CL8068403359717 R1002
@ 0Ohm
1

B +1P2V_CPU B

+1P2V +1P2V_CPU
1

C1007 C1008 C1009 C1010 C1011 C1012 C1013 C1014 C1015 C1016 C1017
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

+1P2V_CPU +VCCIO
1

+1P2V +VccPLL_OC
C1018 C1019 C1020 C1021 C1022 C1023 C1024
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

SP1018 1 2
A A

SHORT PAD R0402

Title : CPU POWER2

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 10 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+1P2V +1P2V 7,10,17,18,24,57,83

+1P2V_DUAL +1P2V_DUAL 7,10,17,18,24,57,83
+VTT_DDR +VTT_DDR 17,18,57,83
+2P5VPP +2P5VPP 17,18,57,95
+3VS +3VS 7,21,22,23,24,28,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96

DDR4 SO-DIMM 5.2H REV

+1P2V +1P2V_DUAL

4 M_CHA_MAA[0..16] M_CHA_DQ[0..63] 4
CON1601A
D
246 M_CHA_DQ61
M_CHA_MAA16 152 DQ63 245 M_CHA_DQ59
RAS_n/A16 DQ62

20180212 SWAP
M_CHA_MAA15 156 233 M_CHA_DQ60
M_CHA_MAA14 151 CAS_n/A15 DQ61 232 M_CHA_DQ62
M_CHA_MAA13 158 WE_n/A14 DQ60 250 M_CHA_DQ57
+3VS SP1601 1 2 0Ohm
DDR4_EEROM_PWR 119 A13 DQ59 249
M_CHA_MAA12 M_CHA_DQ63
M_CHA_MAA11 120 A12 DQ58 236 M_CHA_DQ58
SHORT PIN 0402 M_CHA_MAA10 146 A11 DQ57 237 M_CHA_DQ56
M_CHA_MAA9 121 A10/AP DQ56 225 M_CHA_DQ49
M_CHA_MAA8 125 A9 DQ55 224 M_CHA_DQ51
M_CHA_MAA7 122 A8 DQ54 212 M_CHA_DQ54
M_CHA_MAA6 127 A7 DQ53 211 M_CHA_DQ52
M_CHA_MAA5 126 A6 DQ52 229 M_CHA_DQ53
M_CHA_MAA4 128 A5 DQ51 228 M_CHA_DQ55
M_CHA_MAA3 131 A4 DQ50 215 M_CHA_DQ48
M_CHA_MAA2 132 A3 DQ49 216 M_CHA_DQ50
A2 DQ48 +1P2V_DUAL
M_CHA_MAA1 133 204 M_CHA_DQ47 CON1601B
M_CHA_MAA0 144 A1 DQ47 203 M_CHA_DQ46
A0 DQ46 190 M_CHA_DQ45
DQ45 111
191 M_CHA_DQ41 VDD1
DQ44 112
145 208 M_CHA_DQ43 VDD2
4 M_CHA_BA1 BA1 DQ43 117
150 207 M_CHA_DQ40 VDD3 +VTT_DDR
4 M_CHA_BA0 BA0 DQ42 118
194 M_CHA_DQ42 VDD4
DQ41 123
195 M_CHA_DQ44 VDD5
DQ40 124 258
113 182 M_CHA_DQ32 VDD6 VTT
4 M_CHA_BG1 BG1 DQ39 129
115 183 M_CHA_DQ39 VDD7

1
4 M_CHA_BG0 BG0 DQ38 130
169 M_CHA_DQ37 VDD8
DQ37 135 C1600
138 170 M_CHA_DQ34 VDD9 +2P5VPP
4 M_CHA_CLK1 CK1_t/NF DQ36 136 10PF/50V
140 186 M_CHA_DQ33 VDD10

2
4 M_CHA_CLK1# CK1_c/NF DQ35 141
137 187 M_CHA_DQ38 VDD11
4 M_CHA_CLK0 CK0_t DQ34 142 259
139 173 M_CHA_DQ35 VDD12 VPP2
4 M_CHA_CLK0# CK0_c DQ33 147 257
174 M_CHA_DQ36 VDD13 VPP1
DQ32 148
80 M_CHA_DQ31 VDD14
DQ31 153
79 M_CHA_DQ25 VDD15
DQ30 154
67 M_CHA_DQ27 VDD16
DQ29 159
T1600 1 TP_CHA_XMM3_S3 165 66 M_CHA_DQ28 VDD17
C1/CS3_n/NC DQ28 160
T1602 1 TP_CHA_XMM3_S2 162 84 M_CHA_DQ30 VDD18
C0/CS2_n/NC DQ27 163
157 83 M_CHA_DQ24 VDD19
4 M_CHA_CS#1 149 CS1_n DQ26 71 M_CHA_DQ26
4 M_CHA_CS#0 CS0_n DQ25 70 M_CHA_DQ29
DQ24 99
C 59 M_CHA_DQ22 VSS48 C
DQ23 102
110 58 M_CHA_DQ20 VSS49
4 M_CHA_CKE1 CKE1 DQ22 103
109 45 M_CHA_DQ16 VSS50
4 M_CHA_CKE0 CKE0 DQ21 106
46 M_CHA_DQ19 VSS51
DQ20 107
161 63 M_CHA_DQ23 VSS52
4 M_CHA_ODT1 ODT1 DQ19 167
155 62 M_CHA_DQ21 VSS53
4 M_CHA_ODT0 ODT0 DQ18 168
49 M_CHA_DQ17 VSS54
DQ17 171
50 M_CHA_DQ18 VSS55
DQ16 172
104 37 M_CHA_DQ11 VSS56
CB7/NC DQ15 175
100 38 M_CHA_DQ15 VSS57
+1P2V_DUAL CB6/NC DQ14 1 176
87 25 M_CHA_DQ13 VSS1 VSS58
CB5/NC DQ13 2 180
88 24 M_CHA_DQ8 VSS2 VSS59
CB4/NC DQ12 5 181
105 42 M_CHA_DQ14 VSS3 VSS60
CB3/NC DQ11 6 184
1

101 41 M_CHA_DQ10 VSS4 VSS61

CB2/NC DQ10 9 185
R1600 91 29 M_CHA_DQ12 VSS5 VSS62
CB1/NC DQ9 10 188
240Ohm 92 28 M_CHA_DQ9 VSS6 VSS63
CB0/NC DQ8 14 189
17 M_CHA_DQ7 VSS7 VSS64
DQ7 15 192
143 16 M_CHA_DQ2 VSS8 VSS65
4 M_CHA_PAR PARITY DQ6 18 193
2

DDR4_EEROM_PWR 108 3 M_CHA_DQ1 VSS9 VSS66

17,24 DRAMRST_R# RESET_n DQ5 19 196
CHA_DIMM0_EVENT# 134 4 M_CHA_DQ5 VSS10 VSS67
EVENT_n/NF DQ4 22 197
116 21 M_CHA_DQ6 VSS11 VSS68
4 M_CHA_ALERT# ALERT_n DQ3 23 201
114 20 M_CHA_DQ3 VSS12 VSS69
C1619 4 M_CHA_ACT# ACT_n DQ2 26 202
1

7 M_CHA_DQ4 VSS13 VSS70

10PF/50V DQ1 27 205
1

C1602 8 M_CHA_DQ0 VSS14 VSS71

@ DQ0 30 206
R1604 R1605 R1606 DDR4_EEROM_PWR R1.1 modify 1000PF/50V 31 VSS15 VSS72 209
2

0Ohm 0Ohm 0Ohm 10% VSS16 VSS73

EMI 35 210
2

@ @ @ +1P2V_DUAL 36 VSS17 VSS74 213

255 VSS18 VSS75
VDDSPD 39 214
2

V_SA2_DIMM0_CHA 166 VSS19 VSS76

SA2 40 217
V_SA1_DIMM0_CHA 260 VSS20 VSS77
SA1 43 218
V_SA0_DIMM0_CHA 256 96 VSS21 VSS78
SA0 DM8_n/DBI_n/NC 44 222
47 VSS22 VSS79 223
1

241 VSS23 VSS80

1

DM7_n/DBI7_n 48 226
1

C1606 51 VSS24 VSS81 227

C1604 C1605 220
R1613 R1614 R1615 10PF/50V 52 VSS25 VSS82 230
2.2UF/6.3V 0.1UF/6.3V DM6_n/DBI6_n
2

0Ohm 0Ohm 0Ohm @ VSS26 VSS83

2

56 231
1

199 VSS27 VSS84

DM5_n/DBI5_n 57 234
C1617 60 VSS28 VSS85 235
2

178 10PF/50V VSS29 VSS86

DM4_n/DBI4_n 61 238
2

@ 64 VSS30 VSS87 239

254 75 VSS31 VSS88
17,28,48 SMB_DAT_DIMM SDA DM3_n/DBI3_n 65 243
B 253 VSS32 VSS89 B
17,28,48 SMB_CLK_DIMM SCL 68 244
54 VSS33 VSS90
DM2_n/DBI2_n 69 247
72 VSS34 VSS91 248
33 VSS35 VSS92
DM1_n/DBI_n 73 251
77 VSS36 VSS93 252
12 VSS37 VSS94
DM0_n/DBI0_n 78
164 VSS38
5 DDRA_VREF_CA_W10S12 VREFCA 81
97 VSS39
DQS8_t 82
95 VSS40
DQS8_c 85
242 VSS41
DQS7_t M_CHA_DQS7 4 86 264
1

@ 240 VSS42 SIDE2

DQS7_c M_CHA_DQS7# 4 89
+1P2V_DUAL C1612 C1613 221 VSS43
DQS6_t M_CHA_DQS6 4 90 263
2.2UF/6.3V 0.1UF/6.3V 219 VSS44 SIDE1
DQS6_c M_CHA_DQS6# 4 93
2

200 VSS45
DQS5_t M_CHA_DQS5 4 94 262
198 VSS46 NP_NC2
DQS5_c M_CHA_DQS5# 4 98
179 VSS47
DQS4_t M_CHA_DQS4 4 261
177 NP_NC1
1

DQS4_c M_CHA_DQS4# 4
1

76
R1610 DQS3_t 74 M_CHA_DQS3 4
C1618 C1610
1KOhm DQS3_c 55 M_CHA_DQS3# 4
10PF/50V 0.1UF/6.3V
1% DQS2_t M_CHA_DQS2 4 DDR4_SO_260P
2

53
@ DQS2_c 34 M_CHA_DQS2# 4 12T02GBRM005
2

DDRA_VREF_CA_R R1620 1 2 0Ohm DQS1_t M_CHA_DQS1 4

32
DQS1_c 13 M_CHA_DQS1# 4
1

DQS0_t 11 M_CHA_DQS0 4
SHORT PIN 0402
R1612 DQS0_c M_CHA_DQS0# 4
1KOhm
1%
DDR4_SO_260P
2

12T02GBRM005

A A

Title : DDR4 SO-DIMM0

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 16 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+1P2V +1P2V 7,10,16,18,24,57,83

+1P2V_DUAL +1P2V_DUAL 7,10,16,18,24,57,83
+VTT_DDR +VTT_DDR 16,18,57,83
+2P5VPP +2P5VPP 16,18,57,95
+3VS +3VS 7,16,21,22,23,24,28,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96

DDR4 SO-DIMM 5.2H STD

5 M_CHB_MAA[0..16] M_CHB_DQ[0..63] 5
CON1701A
D D

246 M_CHB_DQ60
M_CHB_MAA16 152 DQ63 245 M_CHB_DQ58
M_CHB_MAA15 156 RAS_n/A16 DQ62 233 M_CHB_DQ61
M_CHB_MAA14 151 CAS_n/A15 DQ61 232 M_CHB_DQ59
M_CHB_MAA13 158 WE_n/A14 DQ60 250 M_CHB_DQ56
M_CHB_MAA12 119 A13 DQ59 249 M_CHB_DQ63
M_CHB_MAA11 120 A12 DQ58 236 M_CHB_DQ62
M_CHB_MAA10 146 A11 DQ57 237 M_CHB_DQ57
M_CHB_MAA9 121 A10/AP DQ56 225 M_CHB_DQ53
M_CHB_MAA8 125 A9 DQ55 224 M_CHB_DQ50
M_CHB_MAA7 122 A8 DQ54 212 M_CHB_DQ51
M_CHB_MAA6 127 A7 DQ53 211 M_CHB_DQ52
M_CHB_MAA5 126 A6 DQ52 229 M_CHB_DQ49
M_CHB_MAA4 128 A5 DQ51 228 M_CHB_DQ55
M_CHB_MAA3 131 A4 DQ50 215 M_CHB_DQ48
A3 DQ49 +1P2V_DUAL
M_CHB_MAA2 132 216 M_CHB_DQ54 CON1701B
M_CHB_MAA1 133 A2 DQ48 204 M_CHB_DQ42
M_CHB_MAA0 144 A1 DQ47 203 M_CHB_DQ47
A0 DQ46 111
190 M_CHB_DQ40 VDD1
DQ45 112
191 M_CHB_DQ44 VDD2
117

20180212 SWAP
145 DQ44 208 M_CHB_DQ43
5 M_CHB_BA1 118 VDD3 +VTT_DDR
150 BA1 DQ43 207 M_CHB_DQ46
5 M_CHB_BA0 123 VDD4
BA0 DQ42 194 M_CHB_DQ41
124 VDD5 258
DQ41 195 M_CHB_DQ45
129 VDD6 VTT
113 DQ40 182 M_CHB_DQ37 VDD7

1
5 M_CHB_BG1 BG1 DQ39 130
115 183 M_CHB_DQ33 VDD8
5 M_CHB_BG0 BG0 DQ38 135 C1700
169 M_CHB_DQ34 VDD9 +2P5VPP
DQ37 136 10PF/50V
138 170 M_CHB_DQ38 VDD10

2
5 M_CHB_CLK1 CK1_t/NF DQ36 141
140 186 M_CHB_DQ36 VDD11
5 M_CHB_CLK1# CK1_c/NF DQ35 142 259
137 187 M_CHB_DQ32 VDD12 VPP2
5 M_CHB_CLK0 CK0_t DQ34 147 257
139 173 M_CHB_DQ35 VDD13 VPP1
5 M_CHB_CLK0# CK0_c DQ33 148
174 M_CHB_DQ39 VDD14
DQ32 153
80 M_CHB_DQ31 VDD15
DQ31 154
79 M_CHB_DQ29 VDD16
DQ30 159
67 M_CHB_DQ27 VDD17
DQ29 160
T1701 1 TP_CHB_XMM1_S3 165 66 M_CHB_DQ28 VDD18
C1/CS3_n/NC DQ28 163
T1703 1 TP_CHB_XMM1_S2 162 84 M_CHB_DQ26 VDD19
157 C0/CS2_n/NC DQ27 83 M_CHB_DQ24
5 M_CHB_CS#1 149 CS1_n DQ26 71 M_CHB_DQ30
5 M_CHB_CS#0 CS0_n DQ25 99
C 70 M_CHB_DQ25 VSS48 C
DQ24 102
59 M_CHB_DQ21 VSS49
DQ23 103
110 58 M_CHB_DQ23 VSS50
5 M_CHB_CKE1 CKE1 DQ22 106
109 45 M_CHB_DQ18 VSS51
5 M_CHB_CKE0 CKE0 DQ21 107
46 M_CHB_DQ16 VSS52
DQ20 167
161 63 M_CHB_DQ20 VSS53
5 M_CHB_ODT1 ODT1 DQ19 168
155 62 M_CHB_DQ19 VSS54
5 M_CHB_ODT0 ODT0 DQ18 171
49 M_CHB_DQ22 VSS55
DQ17 172
50 M_CHB_DQ17 VSS56
DQ16 175
104 37 M_CHB_DQ13 VSS57
CB7/NC DQ15 1 176
100 38 M_CHB_DQ11 VSS1 VSS58
+1P2V_DUAL CB6/NC DQ14 2 180
87 25 M_CHB_DQ10 VSS2 VSS59
CB5/NC DQ13 5 181
88 24 M_CHB_DQ8 VSS3 VSS60
CB4/NC DQ12 6 184
105 42 M_CHB_DQ15 VSS4 VSS61
CB3/NC DQ11 9 185
1

101 41 M_CHB_DQ12 VSS5 VSS62

CB2/NC DQ10 10 188
R1700 91 29 M_CHB_DQ14 VSS6 VSS63
CB1/NC DQ9 14 189
240Ohm 92 28 M_CHB_DQ9 VSS7 VSS64
CB0/NC DQ8 15 192
17 M_CHB_DQ3 VSS8 VSS65
DDR4_EEROM_PWR DQ7 18 193
143 16 M_CHB_DQ2 VSS9 VSS66
5 M_CHB_PAR PARITY DQ6 19 196
2

108 3 M_CHB_DQ0 VSS10 VSS67

16,24 DRAMRST_R# RESET_n DQ5 22 197
CHB_DIMM0_EVENT# 134 4 M_CHB_DQ4 VSS11 VSS68
EVENT_n/NF DQ4 23 201
116 21 M_CHB_DQ6 VSS12 VSS69
5 M_CHB_ALERT# ALERT_n DQ3 26 202
114 20 M_CHB_DQ7 VSS13 VSS70
5 M_CHB_ACT# ACT_n DQ2 27 205
1

7 M_CHB_DQ1 VSS14 VSS71

DQ1 30 206
2

R1704 R1705 R1706 DDR4_EEROM_PWR C1718 8 M_CHB_DQ5 VSS15 VSS72

DQ0 31 209
@ 0Ohm 0Ohm @ 0Ohm 10PF/50V C1702 35 VSS16 VSS73 210
2

@ 0.1UF/6.3V 36 VSS17 VSS74 213

1

@ +1P2V_DUAL 39 VSS18 VSS75 214

2

255 VSS19 VSS76

VDDSPD 40 217
V_SA2_DIMM0_CHB 166 VSS20 VSS77
SA2 43 218
V_SA1_DIMM0_CHB 260 VSS21 VSS78
SA1 44 222
V_SA0_DIMM0_CHB 256 96 VSS22 VSS79
SA0 DM8_n/DBI_n/NC 47 223
48 VSS23 VSS80 226
1

241 VSS24 VSS81

1

DM7_n/DBI7_n 51 227
R1715 R1716 R1717 C1704 C1706 52 VSS25 VSS82 230
C1705 220
0Ohm @ 0Ohm 0Ohm 2.2UF/6.3V 10PF/50V VSS26 VSS83
0.1UF/6.3V DM6_n/DBI6_n 56 231
2

@
2

VSS27 VSS84
1

57 234
199 VSS28 VSS85
DM5_n/DBI5_n 60 235
2

61 VSS29 VSS86 238

178 VSS30 VSS87
DM4_n/DBI4_n 64 239
65 VSS31 VSS88 243
B 254 75 VSS32 VSS89 B
16,28,48 SMB_DAT_DIMM SDA DM3_n/DBI3_n 68 244
253 VSS33 VSS90
16,28,48 SMB_CLK_DIMM SCL 69 247
54 VSS34 VSS91
DM2_n/DBI2_n 72 248
73 VSS35 VSS92 251
33 VSS36 VSS93
DM1_n/DBI_n 77 252
78 VSS37 VSS94
12 VSS38
DM0_n/DBI0_n 81
164 VSS39
5 DDRB_VREF_CA_W10S12 VREFCA 82
97 VSS40
DQS8_t 85
1

@ 95 VSS41
+1P2V_DUAL DQS8_c 86 264
C1713 C1712 242 VSS42 SIDE2
DQS7_t M_CHB_DQS7 5 89
2.2UF/6.3V 0.1UF/6.3V 240 VSS43
DQS7_c M_CHB_DQS7# 5 90 263
2

221 VSS44 SIDE1

DQS6_t M_CHB_DQS6 5 93
219 VSS45
DQS6_c M_CHB_DQS6# 5 94 262
1

@ 200 VSS46 NP_NC2

DQS5_t M_CHB_DQS5 5 98
1

C1717 C1710 198 VSS47

DQS5_c M_CHB_DQS5# 5 261
10PF/50V 0.1UF/6.3V R1710 179 NP_NC1
DQS4_t M_CHB_DQS4 5
2

1KOhm 177
DQS4_c 76 M_CHB_DQS4# 5
1%
DQS3_t 74 M_CHB_DQS3 5
DQS3_c M_CHB_DQS3# 5 DDR4_SO_260P
2

DDRB_VREF_CA_R R1720 1 2 0Ohm 55

DQS2_t 53 M_CHB_DQS2 5 12T02GBSM010
DQS2_c M_CHB_DQS2# 5
1

34
SHORT PIN 0402 DQS1_t 32 M_CHB_DQS1 5
R1714
DQS1_c 13 M_CHB_DQS1# 5
1KOhm
DQS0_t 11 M_CHB_DQS0 5
1%
DQS0_c M_CHB_DQS0# 5
2

DDR4_SO_260P
12T02GBSM010

A A

Title : DDR4 SO-DIMM1

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 17 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+1P2V_DUAL

NOTE:
Place those cap close to CH A DIMM FX505 RF reserve @20180131 +VTT_DDR

R1.1 modify
EMC

1
D D
1

1
C1808 C1809 C1818 C1854 C1855
C1805 C1806 C1807 C1800 C1801 C1802 C1803 C1804 C1843 C1846 C1851 C1848 C1852
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 10PF/50V 2.2UF/6.3V
10UF/6.3V 10UF/6.3V 10UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 10PF/50V

2
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V @
2

2
@ @ @ @
@

C1822 C1858 C1823 C1859 C1824 C1825 C1826 C1862 C1827 C1828 C1829 C1865
1

1
C1860 C1861 C1863 C1864
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201

1
X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
2

2
@ @ @ @ C1819 C1820 C1821
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
R1.1 modify R1.1 modify R1.1 modify R1.1 modify
EMC EMC EMC EMC

NOTE:
Place those cap close to CH B DIMM FX505 RF reserve @20180131
R1.1 modify +2P5VPP
EMC R1.1 modify
EMC
C C
1

C1815 C1816 C1817 C1810 C1811 C1812 C1813 C1814 C1844 C1845 C1850 C1847 C1853
10UF/6.3V 10UF/6.3V 10UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 0.1UF/6.3V 10PF/50V 10UF/6.3V C1842 C1875

1
2

@ @ @ 1UF/6.3V 1UF/6.3V

1
C1840
0201 0201
10UF/6.3V C1856 C1857
X5R/+/-20% X5R/+/-20%

2
10PF/50V 2.2UF/6.3V
@

2
@
@

C1832 C1866 C1833 C1867 C1834 C1868 C1835 C1869 C1836 C1870 C1837 C1871 C1838 C1872 C1839 C1873
1

1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 0201
X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
2

C1849 C1874
1

1
@ @ @ @ @ @ @ @
1UF/6.3V 1UF/6.3V
C1841
0201 0201
10UF/6.3V
X5R/+/-20% X5R/+/-20%
2

2
@

B
1

B
+ CE1800
330UF/2V
@
2

A A

Title : DDR4 Caps.

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 18 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

U2000A
K34
6 DMI_TXN0 J35 DMI0_RXN
6 DMI_TXP0 C33 DMI0_RXP
6 DMI_RXN0 B33 DMI0_TXN
6 DMI_RXP0 DMI0_TXP
G33
6 DMI_TXN1 F34 DMI1_RXN
6 DMI_TXP1 DMI1_RXP
6 DMI_RXN1
C32
B32 DMI1_TXN DMI USB2.0
6 DMI_RXP1 DMI1_TXP J2
K32 USB2P_1 J3 USB_PP1_30 52
6 DMI_TXN2 DMI2_RXN USB2N_1 USB_PN1_30 52 USB30 (CON5201)
J32
6 DMI_TXP2 C31 DMI2_RXP N15
6 DMI_RXN2 B31 DMI2_TXN USB2P_2 N13 USB_PP2_30 52
6 DMI_RXP2 DMI2_TXP USB2N_2 USB_PN2_30 52 USB30 (CON5202)
G30 K3
6 DMI_TXN3 F30 DMI3_RXN USB2P_3 K4
6 DMI_TXP3 C29 DMI3_RXP USB2N_3
D 6 DMI_RXN3 D
B29 DMI3_TXN L9
6 DMI_RXP3 DMI3_TXP USB2P_4 M10
M29 USB2N_4
K29 RSVD_1 L2
E28 RSVD_2 USB2P_5 M1
D29 RSVD_3 USB2N_5
RSVD_4 K6
M26 USB2P_6 K7 USB_PP6_20 52
RSVD_5 USB2N_6 USB_PN6_20 52 USB20 (CON5203)
L26
C27 RSVD_6 L3
B27 RSVD_7 USB2P_7 L4
RSVD_8 USB2N_7
G26 G5
F26 RSVD_9 USB2P_8 G4
B26 RSVD_10 USB2N_8
C26 RSVD_11 N8
RSVD_12 USB2P_9 M6
R24 USB2N_9
P24 RSVD_13 H2
B25 RSVD_14 USB2P_10 H3
A25 RSVD_15 USB2N_10
RSVD_16 P9
USB2P_11 R10 USB_PP11_CAMERA 45
USB2N_11 USB_PN11_CAMERA 45 Camera
PCIE/USB/ SATA USB2P_12
G2
G1
USB2N_12
N2
B17 USB2P_13 N3
A17
F16
PCIE1_TXP/USB31_7_TXP
PCIE1_TXN/USB31_7_TXN
USB2N_13
F6 USB3.1 support GEN2
USB_PP14_BT 53
G17 PCIE1_RXP/USB31_7_RXP
PCIE1_RXN/USB31_7_RXN
USB2P_14
USB2N_14
E5
USB_PN14_BT 53 M.2 BT HM370: 4 ports
C18
B18 PCIE2_TXP/USB31_8_TXP QM370: 6 ports
P21 PCIE2_TXN/USB31_8_TXN
R21 PCIE2_RXP/USB31_8_RXP
PCIE2_RXN/USB31_8_RXN
C19
B19 PCIE3_TXP/USB31_9_TXP USB3.1
J18 PCIE3_TXN/USB31_9_TXN
C C
K18 PCIE3_RXP/USB31_9_RXP F7
PCIE3_RXN/USB31_9_RXN USB31_1_TXP F9 USB3_TXP1 52
C20 USB31_1_TXN C11 USB3_TXN1 52 USB30 (CON5201)
D20 PCIE4_TXP/USB31_10_TXP USB31_1_RXP D11 USB3_RXP1 52
R18 PCIE4_TXN/USB31_10_TXN USB31_1_RXN USB3_RXN1 52
N18 PCIE4_RXP/USB31_10_RXP D4
PCIE4_RXN/USB31_10_RXN USB31_2_TXP C3
A22 USB31_2_TXN C9
B21 PCIE5_TXP USB31_2_RXP B9
G20 PCIE5_TXN USB31_2_RXN
F20 PCIE5_RXP G12
PCIE5_RXN USB31_3_TXP F11 USB3_TXP3 52
C21 USB31_3_TXN C10 USB3_TXN3 52
PCIE6_TXP USB31_3_RXP USB3_RXP3 52 USB30 (CON5202)
D21 B10
J21 PCIE6_TXN USB31_3_RXN USB3_RXN3 52
K21 PCIE6_RXP C14
PCIE6_RXN USB31_4_TXP B14
B23 USB31_4_TXN J15
C23 PCIE7_TXP USB31_4_RXP K16
J24 PCIE7_TXN USB31_4_RXN
L24 PCIE7_RXP B15
PCIE7_RXN USB31_5_TXP C15
C24 USB31_5_TXN K13
B24 PCIE8_TXP USB31_5_RXP J13
M.2 PCIEx4 SSD PCIE8_TXN USB31_5_RXN
G24
M.2 SATA SSD F24 PCIE8_RXP C16
PCIE8_RXN USB31_6_TXP C17
D34 USB31_6_TXN F14
51 PCIE_TXP9_SSD PCIE9_TXP USB31_6_RXP
C34 G14
51 PCIE_TXN9_SSD PCIE9_TXN USB31_6_RXN
F36
51 PCIE_RXP9_SSD G36 PCIE9_RXP
51 PCIE_RXN9_SSD PCIE9_RXN G3
USB2_ID
IWPU USB2_ID
B35 F3 USB2_VBUSSENSE
51 PCIE_TXP10_SSD PCIE10_TXP USB2_VBUSSENSE
C35
51 PCIE_TXN10_SSD PCIE10_TXN
J37
51 PCIE_RXP10_SSD PCIE10_RXP
1

K37
51 PCIE_RXN10_SSD PCIE10_RXN R2001 R2002
C36 1KOhm 1KOhm
51 PCIE_TXP11_SSD PCIE11_TXP/SATA0A_TXP
B36
51 PCIE_TXN11_SSD PCIE11_TXN/SATA0A_TXN
F39
51 PCIE_RXP11_SSD PCIE11_RXP/SATA0A_RXP
2

B G38 B
51 PCIE_RXN11_SSD PCIE11_RXN/SATA0A_RXN
E37
51 PCIE_TXP12_SATA1_SSD PCIE12_TXP/SATA1A_TXP
D38 GND GND
51 PCIE_TXN12_SATA1_SSD PCIE12_TXN/SATA1A_TXN
J41
51 PCIE_RXP12_SATA1_SSD H42 PCIE12_RXP/SATA_1A_RXP
51 PCIE_RXN12_SATA1_SSD PCIE12_RXN/SATA1A_RXN

PCH-H

A A

Title : HSIO 1
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 20 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+3VSUS +3VSUS 7,22,23,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

+3VSUS_ORG +3VSUS_ORG 7,22,23,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96
571391_CFL_H_PDG_Rev1p0_P.254/661 +3VS +3VS 7,16,22,23,24,28,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96
SATAGP: P.244/661
U2000B DEVSLP: P.245/661

PCIE/SATA AH41 SATAGP0 CHECK IPU

GPP_E0/SATAXPCIE0/SATAGP0 AJ43 PCIE_SSD_PEDET_R R2113 1 2
GPP_E1/SATAXPCIE1/SATAGP1 PCIE_SSD_PEDET 51
33 PCIE_TXP13_LAN C2101 1 2 0.1UF/6.3V PCIE_TXP13_LAN_C C38 AK47 GPP_E2 1 T2125
C2102 1 2 0.1UF/6.3V PCIE_TXN13_LAN_C B38 PCIE13_TXP/SATA0B_TXP GPP_E2/SATAXPCIE2/SATAGP2
33 PCIE_TXN13_LAN PCIE13_TXN/SATA0B_TXN
LAN RTL8111G C46
33 PCIE_RXP13_LAN C45 PCIE13_RXP/SATA0B_RXP
33 PCIE_RXN13_LAN PCIE13_RXN/SATA0B_RXN
AL47 GPI CPU_GP0 1 T2105
C2103 1 2 0.1UF/6.3V PCIE_TXP14_WLAN_C D39 GPP_E3/CPU_GP0 AL48 GPI SATA_DEVSLP0_R 1 T2106
53 PCIE_TXP14_WLAN PCIE14_TXP/SATA1B_TXP GPP_E4/SATA_DEVSLP0
D 53 PCIE_TXN14_WLAN C2104 1 2 0.1UF/6.3V PCIE_TXN14_WLAN_C C39 AH35GPI SATA_DEVSLP1_R R2115 1 @ 2 0Ohm
SATA_DEVSLP1 51 D
M.2 WLAN C47 PCIE14_TXN/SATA1B_TXN GPP_E5/SATA_DEVSLP1 AH40GPI SATA_DEVSLP2_R 1 T2107
53 PCIE_RXP14_WLAN D46 PCIE14_RXP/SATA1B_RXP GPP_E6/SATA_DEVSLP2 AM45GPI CPU_GP1 1 T2108
53 PCIE_RXN14_WLAN PCIE14_RXN/SATA1B_RXN GPP_E7/CPU_GP1 AK48GPI
GPP_E8/SATALED# SATA_LED# 56
C40
B40 PCIE15_TXP/SATA2_TXP +3VS
E45 PCIE15_TXN/SATA2_TXN
F44 PCIE15_RXP/SATA2_RXP
PCIE15_RXN/SATA2_RXN SATA_LED# R2121 2 1 10KOhm
C41
B41 PCIE16_TXP/SATA3_TXP R2134 2 @ 1 10KOhm SATAGP0 R2133 2 @ 1 10KOhm
M40 PCIE16_TXN/SATA3_TXN
L41 PCIE16_RXP/SATA3_RXP
PCIE16_RXN/SATA3_RXN 571391_CFL_H_PDG_Rev1p0_P.254/661
The SATALED# signal is open-collector and requires a weak
571391_CFL_H_PDG_Rev1p0_P.267/661 external pull-up (8.2 kΩ to 10 kΩ) to Vcc3_3.
B42
51 SATA_TXP4_HDD
A42 PCIE17_TXP/SATA4_TXP The overcurrent signals require a pull-up
51 SATA_TXN4_HDD
K44 PCIE17_TXN/SATA4_TXN to the 3.3V Suspend Rail with 8.2–10 KΩ resistor. +3VSUS_ORG
HDD 51 SATA_RXP4_HDD PCIE17_RXP/SATA4_RXP
K43
51 SATA_RXN4_HDD PCIE17_RXN/SATA4_RXN AH36GPI 1 2 RN2101A
GPP_E9/USB2_OC0# IPD 20K OC0# 10KOhm 4
AL40 GPI IPD 20K OC1# 3 RN2101B
D42 GPP_E10/USB2_OC1# AJ44 GPI 3 10KOhm 4
PCIE18_TXP/SATA5_TXP GPP_E11/USB2_OC2# IPD 20K OC2# 10KOhm 2
RN2103B
C42 AL41 GPI IPD 20K OC3# 1 RN2103A
R40 PCIE18_TXN/SATA5_TXN GPP_E12/USB2_OC3# 10KOhm
P41 PCIE18_RXP/SATA5_RXP AV47 GPI 3 4 RN2102B @ USB_OC0# 52
OC4#
PCIE18_RXN/SATA5_RXN GPP_F15/USB2_OC4# 10KOhm 2 +3VSUS USB_OC1# 52
AR35GPI OC5# 1 RN2104A @
GPP_F16/USB2_OC5# 10KOhm 4 +3VSUS USB_OC2# 52
AR37GPI OC6# 3 RN2104B @
GPP_F17/USB2_OC6# 10KOhm 2 +3VSUS
D43 AV43 GPI OC7# 1 RN2102A @
PCIE19_TXP/SATA6_TXP GPP_F18/USB2_OC7# 10KOhm +3VSUS
C44
N42 PCIE19_TXN/SATA6_TXN
M44 PCIE19_RXP/SATA6_RXP
PCIE19_RXN/SATA6_RXN 546884_SKL_PDG_H_rev2_0 p658
If unused, OC [x]# pins require a pull-up to V3.3A with 8.2–10 KΩ resistors.
B44
A44 PCIE20_TXP/SATA7_TXP
R37 PCIE20_TXN/SATA7_TXN
R35 PCIE20_RXP/SATA7_RXP
PCIE20_RXN/SATA7_RXN
F46 AT6 GPI
G47 PCIE21_TXP GPP_I0/DDPB_HPD0/DISP_MISC0 AN10GPI
R44 PCIE21_TXN GPP_I1/DDPC_HPD1/DISP_MISC1 AP9 GPI
T43 PCIE21_RXP GPP_I2/DDPD_HPD2/DISP_MISC2 AL15 GPI
C C
PCIE21_RXN GPP_I3/DDPF_HPD3/DISP_MISC3 AN6 GPI EDP_HPD
H48 GPP_I4/EDP_HPD/DISP_MISC4 EDP_HPD 45
PCIE22_TXP
1

H47
U41 PCIE22_TXN R2135
U40 PCIE22_RXP
PCIE22_RXN 100KOhm 571391_CFL_H_PDG_Rev1p0_P.162/661
G48
PCIE23_TXP
2

G49
W44 PCIE23_TXN
W43 PCIE23_RXP
PCIE23_RXN
G45
G46 PCIE24_TXP AL13 GPI
Y41 PCIE24_TXN GPP_I5/DDPB_CTRLCLK AR8 IPD 20K
Y40 PCIE24_RXP GPP_I6/DDPB_CTRLDATA AN13GPI
PCIE24_RXN GPP_I7/DDPC_CTRLCLK 571391_CFL_H_PDG_Rev1p0_P.152/661
AL10 IPD 20K
GPP_I8/DDPC_CTRLDATA AL9 GPI
(1)Enable:Pull up to 3.3V with 2.2K ohm ±5% resistor.
GPP_I9/DDPD_CTRLCLK AR3 IPD 20K (2)Disable:No Connect
GPP_I10/DDPD_CTRLDATA
56 AIR_LED GPI AP48 GPP_F5/SATA_DEVSLP3
53 WLAN_ON GPI AR47 GPP_F6/SATA_DEVSLP4
53 BT_ON/OFF# GPI AN46 GPP_F7/SATA_DEVSLP5
T2101 1 BT_LED GPI AN37
1 GPP_F8/SATA_DEVSLP6
T2113 SATA_DEVSLP7_R GPI AP47 GPP_F9/SATA_DEVSLP7
CFL_H_Schematic Checklist_Rev1p0_p.58
1 SATAGP[5:0]:10 KΩ ±10% pull-up to V3.3
T2114 GPP_F10 GPI AR42 GPP_F10/SATA_SCLOCK
T2115 1 GPP_F11 GPI AR48 AN47 GPP_F0 R2128 1 @ 2 10KOhm
GPP_F11/SATA_SLOAD GPP_F0/SATAXPCIE3/SATAGP3 +3VS
T2116 1 GPP_F12 GPI AU46 AM46 GPP_F1 R2129 1 @ 2 10KOhm
GPP_F12/SATA_SDATAOUT1 GPP_F1/SATAXPCIE4/SATAGP4 +3VS
T2117 1 GPP_F13 GPI AU47 AM43 GPP_F2 R2130 1 @ 2 10KOhm
GPP_F13/SATA_SDATAOUT0 GPP_F2/SATAXPCIE5/SATAGP5 +3VS
T2118 1 GPP_F14 GPI AP41 AM47GPI GPP_F3 R2127 1 @ 2 10KOhm
GPP_F14/PS_ON# GPP_F3/SATAXPCIE6/SATAGP6 +3VS
AM48GPI GPP_F4 R2132 1 @ 2 10KOhm
GPP_F4/SATAXPCIE7/SATAGP7 +3VS
45 EDP_VDD_EN GPI AV44 GPP_F19/eDP_VDDEN
45 LCD_BKLTEN_PCH GPI AV46 GPP_F20/eDP_BKLTEN
45 LCD_BL_PWM_PCH GPI AU48 GPP_F21/eDP_BKLTCTL
R2156 1 2
AV6
1 2 10KOhm GPP_J0/CNV_PA_BLANKING
+3VSUS R2111 @ GPP_F22 GPI AT49 GPP_F22/DDPF_CTRLCLK GPP_J1/CPU_C10_GATE#
AY3
T2124 1 GPP_F23 GPI AN40 AW3
GPP_F23/DDPF_CTRLDATA GPP_J2 AT10
GPP_J3 AV4 R2145 1 2 10KOhm +3VSUS
GPP_J4/CNV_BRI_DT/UART0B_RTS# AY2 CNV_BRI_DT 53
U2101
B BF6 GPP_J5/CNV_BRI_RSP/UART0B_RXD BA4 CNV_BRI_RSP 53 1 A 5 B
53 CNV_WT_D1P CNV_WT_D1P GPP_J6/CNV_RGI_DT/UART0B_TXD CNV_RGI_DT 53 VCC
BG6 AV3
53 CNV_WT_D1N CNV_WT_D1N GPP_J7/CNV_RGI_RSP/UART0B_CTS# CNV_RGI_RSP 53
AW2 R2144 1 @ 2 0Ohm 2 B
BD7 GPP_J8/CNV_MFUART2_RXD AU9 30,57,68,91,92 SUSB_EC#
GPP_J9
53 CNV_WT_D0P CNV_WT_D0P GPP_J9/CNV_MFUART2_TXD
BE6 AV7 3 4
53 CNV_WT_D0N CNV_WT_D0N GPP_J10 GND VGA_PWR_EN 74
AR13 Y
BA2 GPP_J11/A4WP_PRESENT
53 CNV_WR_D1P BA3 CNV_WR_D1P VGA_PWR_EN_R SN74LVC1G08DCKR
53 CNV_WR_D1N CNV_WR_D1N 1 2 0Ohm @
VGA_PWR_DOWN# R2143 @
BB4 L47
53 CNV_WR_D0P BB3 CNV_WR_D0P GPP_K0 L46 R2146 1 2
53 CNV_WR_D0N CNV_WR_D0N GPP_K1 U48 NVVDD_PWROK_R +PEX_VDD_PWRGD 87,89,91,92,96
R2138 1 @ 2 0Ohm
GPP_K2 U47 GC6_FB_EN_PCH NVVDD_PWROK 87,91,92,96
R2140 1 2
GPP_K3 N48 GPU_EVENT#_PCH_R GC6_FB_EN 74,89
R2141 1 2
GPP_K4 N47 DGPU_HOLD_RST#_R GPU_EVENT#_PCH 74
R2142 1 2
GPP_K5 P47 DGPU_HOLD_RST# 74
GPP_K6 PCH_I2C0_INT# 31
2

R46
GPP_K7 P48 THRO_COUNT 88
R2147
GPP_K8 V47
571391_CFL_H_PDG_Rev1p0_P.454/661 GPP_K9 10KOhm
V48
GPP_K10 W47
GPP_K11
1

T46 +3VSUS
GPP_K20 T45
GPP_K21 L48
GPP_K22/IMGCLKOUT0 GPU_EVENT#_PCH R2151 1 @ 2 10KOhm
M45
GPP_K23/IMGCLKOUT1

+1.8VSUS

PCH-H
+1.8VSUS
GPP_J9 R2136 2 @ 1 100KOhm
CNV_BRI_RSP R2165 1 @ 2 20KOhm
GPP_J9 R2137 2 1 100KOhm
CNV_RGI_RSP R2166 1 @ 2 20KOhm

571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.60/312
A GPP_J9: A
The signal has a weak internal pull-down
0 = VCCSPI is connected to 3.3V rail
1 = VCCSPI is connected to 1.8V rail

Title : HSIO 2
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 21 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+3VSUS +3VSUS 7,21,23,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

+3VSUS_ORG +3VSUS_ORG 7,21,23,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96
U2000F +3VS +3VS 7,16,21,23,24,28,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96
+VCCPGPPA +VCCPGPPA 26

LPC/ESPI SD
571391_CFL_H_PDG_Rev1p0_P.597/661
Figure 28-1 (LPC) 571391_CFL_H_PDG_Rev1p0_P.342/661
SDXC signals are multiplexed with GPIOs and default to GPIO
BE39 AW13 GPI PCB_ID0 functionality (as input). If SDXC interface is not used, the signals
30
30,44
RCIN#
LPC_AD0
BB39 GPP_A0/RCIN#/ESPI_ALERT1# GPP_G0/SD_CMD BE9 GPI PCB_ID1 can be used as GPIOs instead. If the GPIO functionality is also
GPP_A1/LAD0/ESPI_IO0 GPP_G1/SD_DATA0
30,44 LPC_AD1 IPU 20K(ESPI)AW37 GPP_A2/LAD1/ESPI_IO1 GPP_G2/SD_DATA1
BF8 GPI PCB_ID2 not used, the signals can be left as no-connect.
30,44 LPC_AD2 IPU 20K(ESPI)AV37 GPP_A3/LAD2/ESPI_IO2 GPP_G3/SD_DATA2
BF9 GPI PCB_ID3
30,44 LPC_AD3 IPU 20K(ESPI)BA38 GPP_A4/LAD3/ESPI_IO3 GPP_G4/SD_DATA3
BG8 GPI PCB_ID4
30,44 LPC_FRAME# IPU 20K(ESPI)BE38 GPP_A5/LFRAME#/ESPI_CS0# GPP_G5/SD_CD#
BE8 GPI PCB_ID5 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.139/312
30,44 INT_SERIRQ IPU 20K(ESPI)AW35 GPP_A6/SERIRQ/ESPI_CS1# GPP_G6/SD_CLK
BD8 GPI PCB_ID6 Primary Well Group G (GPP_G) : VCCPGPPG_3P3 or VCCPRIM_1P8
D PIRQA# I/OD BA36 GPP_A7/PIRQA#/ESPI_ALERT0# GPP_G7/SD_WP
AV13 GPI PCB_ID7 Note:
T2203 1 BF38
30 CLK_KBCPCI_PCH R2201 1 2 22Ohm CLK_KBCPCI_PCH_R IPD 20K(ESPI)BB36
GPP_A14/SUS_STAT#/ESPI_RESET# Except for GPP_G group, the operating voltage of a GPIO group having voltage configurability (3.3V
GPP_A9/CLKOUT_LPC0/ESPI_CLK
44 CLK_DEBUG R2202 1 2 22Ohm CLK_LPC1 BB34
GPP_A10/CLKOUT_LPC1
or 1.8V) is selected by both connecting the corresponding power pin and setting the group-voltageselection
soft strap to the desired voltage. GPP_G supports dynamic voltage configuration ONLY when
GPP_K18 GPI T47 GPP_K18/NMI# the family is used for SDIO. If the family is used for GPIOs, per pin voltage configuration is NOT
571391_CFL_H_PDG_Rev1p0_P.597/661 GPP_K19 GPI T48 GPP_K19/SMI# supported. GPP_G group voltage is selected by setting the corresponding soft strap only.
Figure49-11,R=22 ohm,C<27pF
1

C2203 C2204
10PF/50V 10PF/50V
2

@ @
HOST
GND GND
SPI0
T2201 1 SPI_CS2# IPD AT40 AE2
SPI0_CS2# PM_DOWN PM_DOWN 7571391_CFL_H_PDG_Rev1p0_P.227/661
T2202 1 SPI_CS#1 IPD AW48 AF3 PM_SYNC_R R2220 1 1% 2 30OHM
SPI0_CS1# PM_SYNC PM_SYNC 7PM_SYNC: Rs=30 ohm
28 SPI_CS#0 IPD AY47 SPI0_CS0# PECI
AF2
H_PECI_PCH 7
28 SPI_SI IPU/IPD 20K AU41 SPI0_MOSI
28 SPI_SO IPU BA45 SPI0_MISO
1

28 SPI_CLK IPD AW47 SPI0_CLK

1

28 SPI_HOLD#_IO3 IPD BA46 SPI0_IO3

C2201 R2235
28 SPI_WP#_IO2 IPD AY48 SPI0_IO2 47PF/50V 10KOhm
@ @
2
1

100KOhm 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.44/224
R2247
需需需需10K Ohm
1

GND GND
2

C2202
10PF/50V
2

GND @
ISH_GP
GND
GPI BD38 GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
C GPI BF35 GPP_A18/ISH_GP0
C
GPI BD34 GPP_A19/ISH_GP1

FX505 RF reserve @20180131 GPI BE34

GPI BA33
GPI AW32
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPI AV34 GPP_A23/ISH_GP5

Y46 GPI 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.305/312

GPP_K12/GSXDOUT Y48
GPP_K13/GSXSLOAD
GPI GPIO Serial Expander (GSX) is the capability provided by the
W46 GPI
GPP_K14/GSXDIN AA45 GPI PCH to expand the GPIOs on a platform that needs more GPIOs
GPP_K15/GSXSRESET# Y47 GPI than the ones provided by the PCH. The solution
GPP_K16/GSXCLK
GPP_K17/ADR_COMPLETE
R47 GPI requires external shift register discrete components.

30 PM_CLKRUN# I/OD AV32 GPP_A8/CLKRUN#

PME# IPU 15-40K I/OD BE36 GPP_A11/PME#/SD_VDD2_PWR_EN#
T2210 1 GPP_A12 GPI BF36
R2204 1 @ 2 0Ohm SUS_PWR_ACK_R BC37 GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
30 SUSWARN#/SUSPWRDNACK GPP_A13/SUSWARN#/SUSPWRDNACK
R2205 1 @ 2 0Ohm
30 SUSACK#
SUS_PWR_ACK_R R2206 1 @ 2 0Ohm SUSACK#_R IPU 20KBE35
1 GPP_A15/SUSACK#
T2211 GPP_A16 GPI BE33 GPP_A16/CLKOUT_48
571391_CFL_H_PDG_Rev1p0 (DS3)P.430/661
36.2.11SUSACK# Usage Model
SUSACK# and SUSWARN# can be tied together if EC does not
want to be involved in the handshake mechanism for the Deep
Sx state entry and exit.

B PCH-H B

+3VS
571391_CFL_H_Schematic Checklist_Rev1p0_p.30/79
PIRQA#/GPP_A7:Pull-up to V3.3S with 8.2 KΩ ~10 KΩ resistor
PIRQA# /LPC R2221 1 2 10KOhm
PCB_ID0 PCB_ID1 PCB_ID2 PCB_ID3 PCB_ID4 PCB_ID5 PCB_ID6 PCB_ID7 INT_SERIRQ 1 2 10KOhm
/LPC R2222 571391_CFL_H_Schematic Checklist_Rev1p0_p.30/79
SERIRQ:8.2 K pull-up to V3.3S power-rail.
1: 1: 1: 1: 1: 1: 1: 1: GPP_K18 R2223 1 @ 2 10KOhm
CRB uses a 10 K pull-up to V3.3S power-rail.
GPP_K19 R2224 1 @ 2 10KOhm
0: 0: 0: 0: 0: 0: 0: 0:

PM_CLKRUN# /LPC R2225 1 2 10KOhm CFL_H_Schematic Checklist_Rev1p0_p.29/79

+3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG +3VSUS_ORG
CLKRUN#/GPP_A8: Requires an 8.2 K weak pull-up resistor to V3.3S
需需需需8.2K Ohm??
+VCCPGPPA CRB 100K Ohm?
1

R2228 R2230 R2232 R2234 R2237 R2239 R2241 R2243

10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm PME# R2227 1 @ 2 10KOhm
@ @ @ @ @ @ @ @
2

PCB_ID0
PCB_ID1
PCB_ID2
PCB_ID3
PCB_ID4
PCB_ID5
PCB_ID6
PCB_ID7
A A
1

R2229 R2231 R2233 R2236 R2238 R2240 R2242 R2244

10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm
@ @ @ @ @ @ @ @
2

GND GND GND GND GND GND GND GND

Title : LSIO 1
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 22 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+3VSUS +3VSUS 7,21,22,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

U2000E +3VSUS_ORG +3VSUS_ORG 7,21,22,24,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

+3VS +3VS 7,16,21,22,24,28,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96

AUDIO/I2S CLINK +VCCPAZIO +VCCPAZIO 26
R2388 1 2 HDA_SDI0_R IPD 20KBE11 AR2 571391_CFL_H_PDG_Rev1p0_P.472/661
36 HDA_SDI0 HDA_SDI0/I2S0_RXD CL_CLK CL_CLK 53
T2301 1 HDA_SDI1 IPD 20K BF10 AT5
HDA_SDI1/I2S1_RXD CL_DATA AU4
CL_DATA 53 For CNVi CLINK is internal to the PCH and does not need an
R2301 1 2 33Ohm HDA_SDO_R IPD 20K BF12
CL_RST# CL_RST# 53 connection. In order to support CLINK with discrete M.2 modules
36 HDA_SDO 1 2 33Ohm HDA_SDO/I2S0_TXD (such as Thunder Peak) connect the CLINK to the CLINK pins of
36 HDA_SYNC
R2302 HDA_SYNC_R IPD 20KBG13 HDA_SYNC/I2S0_SFRM NOTE:
36 HDA_BCLK
R2303 1 2 33Ohm HDA_BCLK_R BD11
HDA_BCLK/I2S0_SCLK
the M.2 connector.
R2304 1 2 33Ohm HDA_RST#_R BE10
36 HDA_RST# HDA_RST#/I2S1_SCLK
SPI1

1
D
571391_CFL_H_PDG_Rev1p0_P.358/661 D
C2301 C2302 C2303 C2307 C2304 R2397 R2398 BF19 GPI
R=33 ohm GPP_D0/SPI1_CS#/SBK0/BK0 BE19
10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 100KOhm 100KOhm
GPP_D1/SPI1_CLK/SBK1/BK1
GPI

2
571391_CFL_H_PDG_Rev1p0_P.358/661 @ @ @ @ @ BE18 GPI
GPP_D2/SPI1_MISO/SBK2/BK2 BF18
C=2 pF-0.05pF GPP_D3/SPI1_MOSI/SBK3/BK3 GPI

2
BD17 GPI
GPP_D21/SPI1_IO2 BC17
GND GND GND GND GND GPP_D22/SPI1_IO3 GPI
GND GND
IPD 20K AN3 +3VS +3VS
3 PROC_AUDIO_SDO 1 2 30OHM AM2 HDACPU_SDI
R2305 DISPA_SDO_L200MIL IPD 20K 571391_CFL_H_PDG_Rev1p0_P.322/661
3 PROC_AUDIO_SDI HDACPU_SDO
R2306 1 2 30OHM DISPA_BCLK_L200MIL AM3
3 PROC_AUDIO_CLK HDACPU_SCLK I2C signals are multiplexed with GPIOs and default to GPIO

2
functionality (as input). If I2C interfaces are not used, the signals
571391_CFL_H_PDG_Rev1p0_P.361/661 R2313 R2314
can be used as GPIOs instead. If the GPIO functionality is also
When the IntelR Display Audio interface is not implemented, I2C 2.2KOhm 2.2KOhm
not used, the signals can be left as no-connect.
PROC_AUDIO_CLK and PROC_AUDIO_SDI need to be BD12
terminated to GND via a weak pull-down resistor (i.e. ~2KΩ), I2S1_SFRM/SNDW2_CLK

1
BE12
I2S1_TXD/SNDW2_DATA
PROC_AUDIO_SDO can be left unconnected. 53 CNV_RF_RST# IPD 20K GPI BE16 GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_C16/I2C0_SDA
BF23 GPI PCH_I2C0_SDA 31
53 XTAL_CLKREQ# GPI BA17 GPP_D6/I2S2_TXD/MODEM_CLKREQ GPP_C17/I2C0_SCL
BC22 GPI PCH_I2C0_SCL 31
GPIAW18 GPP_D7/I2S2_RXD
GPI AV18 GPP_D8/I2S2_SCLK GPP_C18/I2C1_SDA
BF21 GPI
BE21 GPI
GPP_C19/I2C1_SCL

GPIAW15
DBG
GPP_D17/DMIC_CLK1/SNDW3_CLK
GPI AV16 GPP_D18/DMIC_DATA1/SNDW3_DATA CPU_TRST#
AM4 PCH_H_TRST# R2315 1 2
H_TRST# 7
T2315 1 GPP_D19 GPI BD16
1 GPP_D19/DMIC_CLK0/SNDW4_CLK
T2316 GPP_D20 GPI BF15 GPP_D20/DMIC_DATA0/SNDW4_DATA PRDY#
AM5 PCHXDP_PRDY# R2316 1 2
H_PRDY# 7
AL2 PCHXDP_PREQ# R2317 1 2
PREQ# H_PREQ# 7

571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.208/224

PU@+3VS,p.28 SMB
+3VSUS BE26
C 28 SMB_CLK GPP_C0/SMBCLK C
BF26
28 SMB_DAT GPP_C1/SMBDATA
SMBALERT# IPD 20KBE25 GPP_C2/SMBALERT#
R2380 1 @ 2 1KOhm SML0_CLK SML0_CLK BF25
R2381 1 @ 2 1KOhm SML0_DAT SML0_DAT BE24 GPP_C3/SML0CLK
GPP_C4/SML0DATA
SML0ALERT# IPD 20K BF24 GPP_C5/SML0ALERT# PCH_JTAG_TMS
AJ4 PCH_JTAG_TMS R2319 1 2
H_TMS 7
AH3 PCH_JTAG_TDO R2320 1 2
PCH_JTAG_TDO H_TDO 7
R2382 1 @ 2 1KOhm SML1_CLK
28 SML1_CLK GPI BF27 AH2 PCH_JTAG_TDI R2321 1 2
H_TDI 7
R2383 1 2 1KOhm GPP_C6/SML1CLK PCH_JTAG_TDI
@ SML1_DAT
28 SML1_DAT GPI BE27 GPP_C7/SML1DATA PCH_JTAG_TCK
AJ3 PCH_JTAG_TCK
SML1ALERT# IPD 20KBD33 GPP_B23/SML1ALERT#/PCHHOT# PCH_JTAGX
AH4 PCH_JTAGX R2322 1 2
H_TCK 7
AL3 ITP_PMODE 1 T2319
ITP_PMODE

1
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.97/224
R2323
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.209/224
CRB有有4顆100pF不不不_20170904 51Ohm
@

2
ISH_SPI
BA20GPI
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
UART GPP_D10/ISH_SPI_CLK/GSPI2_CLK
BB20GPI
BB16GPI GPP_D11 1 T2324
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO AN18GPI GPP_D12 1 T2325
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
44 UART0_DEBUG_RXD GPI BE23 GPP_C8/UART0A_RXD
44 UART0_DEBUG_TXD GPI BB24 GPP_C9/UART0A_TXD
T2306 1 GPP_C10 GPI BA24 GPP_C10/UART0A_RTS#
30 EXT_SCI#
GPI AP24 GPP_C11/UART0A_CTS#

32,74,87,96 GPU_OVERT#
R2352 1 @ 2 0Ohm
T2307 1 GPP_C21
GPI BD20
GPI BE20
GPP_C20/UART2_RXD ISH_I2C
74 GPU_ALERT#
R2347 1 @ 2 0Ohm GPIAW21
GPP_C21/UART2_TXD R2.0 modify
GPP_C22/UART2_RTS#
30,44 EXT_SMI# GPI AV21 GPP_C23/UART2_CTS# GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4/BK4
BE15GPI GPP_D4
EDP_OD_EN 45
BE14GPI GPP_D23 1 T2312
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
571391_CFL_H_Schematic Checklist_Rev1p0_p.35/79
If UART interface is used, 50 KΩ pull-up resistors to 3.3V are
required on all UART signals.
If the interface is not used, the signals can be used as GPIO. If
+3VSUS
GPIO functionality is also not used, the signals can be left as no-
R2334 1 @ 2 10KOhm GPU_ALERT# connect.
ISH_UART
B B
BE17GPI
+3VS GPP_D13/ISH_UART0_RXD/I2C2_SDA BF17 GPI
GPP_D14/ISH_UART0_TXD/I2C2_SCL AR18GPI
R2396 1 2 10KOhm EXT_SCI# R2.0 modify GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN BF14 GPI
R2339 1 2 10KOhm EXT_SMI# GPP_D16/ISH_UART0_CTS#/CNV_WCEN
T2302 1 GPP_C12 GPI AU24
1 GPP_C12/UART1_RXD/ISH_UART1_RXD
T2305 GPP_C13 GPI AP21 GPP_C13/UART1_TXD/ISH_UART1_TXD
+VCCPAZIO GPP_C14 GPIAW24
48 HDMI_HPD_TO_PCH 1 GPP_C14/UART1_RTS#/ISH_UART1_RTS#
@
T2317 GPP_C15 GPI BD21 GPP_C15/UART1_CTS#/ISH_UART1_CTS#
R2324 1 2 1KOhm HDA_SDO_R

D2301 1 2 RB751V-40
30 PCH_FLASH_DESCRIPTOR
571391_CFL_H_Schematic Checklist_Rev1p0_p.39/79
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.108/224 SMBALERT#/ GPP_C2 : This signal has an integrated weak
1K ohm pull high pull-down resistor (20 KΩ
nominal) to disable IntelR ME Cryptographic Transport Layer
CRB 1K ohm pull high_20170912 Security (TLS) cipher suite (no confidentiality). PCH-H
571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.59/312 To enable IntelR ME Cryptographic Transport Layer Security
HDA_SDO - Internal weak pull down (TLS) cipher suite with confidentiality, this signal should be R2326要要2.2K ohm ? +3VSUS_ORG
FLASH DESCRIPTOR SECURITY OVERRRIDE pulled up to V3.3A through a 1k to 2.2 KΩ ±5% resistor.
This signal has a weak internal pull-down. R2325 1 @ 2 20KOhm SMBALERT# R2326 1 @ 2 4.7KOhm 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.57_141/312
0 = Enable security measures defined in the Flash
Descriptor. (Default) 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.58_141/312
1 = Disable Flash Descriptor Security (override). This GND
SMBALERT# - Internal weak pull down 20k ohm
strap should only be asserted high using external TLS Confidentiality
Pull-up in 0 : Disable (default)
1 : Enable +3VSUS_ORG

R2327 1 @ 2 20KOhm SML0ALERT# R2328 1 @ 2 4.7KOhm

571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.58/312
GND SML0ALERT# - Internal weak pull down
0 : LPC EC (default)
1 : eSPI EC +3VSUS_ORG

R2329 1 @ 2 20KOhm SML1ALERT# R2330 1 @ 2 150KOhm

A A

GND 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.58/312
SML1ALERT# -
571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1 This signal has an internal pull-down.
SML1ALERT# - 0 = Disable IntelR DCI-OOB (Default)
Pull high 150k ohm (P.58/312) 1 = Enable IntelR DCI-OOB
Pull down 20k ohm (P.259.312)

Title : LSIO 2
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 23 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com U2000D
3 2

+1P2V
+3VSUS
+1P2V 7,10,16,17,18,57,83
+3VSUS 7,21,22,23,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96
1

+3VSUS_ORG +3VSUS_ORG 7,21,22,23,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96

GSPI +3V +3V 57,68,91,92
+3VS +3VS 7,16,21,22,23,28,30,31,32,33,36,44,45,48,50,51,57,70,74,87,88,89,91,92,96
+VCCDSW +VCCDSW 7,21,22,23,26,28,30,31,33,36,44,48,53,68,74,81,88,92,96
GPP_B18 IPD 20KBE30 GPP_B18/GSPI0_MOSI
T2401 1 GPP_B17 GPI BD29 BE29 GPP_B0 1 T2439
1 GPP_B17/GSPI0_MISO GPP_B0/GSPI0_CS1#
571391_CFL_H_PDG_Rev1p0_P.329/661 T2402 GPP_B16 GPI BF29 GPP_B16/GSPI0_CLK GPP_B1/GSPI1_CS1#/TIME_SYNC1
BF33 GPP_B1 1 T2440
T2403 1 GPP_B15 GPI BB26 BE32 GPP_B2 1 T2438
Generic Serial Peripheral Interface (GSPI): GPP_B15/GSPI0_CS0# GPP_B2/VRALERT# BF32 GPP_B3 R2411 1 2
GSPI signals are multiplexed with GPIOs and default to GPIO GPP_B3/CPU_GP2 BC33 GPP_B4 R2475 1 2 THRO_GPU# 74
functionality. If GSPI interface is not used, the signals can be GPP_B4/CPU_GP3 OP_SD# 36
BBS IPD 20KBA26 GPP_B22/GSPI1_MOSI 571391_CFL_H_PDG_Rev1p0_P.213-214/661
used as GPIOs instead. If the GPIO functionality is also not T2405 1 GPP_B21 GPI BD30 GPP_B21/GSPI1_MISO GPP_B5/SRCCLKREQ0#
BF31 GPI CLK_REQ0_WLAN#_R SP2402 1 2
CLK_REQ0_WLAN# 53 (1)Any un-used SRCCLKRQ# signal must be left as no connects.
used, the signals can be left as no-connect. T2406 1 GPP_B20 GPI AU26 BE31GPI
T2407 1 GPP_B19 GPIAW26
GPP_B20/GSPI1_CLK GPP_B6/SRCCLKREQ1# AR32GPI (2) Figure 12-7,pull high 10K ohm
GPP_B19/GSPI1_CS0# GPP_B7/SRCCLKREQ2# BB30GPI
GPP_B8/SRCCLKREQ3# BA30GPI
GPP_B9/SRCCLKREQ4# AN29GPI
GPP_B10/SRCCLKREQ5# AP29GPO GPP_B11 1 T2419
D
GPP_B11/I2S_MCLK

ISH_I2C
T2408 1 GPP_H20 GPI AG45
1 GPP_H20/ISH_I2C0_SCL
T2409 GPP_H19 GPI AH46 GPP_H19/ISH_I2C0_SDA
T2410 1 GPP_H22 GPI AH47
1 GPP_H22/ISH_I2C1_SCL
T2411 GPP_H21 GPI AH48 GPP_H21/ISH_I2C1_SDA
AC_IN_OC 30,88
AE47GPI
GPP_H0/SRCCLKREQ6# AC48GPI CLK_REQ7_SSD#_R SP2403 1 2
GPP_H1/SRCCLKREQ7# CLK_REQ7_SSD# 51 +3VSUS
AE41GPI
GPP_H2/SRCCLKREQ8# AF48 GPI CLK_REQ9_PEG#_R SP2404 1 2
GPP_H3/SRCCLKREQ9# AC41GPI CLK_REQ9_PEG# 70
571391_CFL_H_PDG_Rev1p0_P.429-430/661 CLK_REQ10_LAN#_R SP2405 1 2
R1.1 modify
GPP_H4/SRCCLKREQ10# AC39GPI CLK_REQ10_LAN# 33
(1)SLP_S5# is a PCH signal which indicates the system is in the GPP_H5/SRCCLKREQ11# AE39GPI
ACPI S5 State.If S5 state indication is not required this pin may GPP_H6/SRCCLKREQ12#

1
AB48GPI
be left as no connect or configured as GPIO. GPP_H7/SRCCLKREQ13# AC44GPI R2458
GPP_H8/SRCCLKREQ14#
(2)SLP_SUS# is a PCH signal which indicates that the system is GPP_H9/SRCCLKREQ15#
AC43GPI 10KOhm
in Deep Sx state.If Deep Sx is not implemented on the platform, @

11
this signal may be left as no connect.

2
@

G
3 2
PCIE_WAKE# 33,53

S 2
T2412 1 SLP_S0# BC28

D
R2401 1 2 SLP_S3#_R BF42 GPP_B12/SLP_S0# Q2401
30,68 PM_SUSB# GPD4/SLP_S3#
R2402 1 2 SLP_S4#_R BE42 2N7002
30,68 PM_SUSC# GPD5/SLP_S4#
T2441 1 SLP_S5# BC42
1 ME_PM_SLP_A#_R BE40 GPD10/SLP_S5#
571391_CFL_H_PDG_Rev1p0_P.430/661 T2442
GPD6/SLP_A# 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.93/224
T2443 1 SLP_WLAN# BD42 R2460 1 2 0Ohm
SLP_LAN# can also be configured by Intel ME FW or host BIOS T2444 1 SLP_LAN# BF40 GPD9/SLP_WLAN# R2417=330K ohm
to indicate when the Wireless LAN should be powered in S3-S5 T2445 1 PM_SLP_SUS#_R BD39 SLP_LAN#
to support Wake on Wireless LAN (Host or Intel ME). SLP_SUS# CRB是330K ohm,的的是的1M ohm
+1P2V
C +1.05V C
BF41 DSW 3.3V GPD11 1 T2420
GPD11/LANPHYPC BF44 DSW 3.3V BATLOW#
R2403 GPD0/BATLOW# BG42DSW 3.3VIPD 20K 1 2
AC_PRESENT_R R2416
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.41/224 470Ohm GPD1/ACPRESENT ME_AC_PRESENT 30

1
BG44DSW 3.3VIPD 20K LAN_WAKE#
GPD2/LAN_WAKE# BE41DSW 3.3V GPD7
GPD7
R2419 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.17/224
BB47 PCIE_WAKE#_PCH
ALL_SYS_PWRGD delay 99 ms from EC WAKE# BB44RTC INTRUDER# R2417 1 2 1MOhm
1KOhm R=1K ohm
SP2401 1 2 0Ohm CPUDRAMRST# INTRUDER# AW29IPD 20K
+VCC_RTC
16,17 DRAMRST_R# SB_SPKR
GPP_B14/SPKR

2
BE46DSW 3.3VIPU 20K
GPD3/PWRBTN# PM_PWRBTN# 30
1

SHORT PIN 0402 AD3 PCH_THMTRIP# R2418 1% 620Ohm

THRMTRIP# H_THMTRIP# 7,32
C2401 BE45DSW 3.3V SUS_CLK SUS_CLK 53
GPD8/SUSCLK
0.1UF/16V
2

@ OD BB46 DRAM_RESET# 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.41/224

PLTRST_CPU# AG5
7 PLTRST_CPU#
PLT_RST# AV29 PLTRST_CPU# R=30 ohm
30,68 SYS_PWROK R2415 1 2 SYS_PWROK_R AU3 GPP_B13/PLTRST#
SYS_PWROK 571391_CFL_H_PDG_Rev1p0_P.225/661 CRB是30 ohm,acer的的的是的620 ohm
R2406 1 2 10KOhm PM_SYS_RESET# AU2
+3VSUS_ORG
R2468 1 2 H_CPUPWRGD AE3 SYS_RESET# R=620 OHM
7 CPUPWRGD CPUPWRGD
PM_PWROK R2469 1 2 PM_PCH_PWROK AY42
R2410 1 2 PM_RSMRST_R BA47 PCH_PWROK
30 PM_RSMRST# RSMRST# 546884_SKL_PDG_H_rev2_0 p662
PM_RSMRST_R R2470 1 2 PCH_DPWRK_DSW_R AW41
R2412 1 2 20KOhm SRTC_RST# BD46 DSW_PWROK All unused GPIOs (which default to GPIO functionality) do not need termination.
+VCC_RTC SRTCRST#
AE48GPI GPP_H10 1 T2423
571391_CFL_H_PDG_Rev1p0_P.429/661 CRB是30.1K ohm,
C2402 C2406
GPP_H10/SML2CLK
GPP_H11/SML2DATA
AD47GPI GPP_H11 1 T2424 @
1

AB47IPD 20K GPP_H12 R2483 1 2 100KOhm

Designers can connect the System Reset signal 1UF/6.3V 1UF/6.3V
JRST2402 GPP_H12/SML2ALERT# GND
(SYS_RESET#) on PCH directly to the reset button on the +3VSUS_ORG
1

0201 0201 AF47 GPI 1

SGL_JUMP GPP_H13 T2426
system, provided that there is a weak 8.2 K -10 K pull-up X5R/+/-20% X5R/+/-20% GPP_H13/SML3CLK
2

AP3 AD48GPI 1
2

@ GPP_H14 T2427
@ GPP_I11/M2_SKT2_CFG0 GPP_H14/SML3DATA
resistor to Primary 3.3 V (VCCPRIM_3p3) or pull-up to any 3.3V AP2
GPP_I12/M2_SKT2_CFG1 GPP_H15/SML3ALERT#
AC47GPI GPP_H15 R2482 1 2 100KOhm
2

rails that is controlled by SLP_S3# or SLP_S4# or SLP_S5# signals.

571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.93/224 AN4
AM7 GPP_I13/M2_SKT2_CFG2 AE43GPI GPP_H16 1 T2429
R2412=30.1K ohm GPP_I14/M2_SKT2_CFG3 GPP_H16/SML4CLK AJ46 GPI GPP_H17 1 T2430
When SYS_RESET# is connected to a XDP header, it will GPP_H17/SML4DATA AE44GPI GPP_H18 1
require a stronger pull up to work with ITP hardware. Use 100-3K571391_CFL_H_PDG_Rev1p0_P.379/661GND
T2431
GND GPP_H18/SML4ALERT#
ohm pull-up whenever it is connected to a XDP header. R=20K ohm,C=1uF AJ47 GPI GPP_H23 1 T2432 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.57/312 571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.141/312
GPP_H23/TIME_SYNC0 SPKR - Internal weak pull down SPKR/ GPP_B14: pull down 20K ohm
Recommend to use 3 K to minimize leakage.
0 : Disable TOP Swap mode (default)
+3VS 1 : Enable Top Swap Enable 571391_CFL_H_Schematic Checklist_Rev1p0_p.38/79
B +3VSUS +3V
SPKR/ GPP_B14:This signal has an integrated weak pull-down resistor B
R2425 1 @ 2 20KOhm SB_SPKR R2426 1 @ 2 4.7KOhm (20 KΩ nominal) to disable Top-Block Sway by default.
+3VSUS_ORG To enable Top-Block Swap, this signal should be pulled
up to V3.3S through a 1k to 2.2 KΩ ±5% resistor
GND Default is GPO, to reserve pull high to +3VSUS_ORG
2

R2427 1 @ 2 4.7KOhm
R2479 R2478
@ 0Ohm @ 0Ohm PCH-H
+3VS
571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.57/312 571391_CFL_H_Schematic Checklist_Rev1p0_p.38/79
GSPI0_MOSI / GPP_B18 - Internal weak pull down 20k ohm GSPI0_MOSI/ GPP_B18:
1

GPP_B18 R2428 1 @ 2 4.7KOhm 0 : Disable No Reboot mode(default) This signal has an integrated weak pull-down resistor (20 KΩ
1 : Enable NO Reboot Enable mode nominal) to disable the no reboot strap functionality by default.
U2401 @
+3VSUS_ORG To enable no reboot on TCO Timer expiration, this signal
1 5 should be pulled-up to V3.3S through a 1k to 2.2 KΩ ±5%
A VCC R2429 1 @ 2 4.7KOhm
PLT_RST# 2 resistor.
3 B 4 Default is GPO, to reserve pull high to +3VSUS_ORG
P.141/312 有Pull dowm電電20K ohm,pull high 2.2K
GND Y BUF_PLT_RST# 30,31,32,33,51,53,74
+3VSUS_ORG
1

SN74LVC1G08DCKR
571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.58/312
ohm_20170904
1

R2485 C2403 GND C2405 R2421 1 2 4.7KOhm

BBS R2430 @
100KOhm 100PF/50V 100PF/50V 10KOhm BBS - Internal weak pull down 20k ohm
@ @ R2420 1 2 @
R2431 1 @ 2 20KOhm Boot BIOS Strap
2

0 : SPI destination (default)

2

1 : LPC destination
GND
GND GND GND GND
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.108/224
Pull dowm 20K ohm
+3VSUS
+VCCDSW
@
R2422 1 @ 2 0Ohm
30,92 ALL_SYSTEM_PWRGD BATLOW# R2454 1 2 10KOhm
U2402 +3VSUS
R2407 1 @ 2 0Ohm ALL_SYSTEM_PWRGD_PMOK 1 A 5
7,68 DELAY_ALL_SYSTEM_PWRGD VCC LAN_WAKE# R2455 1 @ 2 10KOhm
CLK_REQ0_WLAN#_R R2404 1 2 10KOhm CFL_H_Schematic Checklist_Rev1p0_p.29/79
D2401 1 2 1.2V/0.1A VR_READY_PMOK 2 B
1 2
80,92 VRM_PWRGD PCIE_WAKE#_PCH R2456 10KOhm
@ CLK_REQ10_LAN#_R R2459 1 2 10KOhm
1 K pull-up to VCCDSW_3p3.
3
GND
4 PM_PWROK
AC_PRESENT_R R2457 1 @ 2 10KOhm 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_p.115/224
R2466 1 2 Y 1k pull high
1

Vcc=2~5.5 R1.1 modify

要要要1k pull high
+3VS GPD7 R2480 1 2 10KOhm
1

R2424 C2404
10KOhm 1000PF/50V EMI
PLT_RST# D2402 1 2 1.2V/0.1A @ 10% PM_PWROK reserve 1000pF Cap. 571391_CFL_H_Schematic Checklist_Rev1p0_p.29/79
2

A
@
R2423 1 2 ACPRESENT/ GPD1:10 kΩ pull-down to GND. A
2

要要要10k pull down

1

CLK_REQ0_WLAN#_R R2439 1 2 10KOhm

@
R2467 GND GND
100KOhm CLK_REQ7_SSD#_R R2441 1 2 10KOhm
@

571391_CFL_H_Schematic Checklist_Rev1p0_p.38/79 CLK_REQ9_PEG#_R R2442 1 2 10KOhm

2

GPD7 R2481 1 @ 2 10KOhm

SRCCLKREQ#[15:0]: CLK_REQ10_LAN#_R R2443 1 2 10KOhm
GND 1. Any used, enabled - SRCCLKREQ# signal should connect to @
AC_PRESENT_R R2484 1 @ 2 10KOhm
a PCIe* connector pin or a device down ball with a 10K Ohm
±10% external pull-up.
2. Any un-used, disabled - SRCCLKREQ# signal must be left as
Title : LSIO 3
PEGATRON PROPRIETARY AND CONFIDENTIAL
no connects at the PCH side on the platform
GND BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 24 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

+VCC_RTC +VCC_RTC 24,26

+3VA +3VA 30,57,66,74,81,88,93

U2000C nb_r0402_short_5mil_small
nb_r0402_short_5mil_small

CLOCK
SP2501 1 2 CK_100M_85OHM_BCK B8 AJ7 CLK_PCIE_WLAN_PCH_R SP2507 1 2
7
7
CK_100M_BCK
CK_100M_BCK#
SP2502 1 2 CK_100M_85OHM_BCK# C8 CLKOUT_CPUBCLK_P
CLKOUT_CPUBCLK_N
CLKOUT_PCIE_P0
CLKOUT_PCIE_N0
AJ6 CLK_PCIE_WLAN#_PCH_R SP2508 1 2 CLK_PCIE_WLAN_PCH
CLK_PCIE_WLAN#_PCH
53
53 M.2 WLAN CARD
SP2503 1 2 CK_24M_85OHM_BCK D7 AH10
7 CK_24M_BCK CLKOUT_CPUNSSC_P CLKOUT_PCIE_P1
SP2504 1 2 CK_24M_85OHM_BCK# C6 AH9
7 CK_24M_BCK# CLKOUT_CPUNSSC_N CLKOUT_PCIE_N1
D D
SP2505 1 2 CK_100M_85OHM_PCIE A6 AE15
7 CK_100M_PCIE CLKOUT_CPUPCIBCLK_P CLKOUT_PCIE_P2
SP2506 1 2 CK_100M_85OHM_PCIE# B6 AE14
7 CK_100M_PCIE# CLKOUT_CPUPCIBCLK_N CLKOUT_PCIE_N2
T2501 1 CK_100M_85OHM_CPUXDP Y4 AE7
T2502 1 CK_100M_85OHM_CPUXDP# Y3 CLKOUT_ITPXDP_P CLKOUT_PCIE_P3 AE6
CLKOUT_ITPXDP_N CLKOUT_PCIE_N3
AC3
CLKOUT_PCIE_P4 AC2
CLKOUT_PCIE_N4
AB3
CLKOUT_PCIE_P5 AB2
CLKOUT_PCIE_N5 nb_r0402_short_5mil_small
W3
CLKOUT_PCIE_P6 W4
CLKOUT_PCIE_N6
571391_CFL_H_PDG_Rev1p0_P.217/661
W6 CLK_PCIE_SSD_PCH_R SP2509 1 2

R2507 2 1% 1 60.4Ohm XCLK_BIASREF T3

CLKOUT_PCIE_P7
CLKOUT_PCIE_N7
W7 CLK_PCIE_SSD#_PCH_R SP2510 1 2 CLK_PCIE_SSD_PCH
CLK_PCIE_SSD#_PCH
51
51 M.2 PCIEx4 SSD CARD
GND XCLK_BIASREF AC15
R2508 2 1% 1 100Ohm PCIE_RCOMPP A13 CLKOUT_PCIE_P8 AC14
PCIE_RCOMPN B12 PCIE_RCOMPP CLKOUT_PCIE_N8
PCIE_RCOMPN U3 CLK_PCIE_PEG_PCH_R SP2511 1 2
571391_CFL_H_PDG_Rev1p0_P.240/661
CLKOUT_PCIE_P9
CLKOUT_PCIE_N9
U2 CLK_PCIE_PEG#_PCH_R SP2512 1 2 CLK_PCIE_PEG_PCH
CLK_PCIE_PEG#_PCH
70
70 GPU
AC11 CLK_PCIE_LAN_PCH_R SP2513 1 2

T2505 1 TP1 AL35

CLKOUT_PCIE_P10
CLKOUT_PCIE_N10
AC9 CLK_PCIE_LAN#_PCH_R SP2514 1 2 CLK_PCIE_LAN_PCH
CLK_PCIE_LAN#_PCH
33
33 LAN
T2506 1 TP2 AN35 TP_1 AE11
TP_2 CLKOUT_PCIE_P11 AE9
AH15 CLKOUT_PCIE_N11
T2503 1 TP_PCH_RSVD_BD1 R32 RSVD_19 AC6
T2504 1 TP_PCH_RSVD_BE2 N32 RSVD_20 CLKOUT_PCIE_P12 AC7
U35 RSVD_21 CLKOUT_PCIE_N12
U37 RSVD_22 Y2
R15 RSVD_23 CLKOUT_PCIE_P13 AA1
570805_CFL_Processor_EDS_Vol1_Rev_1.4_P.123/156 R13 RSVD_24 CLKOUT_PCIE_N13
The following are the general types of reserved (RSVD) signals and connection U13 RSVD_25 T1
RSVD_26 CLKOUT_PCIE_P14
guidelines: Y35
RSVD_27 CLKOUT_PCIE_N14
T2
Y36
RSVD : these signals should not be connected Y15 RSVD_28 V3
C
RSVD_TP: these signals should be routed to a test point Y14 RSVD_29 CLKOUT_PCIE_P15 V2 C
RSVD_NCTF :these signals are non-critical to function and may be left unconnected RSVD_30 CLKOUT_PCIE_N15
BE3
CNV_WR_CLKP BD4 CNV_WR_CLKP 53
CNV_WR_CLKN CNV_WR_CLKN 53
BB6
+VCC_RTC CNV_WT_CLKP CNV_WT_CLKP 53
BC5
CNV_WT_CLKN CNV_WT_CLKN 53

571391_CFL_H_PDG_Rev1p0_P.381/661
R2509 1 2 20KOhm RTC_RST# RTC_RST# BE47 571391_CFL_H_PDG_Rev1p0_P215/661
RTCRST# U10 XTAL_24M_IN R2526 1 2 XTAL_24M_IN_R
XTAL_32K_X2_R R2513 1 2 XTAL_32K_X2 BA48 XTAL_IN U9 XTAL_24M_OUT R2534 1 2 XTAL_24M_OUT_R
Ce = 2 * [CL - (Cs + Ci)], where:
R2540 1 2 XTAL_32K_X1 BA49 RTCX2 XTAL_OUT ‧ Ce = External Load Capacitor Value = Ce1 = Ce2
RTCX1 ‧ CL = Specified Crystal Capacitive Load = 12pF
1

F4 USB2_COMP 1%
C2501 C2508 USB2_COMP
1

JRST2501 R2512 1 2 10MOhm R2527 1 2 200KOhm —Found in crystal component data sheet
1

1UF/6.3V 1UF/6.3V
0201 0201
SGL_JUMP
53 CLKIN_XTAL
CLKIN_XTAL R6
CLKIN_XTAL RSVD_17
BC1 RSVD_17 1 T2507 ‧ Cs = Board Trace Capacitance = < 3pF
AH14
2

@
X5R/+/-20% X5R/+/-20% RSVD_18 —Includes crystal pad capacitance
2

2
24MHZ
‧ Ci = PCH Pin Capacitance = < 2 to 3pF

1
@ 32.768KHZ
2

BA1 CNV_WT_RCOMP R2528

X2501 1 4 XTAL_32K_X1_R R2539 CNV_WT_RCOMP 1% 113Ohm X2502 1 3
10KOhm
AK2 BE5 SD_1P8_RCOMP R2537 1% 200Ohm
TRIGGER_IN SD_1P8_RCOMP

1
1

1
GND GND AK3 BE4 SD_3P3_RCOMP R2538 1% 200Ohm 1% 07T080016M00
2

2
TRIGGER_OUT SD_3P3_RCOMP

4
C2502 C2503 R2535 C2504 C2505 571391_CFL_H_PDG_Rev1p0_P215/661
BD1 GPPJ_RCOMP_1P8 R2536 1% 200Ohm 150Ohm
18PF/50V 18PF/50V GPPJ_RCOMP_1P8_1 10PF/50V 10PF/50V Table 12-8. Ce1=Ce2= 18pF +/-10%
2

2
BE1
GPPJ_RCOMP_1P8_2
3

3 BE2
D GPPJ_RCOMP_1P8_3 R1.1 modify

2
GND GND GND
30 SW_RTCRST R2510 1 @ 2 0Ohm 11 PCH-H GND GND GND GND GND GND GND
G Q2501 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.93/224
2 S 2N7002
2
1

@ CFL_H_Schematic Checklist_Rev1p0_p.56
R2511
10KOhm
CNV_WT_RCOMP :150 ohm ± 1% Pull-down to GND
7 H_TRIGOUT 1 2 30OHM PCH_TGR_L900MIL
@ 7 H_TRIGIN R2541
571391_CFL_H_PDG_Rev1p0_P.341/661
2

(1) SD_3P3_RCOMP:External Reference (200 Ohm+/- 1% pull down to ground)

(2) SD_1P8_RCOMP:External Reference (200 Ohm+/- 1% pull down to ground)
B B

R1.1 modify 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.95/224

GPPJ_RCOMP_1P8:
GND R=200 ohm

+3VA
R1.1 modify
VCCRTC is sourced from Vbatt in G3 or VCCDSW_3p3 in
1

Non-G3 state, platform designers must ensure the R2530

effective voltage at VCCRTC does not exceed 3.2V. 0Ohm

571391_CFL_H_PDG_Rev1p0_P.379/661
2

Figure33-2 3.19V~3.18V

FX505 RF reserve @20180131

1

R2531
+VCC_RTC 45.3KOhm C2507
1% 10PF/50V
2

@
@

GND GND
D2501
1
3
2
+RTCBAT
0.8V/0.2mA

C2506 C2509 5%
1

+RTC_BAT R2533 1 2 1KOhm

1UF/6.3V 1UF/6.3V
0201 0201
A X5R/+/-20% X5R/+/-20% A
2

@ CON2501
1

BATT_HOLDER_2P
GND 3
4
2

12T20GBSM000

GND Title : CLK

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 25 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+VCCPAZIO +VCCPAZIO 23

+VCC_RTC +VCC_RTC 24,25

+3VSUS +3VSUS 7,21,22,23,24,28,30,31,33,36,44,48,53,68,74,81,88,92,96

+1.05VSUS +1.05VSUS 82

+1.8VSUS +1.8VSUS 21,53,84

+VCCDSW +VCCDSW 7,21,22,23,24,28,30,31,33,36,44,48,53,68,74,81,88,92,96

D +3VSUS_ORG +3VSUS_ORG 7,21,22,23,24,28,30,31,33,36,44,48,53,68,74,81,88,92,96 D

+VCCPGPPA +VCCPGPPA 22

+VCCPGPPA
+1.05VSUS +VCCAZPLL_1P05 U2000G

6.994A 0.015A D1
PRIMARY_1P05 VCCPGPP
E1 VCCPRIM_1P05_1 AN32 1 2 0Ohm
VCCPRIM_1P05_2 VCCPGPPA 0.101A +VCCPGPPA R2618 +3VSUS_ORG
C2631 C2601 +1.05VSUS
+VCCFHV0_2P8 0.0859AAF31 VCCPRIM_1P05_3

1
1UF/6.3V 1UF/6.3V +1.05VSUS
+VCCFHV1_2P8 0.193A AG31 VCCPRIM_1P05_4 VCCPGPPG_3P3
AN21 0.145A +VCCPGPPG_3P3 R2619 1 2 0Ohm
+3VSUS_ORG
C2602 C2603 +VCCPRIM_CNV_HVLDO_1P05 0.2A AE17 +3VSUS_ORG
0201 0201 +1.05VSUS VCCPRIM_1P05_28
@ 1PF/50V @ 1PF/50V
X5R/+/-20% X5R/+/-20% +1.05VSUS
+VCCPRIM_FUSE_1P05 0.0012AAD31 VCCPRIM_1P05_29

2
U26 AE35 0.174A +VCCPGPPEF
@ U29 VCCPRIM_1P05_5 VCCPGPPEF_1 AE36
VCCPRIM_1P05_6 VCCPGPPEF_2

1
V25
V27 VCCPRIM_1P05_7 AN26 1 2 0Ohm
VCCPRIM_1P05_8 VCCPGPPBC_1
0.343A +VCCPGPPBC R2621 +3VSUS_ORG C2629 C2616
+1.05VSUS +VCCMPHY_1P05 V28 AP26 10PF/50V 0.1UF/6.3V
VCCPRIM_1P05_9 VCCPGPPBC_2

2
V30 @ @
V31 VCCPRIM_1P05_10 AN24 +VCCPGPPD 1 2 0Ohm
6.66A VCCPRIM_1P05_11 VCCPGPPD
0.14A R2622 @ +1.8VSUS
AA22 GND +3VSUS_ORG
AA23 VCCPRIM_1P05_12 R2640 1 2 0Ohm
C2632 C2605 VCCPRIM_1P05_13 +VCCPRIM_1P8

1
AB20 AC35 0.262A +VCCPGPPHK
1UF/6.3V 1UF/6.3V AB22 VCCPRIM_1P05_14 VCCPGPPHK_1 AC36
C2604
0201 0201 VCCPRIM_1P05_15 VCCPGPPHK_2

1
22UF/6.3V AB23
X5R/+/-20% X5R/+/-20% VCCPRIM_1P05_16

2
AB27 C2630 C2617
@ VCCPRIM_1P05_17 +VCCPSPI +3VSUS_ORG
AB28 10PF/50V 0.1UF/6.3V
VCCPRIM_1P05_18

2
AB30
AD20 VCCPRIM_1P05_19 SPI AN44 0.05A +VCCPSPI R2624 1 2 0Ohm
@ @

+1.05VSUS +VCCPRIM_1P05 AD23 VCCPRIM_1P05_20 VCCSPI

AD27 VCCPRIM_1P05_21
AD28 VCCPRIM_1P05_22
5.95A

FX505 RF reserve @20180131

AD30 VCCPRIM_1P05_23
AF23 VCCPRIM_1P05_24
DMI: 125*4 = 500 C2633 C2606 VCCPRIM_1P05_25

1
+VCCPRIM_1P8 +1.8VSUS
USB3.1: 125*5 =625 1UF/6.3V 1UF/6.3V
AF27
AF30 VCCPRIM_1P05_26 VCCPRIM_1P8
0201 0201
PCIE Gen3: 148*8 = 1184 X5R/+/-20% X5R/+/-20%
VCCPRIM_1P05_27 AG19 0.766A +VCCPRIM_1P8 R2625 1 @ 2 0Ohm
VCCPRIM_1P8_1

2
SATA:126*1 =126 @ VCCPRIM_1P8_2
AG20
C2618 C2637

1
AN15
PCIE Gen2: 123*2 =246 VCCPRIM_1P8_3 AR15 1UF/6.3V 1UF/6.3V
C2619
Total = 2820 +1.05VSUS +VCCA_BCLKPLL2_1P05
VCCAPLL_1P05
VCCPRIM_1P8_4 BB11 0201 0201
4.7UF/6.3V
C VCCPRIM_1P8_5 X5R/+/-20% X5R/+/-20% C

2
1 2 0Ohm @
R2606 0.021A B1 VCCAPLL_1P05_1
B2
C2639 C2626 VCCAPLL_1P05_2
1

1
B3
1UF/6.3V 1UF/6.3V 1 2 0Ohm VCCAPLL_1P05_3
0201 0201 +1.05VSUS R2607 +VCCA_OCPLL1_1P05 0.0198A C1 VCCAPLL_1P05_4
C2
X5R/+/-20% X5R/+/-20% C2634 C2607 VCCAPLL_1P05_5
2

1
@ 1UF/6.3V 1UF/6.3V
0201 0201
X5R/+/-20% X5R/+/-20% VCCDUSB_1P05

2
+1.05VSUS +VCCDUSB_1P05
@ +3VSUS_ORG
W22
VCCDUSB_1P05_1
0.42A W23
VCCDUSB_1P05_2 PRIMARY_3P3 +VCCPHVLDO_3P3 +3VSUS_ORG
AT44 0.106A +VCCPFUSE_3P3 R2637 1 2 0Ohm
VCCPRIM_3P3_1
1

AW9 0.182A +VCCPHVC_3P3 R2638 1 2 0Ohm

VCCPRIM_3P3_2 +3VSUS_ORG
C2608 VCCPRIM_MPHY_1P05 VCCPRIM_3P3_3
AY8 0.97A +VCCPHVLDO_3P3 R2633 1 2 0Ohm
0.1UF/6.3V BB7
571391_CFL_H_PDG_Rev1p0 p624 VCCPRIM_3P3_4 C2620 C2638
2

1
@ +1.05VSUS
+VCCCLPLLEBB_1P05 0.109AW31 VCCPRIM_MPHY_1P05 VCCPRIM_3P3_5
V23 0.095A +VCCPUSB2_3P3 R2639 1 2 0Ohm
+3VSUS_ORG 1UF/6.3V 1UF/6.3V
tx_r0805_short
2.2 uH Rated at least 100 mA DCR = 0.33Ω +/- 30% C2621
0201 0201

1
22 uF 0.1UF/6.3V
X5R/+/-20% X5R/+/-20%

2
C2609 VCCAMPHYPLL_1P05 @
@
0.1UF/6.3V

2
+1.05VSUS +VCCAMPHYPLL_1P05 0.213A C49 VCCAMPHYPLL_1P05_1 +VCCPHVLDO_1P8 +VCCPRIM_1P8
D49
VCCAMPHYPLL_1P05_2 VCCPHVLDO
R2610 1 2 0Ohm E49
VCCAMPHYPLL_1P05_3 AF19 1 2 0Ohm
C2635 C2611 VCCPHVLDO_1P8_1 0.882A R2634
1

AF20
1UF/6.3V 1UF/6.3V VCCPHVLDO_1P8_2
C2610
0201 0201 VCCDPHY_1P24
+1.24VSUS 22UF/6.3V R2611 1 2 0Ohm +VCCDPHY_1P24 AJ22
X5R/+/-20% X5R/+/-20% +1.24VSUS VCCDPHY_1P24_1
2

@ AJ23
1 2 0Ohm @ BG5 VCCDPHY_1P24_2
R2612 +VCCDPHY_1P24_MAR
R2613 1 2 0Ohm +VCCLDOSRAM_IN_1P24 AK22 VCCDPHY_1P24_3
+1.24VSUS VCCDPHY_1P24_4
1

AK23
C2612 VCCDPHY_1P24_5
4.7UF/6.3V +1.05VSUS +VCCA_OC_1P05 +VCCPDSW_3P3 +VCCDSW
2

571391_CFL_H_PDG_Rev1p0 p479 0.0085AV19 VCCA_BCLK_1P05 VCCDSW_3P3_1

BE48 0.113A R2635 1 2 0Ohm
BE49
When CNVi is not used in the design: VCCDSW_3P3_2
1

1
‧ VCCDPHY_1P24 pin shall be disconnected from the VCCLDOSRAM_IN_1P24 pin. C2613 +VCCPAZIO +3VSUS_ORG C2622
‧ The decoupling capacitor shall remain connected to the VCCDPHY_1P24 pin. +1.05VSUS +VCCA_SRC_1P05 0.1UF/6.3V 0.1UF/6.3V
2

2
B @ 0.169AW19 VCCA_SRC_1P05_1 VCCHDA
BB14 0.00767A R2636 1 2 0Ohm @ B
W20
VCCA_SRC_1P05_2

1
+1.05VSUS +VCCA_XTAL_1P05 +1.05VSUS C2624 C2623
@ 1PF/50V @ 1PF/50V

2
R2616 1 2 0Ohm 0.00428AP2 K47 VCCMPHY_SENSE R2641 1 @ 2 100Ohm
P3 VCCA_XTAL_1P05_1 VCCMPHY_SENSE K46 VSSMPHY_SENSE
VCCA_XTAL_1P05_2 VSSMPHY_SENSE
1

C2614

1
571391_CFL_H_PDG_Rev1p0 p624 22UF/6.3V +VCCDSW_1P05 BG45
VCCDSW_1P05_1
2

BG46 BF47 +VCCRTCEXT

2.2 uH Rated at least 100 mA DCR = 0.33Ω +/- 30%@ C2636 C2615 VCCDSW_1P05_2 DCPRTC_1
1

BG47 R2642
22 uF 1UF/6.3V 1UF/6.3V DCPRTC_2 100Ohm
0201 0201

1
@
X5R/+/-20% X5R/+/-20%
2

2
+VCC_RTC +VCCPRTC_3P3 C2625
@
CRB/PDG@ BC49
0.000416A CRB/PDG@ 0.1UF/6.3V
VCCRTC_1

2
SP2601 2 1 0Ohm EDS:Stuff BD49 EDS:Stuff
VCCRTC_2
C2640 C2627
1

tx_r0603_short
1UF/6.3V 1UF/6.3V
C2628
0201 0201
0.1UF/6.3V
X5R/+/-20% X5R/+/-20%
2

+3VSUS_ORG/+1.8VSUS to +1.0VSUS >200us (tPCH06)

+3VSUS +3VSUS_ORG PCH-H

2.234A 2.6884A

+3VSUS_ORG +VCCDSW

A A

Title : VCC/PLL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 26 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4 3
Vinafix.com 2 1

D D

U2000H U2000I U2000J

M5 Y9
AL37 AG28 AT26 C12 N12 VSS_201 VSS_247 Y38
A2 VSS_1 VSS_51 AG30 AT29 VSS_101 VSS_151 C25 N16 VSS_202 VSS_246 Y33
A28 VSS_2 VSS_52 AG49 AT32 VSS_102 VSS_152 C30 N34 VSS_203 VSS_245 Y17
A3 VSS_3 VSS_53 AH12 AT34 VSS_103 VSS_153 C4 N35 VSS_204 VSS_244 Y12
A33 VSS_4 VSS_54 AH17 AT45 VSS_104 VSS_154 C48 N37 VSS_205 VSS_243 Y10
A37 VSS_5 VSS_55 AH33 AV11 VSS_105 VSS_155 C5 N38 VSS_206 VSS_242 W30
A4 VSS_6 VSS_56 AH38 AV39 VSS_106 VSS_156 D12 P26 VSS_207 VSS_241 W28
A45 VSS_7 VSS_57 AJ19 AW10 VSS_107 VSS_157 D16 P29 VSS_208 VSS_240 W27
A46 VSS_8 VSS_58 AJ20 AW4 VSS_108 VSS_158 D17 P4 VSS_209 VSS_239 W25
A47 VSS_9 VSS_59 AJ25 AW40 VSS_109 VSS_159 D30 P46 VSS_210 VSS_238 V46
A48 VSS_10 VSS_60 AJ27 AW46 VSS_110 VSS_160 D33 R12 VSS_211 VSS_237 V4
A5 VSS_11 VSS_61 AJ28 B47 VSS_111 VSS_161 D8 R16 VSS_212 VSS_236 V22
A8 VSS_12 VSS_62 AJ30 B48 VSS_112 VSS_162 E10 R26 VSS_213 VSS_235 V20
AA19 VSS_13 VSS_63 AJ31 B49 VSS_113 VSS_163 E13 R29 VSS_214 VSS_234 U38
AA20 VSS_14 VSS_64 AK19 BA12 VSS_114 VSS_164 E15 R3 VSS_215 VSS_233 U33
AA25 VSS_15 VSS_65 AK20 BA14 VSS_115 VSS_165 E17 R34 VSS_216 VSS_232 U24
C AA27 VSS_16 VSS_66 AK25 BA44 VSS_116 VSS_166 E19 R38 VSS_217 VSS_231 U21 C
AA28 VSS_17 VSS_67 AK27 BA5 VSS_117 VSS_167 E22 R4 VSS_218 VSS_230 U17
AA30 VSS_18 VSS_68 AK28 BA6 VSS_118 VSS_168 E24 T17 VSS_219 VSS_229 U15
AA31 VSS_19 VSS_69 AK30 BB41 VSS_119 VSS_169 E26 T18 VSS_220 VSS_228 U12
AA49 VSS_20 VSS_70 AK31 BB43 VSS_120 VSS_170 E31 T32 VSS_221 VSS_227 T7
AA5 VSS_21 VSS_71 AK4 BB9 VSS_121 VSS_171 E33 T4 VSS_222 VSS_226 T5
AB19 VSS_22 VSS_72 AK46 BC10 VSS_122 VSS_172 E35 VSS_223 VSS_225 T49
AB25 VSS_23 VSS_73 AL12 BC13 VSS_123 VSS_173 E40 VSS_224
AB31 VSS_24 VSS_74 AL17 BC15 VSS_124 VSS_174 E42
AC12 VSS_25 VSS_75 AL21 BC19 VSS_125 VSS_175 E8
AC17 VSS_26 VSS_76 AL24 BC24 VSS_126 VSS_176 F41
AC33 VSS_27 VSS_77 AL26 BC26 VSS_127 VSS_177 F43
VSS_28 VSS_78 VSS_128 VSS_178 GND GND
AC38 AL29 BC31 F47 PCH-H
AC4 VSS_29 VSS_79 AL33 BC35 VSS_129 VSS_179 G44
AC46 VSS_30 VSS_80 AL38 BC40 VSS_130 VSS_180 G6
AD1 VSS_31 VSS_81 AM1 BC45 VSS_131 VSS_181 H8
AD19 VSS_32 VSS_82 AM18 BC8 VSS_132 VSS_182 J10
AD2 VSS_33 VSS_83 AM32 BD43 VSS_133 VSS_183 J26
AD22 VSS_34 VSS_84 AM49 BE44 VSS_134 VSS_184 J29
AD25 VSS_35 VSS_85 AN12 BF1 VSS_135 VSS_185 J4
AD49 VSS_36 VSS_86 AN16 BF2 VSS_136 VSS_186 J40
AE12 VSS_37 VSS_87 AN34 BF3 VSS_137 VSS_187 J46
AE33 VSS_38 VSS_88 AN38 BF48 VSS_138 VSS_188 J47
AE38 VSS_39 VSS_89 AP4 BF49 VSS_139 VSS_189 J48
AE4 VSS_40 VSS_90 AP46 BG17 VSS_140 VSS_190 J9
AE46 VSS_41 VSS_91 AR12 BG2 VSS_141 VSS_191 K11
AF22 VSS_42 VSS_92 AR16 BG22 VSS_142 VSS_192 K39
AF25 VSS_43 VSS_93 AR34 BG25 VSS_143 VSS_193 M16
AF28 VSS_44 VSS_94 AR38 BG28 VSS_144 VSS_194 M18
B AG1 VSS_45 VSS_95 AT1 BG3 VSS_145 VSS_195 M21 B
AG22 VSS_46 VSS_96 AT16 BG33 VSS_146 VSS_196 M24
AG23 VSS_47 VSS_97 AT18 BG37 VSS_147 VSS_197 M32
AG25 VSS_48 VSS_98 AT21 BG4 VSS_148 VSS_198 M34
AG27 VSS_49 VSS_99 AT24 BG48 VSS_149 VSS_199 M49
VSS_50 VSS_100 VSS_150 VSS_200

GND GND GND GND

PCH-H PCH-H

A A

Title : VSS
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 27 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

SPI ROM +3VS

+12VS

+3VSUS
+3VS

+12VS

+3VSUS
7,16,21,22,23,24,30,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96

48,57,91

7,21,22,23,24,26,30,31,33,36,44,48,53,68,74,81,88,92,96

+3VA_EC +3VA_EC 30,32

+3VA_EC R2801 1 @ 2 0Ohm
+12VSUS +12VSUS 81,91
+3VSUS R2802 1 2 0Ohm
+3VM_SPI
D D
D2801
1 +3VM_SPI +3VM_SPI
3
2
@
0.8V/0.2mA

1
C2801
R2804 1 2 0Ohm

1
R2822 R2823 0.1UF/16V R2813

FX505 RF reserve @20180131

100KOhm 3.3KOhm 100KOhm C2802

2
@ 10PF/50V

2
@

2
U2801
R2807 1 2 33Ohm SPI1_CS#0 1 8
22 SPI_CS#0 CS# VCC
R2806 1 2 33Ohm SPI1_SO 2 7 SPI1_HOLD# R2814 1 2 33Ohm
22 SPI_SO DO(IO1) HOLD#/RESET#(IO3) SPI_HOLD#_IO3 22
R2805 1 2 33Ohm SPI1_WP# 3 6 SPI1_CLK R2815 1 2 33Ohm
22 SPI_WP#_IO2 WP#(IO2) CLK SPI_CLK 22
4 5 SPI1_SI R2816 1 2 33Ohm
GND DI(IO0) SPI_SI 22
W25Q128JVSIQ
R2829 1 2 05T00M003N00
30,44 F_CS#_EC R2821 1 2 100KOhm +3VM_SPI
2 1 R2835
R2828 1 2 F_SCK_EC 30,44

1
30,44 F_SDIO_EC
C2803 2 1 R2836
F_SDI_EC 30,44
10PF/50V

2
C
@ C

SMBus
+3VSUS +3VS

DDR4 SO-DIMM

1
PCH HDMI CTRL IC

1
R2811 R2812 +12VS R2809 R2810

LPC 1KOhm
@
1KOhm
@
4.7KOhm 4.7KOhm

PCH EC

2
2

2
@

2
6 1
23 SMB_CLK SMB_CLK_DIMM 16,17,48
Q2802A
UM6K1N
HDMI_CSCL 16,17,48
R2824 1 2
B B

+12VS

U2801
FSPI

5
@
3 4
FLASH 23 SMB_DAT
Q2802B
UM6K1N
SMB_DAT_DIMM

HDMI_CSDA
16,17,48

16,17,48
R2825 1 2

+12VS

2
6 1
30,74 SMB1_CLK SML1_CLK 23
Q2803A @
EC UM6K1N
PCH
dGPU

5
A A
3 4
30,74 SMB1_DAT SML1_DAT 23
Q2803B @
UM6K1N

Title : SPI/SMB
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 28 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

+3VA_EC +3VA_EC 28,32

+3VS +3VS 7,16,21,22,23,24,28,31,32,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96 For EC Power
+3VSUS +3VSUS 7,21,22,23,24,26,28,31,33,36,44,48,53,68,74,81,88,92,96
+3VA +3VA 25,57,66,74,81,88,93
Reserved
+1.8VSUS +1.8VSUS 21,26,53,84

+VCCDSW +VCCDSW 7,21,22,23,24,26,28,31,33,36,44,48,53,68,74,81,88,92,96

AD_IINP
SUS_PWRGD
ALL_SYSTEM_PWRGD
R3055
R3056
R3057
1
1
1
@
@
@
2 0Ohm
2 0Ohm
2 0Ohm
+3VA +3VA_EC +3VA_EC
FX505 RF reserve @20180131
+RTCBAT +RTCBAT 25 GPI3 R3058 1 @ 2 0Ohm
GPI4 R3059 1 @ 2 0Ohm B3001 1 2 120Ohm/100Mhz
GPI5 R3060 1 @ 2 0Ohm

1
GPI6 R3061 1 @ 2 0Ohm

1
GPI7 R3062 1 @ 2 0Ohm @ C3002 C3003
D3001 C3001 0.1UF/16V 0.1UF/16V C3009
For EMI AZ5123-01F 10UF/6.3V 10PF/50V

2
@
U3001 GND

2
D KB_BL STRAP 3 66 D
GPH7 ADC0/GPI0 67 AD_IINP 88
GND GND
127 ADC1/GPI1 68 SUS_PWRGD 81,92
+3VAPLL VSTBY(PLL) ADC2/GPI2 ALL_SYSTEM_PWRGD 24,92
121 69 GPI3
114 VSTBY5 ADC3/GPI3 70 GPI4
92 VSTBY4 ADC4/GPI4 71 GPI5 +3VA_EC +3VAPLL
50 VSTBY3 ADC5/DCD1#/GPI5 72 GPI6
26 VSTBY2 ADC6/DSR1#/GPI6 73 GPI7 SP3012 1 2 0Ohm
+3VA_EC VSTBY1 ADC7/CTS1#/GPI7

1
SHORT PIN 0402 C3005 For +3VPLL
C3004 0.1UF/16V
24 10UF/6.3V
Nearby pin 127
PWM0/GPA0 PWR_LED# 31,56

2
25
+EC_VCC 74 PWM1/GPA1 28 CHG_LED#_O 56
CHG_LED#_W
+3VACC AVCC PWM2/GPA2 CHG_LED#_W 56
29
PWM3/GPA3 KBL_PWM_G 31
+3VS SP3010 1 2 0Ohm EC_VCC 11 30 FAN0_PWM GND GND
VCC PWM4/GPA4 31 FAN1_PWM FAN0_PWM 50
PWM5/GPA5 32 FAN1_PWM 50
PWM6/SSCK/GPA6 34 KBL_PWM_R 31 +3VACC
PWM7/RIG1#/GPA7 KBL_PWM_SINGLE_B 31 +EC_VCC
SP3013 1 2 0Ohm
108 GPB0 1 T3091
RXD/SIN0/GPB0

1
109 CAP_LED# C3006 For EC+_VCC SHORT PIN 0402 C3007 For +3VACC
TXD/SOUT0/GPB1 112 CAP_LED# 31
PM_RSMRST# 0.1UF/16V 0.1UF/16V
SP3001 1 2 0Ohm LAD0 10 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 PM_RSMRST# 24 Nearby pin 11 Nearby pin 74
22,44 LPC_AD0 LAD0/GPM0

2
SP3002 1 2 0Ohm LAD1 9
22,44 LPC_AD1 LAD1/GPM1
SP3003 1 2 0Ohm LAD2 8 56 GPC3 1 T3013
22,44 LPC_AD2 LAD2/GPM2 KSO16/SMOSI/GPC3
SP3004 1 2 0Ohm LAD3 7 120 AC_IN_OC_EC SP3008 1 2 0Ohm GND EC_AGND
22,44 LPC_AD3 LAD3/GPM3 TMRI0/GPC4 AC_IN_OC 24,74,88
SP3005 1 2 0Ohm CLK_KBCPCI_EC 13 57 GPC5 1 T3014
22 CLK_KBCPCI_PCH 6 LPCCLK/GPM4 KSO17/SMISO/GPC5 124 BAT1_IN_OC#
22,44 LPC_FRAME# LFRAME#/GPM5 TMRI1/GPC6
SP3014 1 2 0Ohm LPCRST#_EC 22 16
24,31,32,33,51,53,74 BUF_PLT_RST# 5 LPCRST#/GPD2 PWUREQ#/BBO/SMCLK2ALT/GPC7 ME_AC_PRESENT 24
SP3011 1 2 0Ohm
22,44 INT_SERIRQ SERIRQ/GPM6
SP3006 1 2 0Ohm EXT_SMI#_EC 15
23,44 EXT_SMI# ECSMI#/GPD4 PM_SUSB# 24,68
SP3007 1 2 0Ohm EXT_SCI#_EC 23 18 PM_SUSB# SHORT PIN 0402
23 EXT_SCI# 1 126 ECSCI#/GPD3 RI1#/GPD0 21 1 2 0Ohm PM_SUSC# 24,68
T3001 A20GATE PM_SUSC# R3067 @
4 GA20/GPB5 RI2#/GPD1 33 SYS_PWROK 24,68
RCIN# SYS_PWROK_EC GND EC_AGND
22 RCIN# 14 KBRST#/GPB6 GINT/CTS0#/GPD5 47 SYS_PWROK_EC 68
FAN0_TACH
32 EC_RST# WRST# TACH0A/GPD6 48 FAN0_TACH 50
FAN1_TACH
TACH1A/TMA1/GPD7 FAN1_TACH 50
SP3009 1 2 0Ohm
58 VSUS_ON 81,82,84,93
R3063 1 @ 2 0Ohm
31 KSI0 59 KSI0/STB# 19 SUSC_EC# 57,68,91
VSUS_ON_EC R3064 1 @ 2 0Ohm
31 KSI1 60 KSI1/AFD# L80HLAT/BAO/GPE0 82 SUSB_EC# 21,57,68,91,92
SUSC_EC#_EC
C
For PU / PD C
1

C3010 31 KSI2 61 KSI2/INIT# EGAD/GPE1 83 SUSB_EC#_EC

0.1UF/16V 31 KSI3 62 KSI3/SLIN# EGCS#/GPE2 84 DE_ALL_SYS_PGD_EC
DE_ALL_SYS_PGD_EC 68
@ 31 KSI4 63 KSI4 EGCLK/GPE3 125 +3VA_EC +3VA_EC
EC_PIN125 1 T3098
2

31 KSI5 64 KSI5 SSCE1#/GPG0 35 1

GPE5 T3028
31 KSI6 65 KSI6 RTS1#/GPE5 17 1 2 1 2 10KOhm
LID_SW# R3001 @ 47KOhm BAT1_IN_OC# R3014 LID_SW#
31 KSI7 36 KSI7 LPCPD#/GPE6 20 1 LID_SW# 45,66 1 2 10KOhm
GPE7 T3089 R3015 PWR_SW#
GND 31 KSO0 37 KSO0/PD0 L80LLAT/GPE7 1 2 1 2 10KOhm KB_BL STRAP
R3002 @ 10KOhm AC_IN_OC R3068 /RGB
31 KSO1 38 KSO1/PD1
31 KSO2 39 KSO2/PD2 106 EC_PIN106 SP3015 1 2 0Ohm
+3VA_EC
31 KSO3 40 KSO3/PD3 VSTBY_FSPI 107 SP3034 1 2
31 KSO4 41 KSO4/PD4 PWRSW/GPE4 100 1 PWR_SW# 31,32 1 2 4.7KOhm SMB0_CLK
GPG2 T3017 RN3001A
31 KSO5 42 KSO5/PD5 SSCE0#/GPG2 104 EC_PIN104 SP3079 1 2
GND RN3001B 3 4 4.7KOhm SMB0_DAT
31 KSO6 43 KSO6/PD6 VSS5
31 KSO7 44 KSO7/PD7 7 8 4.7KOhm SMB1_DAT
RN3001D
31 KSO8 45 KSO8/ACK# 93 5 6 4.7KOhm SMB1_CLK +3VS
RN3001C
31 KSO9 46 KSO9/BUSY CLKRUN#/GPH0/ID0 94 1 PM_CLKRUN# 22
GPH1 T3099
31 KSO10 51 KSO10/PE CRX1/SIN1/SMCLK3/GPH1/ID1 95 1
GPH2 T3090
31 KSO11 52 KSO11/ERR# CTX1/SOUT1/SMDAT3/GPH2/ID2 96 KB_WAKEUP# 1 1 2 4.7KOhm TP_PS2_CLK
T3096 RN3002A
31 KSO12 53 KSO12/SLCT GPH3/ID3 97 1 3 @ 4 4.7KOhm TP_PS2_DAT
EC_MCU T3097 RN3002B
31 KSO13 54 KSO13 GPH4/ID4 98 1 @
5VSUS_PWRGD T3011
31 KSO14 55 KSO14 GPH5/ID5 99 5VSUS_PWRON 1 T3010
31 KSO15 KSO15 GPH6/ID6 1 2 100KOhm
BAT1_IN_OC# R3050

T3095 1 EC_PIN119 119 PM_SUSB# R3003 1 2 100KOhm R3069 1 /nonRGB 2 10KOhm KB_BL STRAP
123 DSR0#/GPG6 RN3003B 3 4 4.7KOhm SUSB_EC#
7 THRO_CPU CTX0/TMA0/GPB2 1 2 100KOhm 1 @ 2 4.7KOhm SUSC_EC#
PM_SUSC# R3004 RN3003A
85 @
88 BAT_LEARN 1 GPF1 86 PS2CLK0/TMB0/CEC/GPF0 PM_RSMRST# 1 2 10KOhm
T3034 R3006
PM_PWRBTN# 87 PS2DAT0/TMB1/GPF1
24 PM_PWRBTN# 88 PS2CLK1/DTR0#/GPF2 GND
22 SUSACK# TP_PS2_CLK 89 PS2DAT1/RTS0#/GPF3
31 TP_PS2_CLK 90 PS2CLK2/GPF4
TP_PS2_DAT
31 TP_PS2_DAT PS2DAT2/GPF5
SMB0_CLK 110 +3VS
60,88 SMB0_CLK 111 SMCLK0/GPB3
Battery / Charger SMB0_DAT
60,88 SMB0_DAT SMB1_CLK 115 SMDAT0/GPB4
28,74 SMB1_CLK 116 SMCLK1/GPC1 1 2 10KOhm
SMB1_DAT R3017 @ A20GATE
GPU 28,74 SMB1_DAT 117 SMDAT1/GPC2
7 H_PECI_EC 118 SMCLK2/PECI/GPF6 1 2 10KOhm
R3018 RCIN#
45 LCD_BKLTEN_EC SMDAT2/PECIRQT#/GPF7
B T3050 1 CTL_FAN 81 R3019 1 2 10KOhm FAN0_TACH B
T3051 1 PCH_DPWRK_DSW 80 DAC5/RIG0#/GPJ5 GND
T3088 1 79 DAC4/DCD0#/GPJ4 R3075 1 2 10KOhm FAN1_TACH
T3002 1 RTC_IN# 78 DAC3/TACH1B/GPJ3
T3093 1 HSPI_HDIO3 77 DAC2/TACH0B/GPJ2
T3092 1 HSPI_HDIO2 76 GPJ1 +VCCDSW
TACH2/GPJ0
R3020 1 2 10KOhm PM_PWRBTN#
128 1 +3VSUS
25 SW_RTCRST GPJ6 VSS1 GND
SP3032 1 2 2 12 C3012 1 2 0.1UF/16V
GND
23 PCH_FLASH_DESCRIPTOR GPJ7 VCORE 27 1 2 100KOhm
R3013 @ VSUS_ON
VSS2 49
VSS3 GND
91
F_CS#_EC 101 VSS4 113 +3VA_EC
28,44 F_CS#_EC F_SCK_EC 105 FSCE#/GPG3 CRX0/GPC0 122 EC_PIN122 1 SUSWARN#/SUSPWRDNACK 22
T3094
28,44 F_SCK_EC F_SDI_EC 102 FSCK/GPG7 DTR1#/SBUSY/GPG1/ID7 1 2 10KOhm VSUS_ON 1 2 100KOhm
R3011 R3008 @
28,44 F_SDI_EC F_SDIO_EC 103 FMOSI/GPG4 75
28,44 F_SDIO_EC FMISO/GPG5 AVSS EC_AGND
R3012 1 2 10KOhm GPG2 R3010 1 @ 2 10KOhm
1

C3008 IT8987E/BX
10PF/50V 06T380000023
@
2

GND

GND

Reserved for EMI

RCIN#

BUF_PLT_RST#
1

C3013 C3014
A 0.1UF/16V 0.1UF/16V A
@ @
2

GND GND

Title : EC
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 30 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

Click pad Conn. +3VS KB Backlight Conn.

CON3103
1 R2.0 modify R1.1 modify
9 1 2 TP_RST R3103 1 @ 2 0Ohm +5V_KB
SIDE1 2 3 BUF_PLT_RST# 24,30,32,33,51,53,74
PS2_CLK_C R3104 1 @ 2 0Ohm
3 4 TP_PS2_CLK 30 CON3102
PS2_DAT_C R3105 1 @ 2 0Ohm
4 5 TP_PS2_DAT 30 5 1 300mA 2 1
0Ohm R3191 +5VSUS
5 6 PCH_I2C0_SDA_C R3106 1 2 33Ohm SIDE1 1 2 371mA
10 6 7 PCH_I2C0_SDA 23 2
PCH_I2C0_SCL_C R3107 1 2 33Ohm 3 369mA R3163 1 /nonRGB 2 0Ohm
SIDE2 7 8 PCH_I2C0_INT#_R PCH_I2C0_SCL 23 6 3 4 369mA
8 SIDE2 4
FPC_CON_8P
R1.1 modify +5V_KB +5V_KB +5V_KB
FPC_CON_4P
12T18AWSM016
D /nonRGB D
GND

1
C3105 C3109 C3107 C3108 C3110
33PF/50V 33PF/50V 120PF/50V 120PF/50V Q3106 R3101 R3193 R3194
33PF/50V

3
@ @ @ 3 AP2334GN-HF 100KOhm 100KOhm 100KOhm
D

2
07T040000202 /RGB /RGB

2
CON3105 11 KBL_PWM_SINGLE_B KBL_PWM_SINGLE_B 30
1 G
1 +5V_KB S 2
9 2

2
SIDE1 2 3 R3164 1 /RGB 2 0Ohm
3 4 GND
D3101 4 371mA
+3VS +3VS +3VSUS 5 Q3102
5 6 300mA

3
PS2_CLK_C 1 6 PS2_DAT_C 6 3 AP2334GN-HF
10 7 D
SIDE2 7 8 07T040000202
8 /RGB

1
+5VSUS 11
KBL_PWM_R 30
R3161 R3162 FPC_CON_8P G
S 2
2 5 10KOhm 10KOhm GND /RGB

2
Q3101

1
2N7002 @

1
GND

2
G
@
PCH_I2C0_INT#_R 2 3 Q3103

2 S

3
PCH_I2C0_INT# 21

3
PCH_I2C0_SCL_C 3 4 PCH_I2C0_SDA_C 3 AP2334GN-HF

D
D
07T040000202
/RGB
CM1293_04SO N/A R3160 1 2 11
KBL_PWM_G 30
G
S 2

2
20160414 Add PCH_I2C0_INT# for touchpad
SR check to remove Q3101, R3162 GND

R1.1 modify
+5VSUS
Keyboard Conn.
C C

2
R3137
0Ohm
tx_r0402_short
D3104

1
C3114
1 2
GND 1 2
GND

Power-on jumper AZ5725-01F

@
0.1UF/16V CON3101
@ 1 37
請請請請請請請(TOP) 請請請請請請請(BOTTOM) 1 SIDE1
2
R3133 2 1 330Ohm 3 2
PWR_SW# PWR_SW# 30,56 PWR_LED# 3
R3132 2 1 330Ohm 4
30 CAP_LED# 4
5
30,32 PWR_SW# 6 5
GND 6
KSO15 7
30 KSO15 8 7
KSO14
1

30 KSO14 9 8
KSO12
JRST3102 JRST3101 30 KSO12 KSO10 10 9
1

SGL_JUMP SGL_JUMP 30 KSO10 11 10

KSO11
2

@ @ 30 KSO11 12 11
KSO6
30 KSO6 13 12
KSO8
2

30 KSO8 14 13
KSO4
30 KSO4 15 14
KSO2
30 KSO2 KSO5 16 15
30 KSO5 KSO13 17 16
GND GND 30 KSO13 18 17
KSI0
30 KSI0 19 18
KSI3
30 KSI3 20 19
KSO1
30 KSO1 21 20
KSI2
30 KSI2 22 21
KSI4
30 KSI4 23 22
KSO3
30 KSO3 24 23
KSI5
30 KSI5 25 24
KSI6
30 KSI6 25
KSO9 R3108 1 /17inch 2 0Ohm KSO9_5VS 26
30 KSO9 27 26
KSI7 KSI7
30 KSI7 27
KSI1 R3109 1 /17inch 2 0Ohm KSI1_PWRLED 28
30 KSI1 28
KSO0 R3110 1 /17inch 2 0Ohm KSO0_CAPLED 29
30 KSO0 29
B KSO7 R3111 1 /17inch 2 0Ohm KSO7_PWRSW 30 B
30 KSO7 31 30
GND 31
1 C3120
1 C3121
1 C3122

1 C3123
1 C3124
1 C3125
1 C3126

1 C3127
1 C3128
1 C3129
1 C3130

1 C3131
1 C3132
1 C3133
1 C3134

1 C3135
1 C3136
1 C3137
1 C3138
1 C3115
1 C3116
1 C3117
1 C3118

1 C3119

KSO15 32
KSO14 33 32
KSO12 34 33
KSO10 35 34
KSO11 36 35
36 38
SIDE2
33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2

33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2

33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2

33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2

33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2

33PF/25V 2
33PF/25V 2
33PF/25V 2
33PF/25V 2
FPC_CON_36P
12T180016N00
/17inch
GND
CON3104

tx_r0603_0ohm_h24 R3112 1 /15inch 2 0Ohm KSO9_5VS 1 37

KSI7 2 1 SIDE1
R3113 1 /15inch 2 0Ohm KSI1_PWRLED 3 2
R3114 1 /15inch 2 0Ohm KSO0_CAPLED 4 3
GND GND GND GND GND GND R3115 1 /15inch 2 0Ohm KSO7_PWRSW 5 4
6 5
7 6
8 7
9 8
10 9
11 10
12 11
13 12
14 13
15 14
16 15
17 16
18 17
19 18
20 19
21 20
22 21
23 22
24 23
25 24
A 26 25 A
27 26
28 27
29 28
30 29
31 30
32 31
33 32
34 33
35 34
36 35
36 38
SIDE2
Title : KB/TP

FPC_CON_36P PEGATRON PROPRIETARY AND CONFIDENTIAL

12T180016N00 GND
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
/15inch Size Project Name Rev
FX505GE
A2 Thursday, June 28, 2018 31 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+3VA_EC +3VA_EC 28,30

+3VS +3VS 7,16,21,22,23,24,28,30,31,33,36,44,45,48,50,51,57,74,87,88,89,91,92,96

+3VS
Thermal Policy

2
D D
R3206
10KOhm

1
@
23,74,87,96 GPU_OVERT# R3210 1 2 0Ohm

50,92 CPU_THERM# R3211 1 2

Q3202A

1
UM6K1NG1DTN +3VA_EC
G S
2
D
R3204 2 1 100KOhm
C C

6
D3202 2 1 1.2V/0.1A

92 FORCE_OFF# D3203 2 1 1.2V/0.1A EC_RST# EC_RST# 30

C3201 C3204

1
1UF/6.3V 1UF/6.3V

3
D 0201 0201
Q3202B
X5R/+/-20% X5R/+/-20%

2
24,30,31,33,51,53,74 BUF_PLT_RST# 5 UM6K1NG1DTN @
G S

4
+1.05V 3
C
R3203 2 1 330Ohm 1 B Q3201
PMBS3904
E
2

7,24 H_THMTRIP#
B B

EC reset +3VA_EC
2

R3207 EC_RST#
2MOhm
@

6
1

R3205 UM6K1N
1 1KOhm 2 2 Q3203A
@
@

1
3

Q3203B
30,31 PWR_SW# 5 UM6K1N C3202 C3203
@ 10UF/6.3V 4.7UF/6.3V
4

@ @
A A

Title : RST
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 32 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4 Vinafix.com 3 2 1

33.Realtek RTL8111H
+3VS +3VS 7,16,21,22,23,24,28,30,31,32,36,44,45,48,50,51,57,74,87,88,89,91,92,96

+3VSUS +3VSUS 7,21,22,23,24,26,28,30,31,36,44,48,53,68,74,81,88,92,96

U3301A

34 L_TRLP0 1
2 MDIP0 11 DVDD33
34 L_TRLN0 MDIN0 AVDD33_1 32
34 L_TRLP1 4 AVDD33_2 C3306 close to pins-- 24
5 MDIP1 23 DVDD33
34 L_TRLN1
D
MDIN1 VDDREG C3307 to C3310 close to pins-- 3, 8, 22, 30 D
34 L_TRLP2 6 200 mils 200 mils
34 L_TRLN2 7 MDIP2 C3311 & C3397 close to pins-- 22
MDIN2
REGOUT10 R3309 1 2 0Ohm 0.5A VDD10
34 L_TRLP3 9
34 L_TRLN3 10 MDIP3
MDIN3
0.5A tx_r0805_short
C3318 C3311

1
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V C3397
1UF/6.3V 1UF/6.3V
C3306 C3307 C3308 C3309 C3310 0.1UF/16V
0201 0201
X5R/+/-20% X5R/+/-20%

2
@
24 REGOUT10
REGOUT
C3307 to C3311
GND GND Close To U3301

C3316 to C3317 close to pins-- 11, 32

C3398 to C3399 close to pins-- 11, 32(Opt.
WOL of Ethernet LAN
AVDD10_0
3 VDD10 200 mils
AVDD10_1
8
1.2A
AVDD10_2
30
+3VSUS R3311 1 2 0Ohm 1.2A DVDD33
22 VDD10 tx_r0805_short
DVDD10

1
PCH C3316 C3317 C3399 C3398
C
(PU@+3VS,10Kohm 0.1UF/16V 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V C

2
@ @
SP3301
1 2 CLKREQB 12 reserve for surge imprvement
24 CLK_REQ10_LAN# CLKREQB FAE recommand
nb_r0402_short_5mil_small
SP3302 13 GND
HSIP PCIE_TXP13_LAN 21
1 2 PCIE_WAKE#_LAN 21
24,53 PCIE_WAKE# LANWAKEB
nb_r0402_short_5mil_small 14 PCIE_TXN13_LAN 21
HSIN
ISOLATE 20
ISOLATEB 17 PCIE_RXP13_LAN_C C3302 1 2 0.1UF/16V
HSOP PCIE_RXP13_LAN 21
+3VS 18 PCIE_RXN13_LAN_C C3301 1 2 0.1UF/16V
HSON PCIE_RXN13_LAN 21

C3301and C3302 Close to

2

U3301 pin17, pin18

R3306
1KOhm
Power sequence
1

ISOLATE
2

3.3V rising time must be

R3307 15
Rt1 more than 0.5ms and less than 100ms.
REFCLK_P CLK_PCIE_LAN_PCH 25
15KOhm 27 16 CLK_PCIE_LAN#_PCH 25
LED0 REFCLK_N
3.3V (VDDREG)
1

26
B LED1/GPO B
GND 25
LED2 2.5V~2.6V

1.0V (REGOUT)
24,30,31,32,51,53,74 BUF_PLT_RST# 19
PERSTB
0V
2 VC

XTAL1_LAN

XTAL2_LAN
31
RSET Rt3 Rt2
U3302
AZ5725-01F 28 XTAL1_LAN
CKXTAL1
2

@
1%
R3302
2.49KOhm
33
GND CKXTAL2
29 XTAL2_LAN Min. Typical Max. Units
R3302 close to pin31
X3302 Rt1 0.5 - 100 ms
1

25MHZ
GND 1

1 3

Rt2 50 - - ms

4
GND GND 2

2
GND U3301B
34
GND1
C3304 C3303 Rt3 - - 15 ms
35 10PF/50V 10PF/50V
GND2
1

1
36
A RTL8111H-CG 37 GND3 A
02T0J0000071 38 GND4
39 GND5
GND6 GND GND GND
40
41 GND7
GND8

GND
RTL8111H-CG Title : LAN 1
02T0J0000071 PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 33 99 1.0
Date: Sheet of
5 4 3 2 1
 34.Transformer/RJ45
5 4 3
Vinafix.com 2 1

LAN layout note:

MC3402 MD3411
MOAT

D
U3401 D
CON3401
MR3433
GND GND_LAN
MC3403

MC3404 MD3412
L_TRLM3_T 3 @ 4 RNX3401B L_TRLM3_R
0Ohm

3
CM3401
90Ohm/100MHz

4
U3401

2 23 L_TRLM3_T
L_TRLP3_T 1 @
0Ohm
2
RNX3401A
L_TRLP3_R RJ45
33 L_TRLN3 TD1+ MX1+
0.1UF/16V 2 1 C3405 V_DAC_0 1 24 L_CMT0 L_TRLM2_T 3 @ 4 RNX3402B L_TRLM2_R
TCT1 MCT1 0Ohm
CON3401
33 L_TRLP3 3 22 L_TRLP3_T
TD1- MX1- L_TRLP0_R 1 9

3
C L_TRLM0_R 2 1 P_GND1 11 C
CM3402 2 NP_NC1
L_TRLP1_R 3
33 L_TRLN2 5 20 L_TRLM2_T 90Ohm/100MHz 3
TD2+ MX2+ L_TRLP2_R 4
L_TRLM2_R 5 4

4
0.1UF/16V 2 1 C3406 V_DAC_1 4 21 L_CMT1 5
TCT2 MCT2 L_TRLM1_R 6
@ L_TRLP2_T 1 @ 2 L_TRLP2_R 6
0Ohm L_TRLP3_R 7 12
33 L_TRLP2 6 19 L_TRLP2_T RNX3402A 7 NP_NC2
TD2- MX2- L_TRLM3_R 8 10
8 P_GND2
L_TRLM1_T 3 @ 4 RNX3403B L_TRLM1_R
0Ohm
33 L_TRLN1 8 17 L_TRLM1_T MODULAR_JACK_8P
TD3+ MX3+ 12T231BSD000

3
0.1UF/16V 2 1 C3407 V_DAC_2 7 18 L_CMT2
TCT3 MCT3 CM3403
@
33 L_TRLP1 9 16 L_TRLP1_T 90Ohm/100MHz
TD3- MX3- GND_LAN

4
33 L_TRLN0 11 14 L_TRLM0_T L_TRLP1_T 1 @ 2 L_TRLP1_R
TD4+ MX4+ 0Ohm
RNX3403A
0.1UF/16V 2 1 C3408 V_DAC_3 10 15 L_CMT3
TCT4 MCT4 L_TRLM0_T 2 @ 1 RNX3404A L_TRLM0_R
@ 0Ohm
33 L_TRLP0 12 13 L_TRLP0_T
TD4- MX4-

1
GST5009 MD3411
CM3404
1 2
90Ohm/100MHz
AZ5725-01F

2
07T180000049
L_TRLP0_T 4 @ 3 L_TRLP0_R
0Ohm @
RNX3404B
B MC3402 1 2 1000PF/50V B

2
U3402
L_TRLP0 1 10 L_TRLP0 R3404 MR3433 1 2 0Ohm
L_TRLN0 2 CH1 n.c.4 9 L_TRLN0 75Ohm
CH2 n.c.3 tx_r0402_0ohm
3
GND L_TRLP1 4 GND1pin8 7 L_TRLP1

1
L_TRLN1 5 CH3 n.c.2 6 L_TRLN1
CH4 n.c.1 MC3403 1 2 1000PF/50V
PUSB3F96
2

1
07T220000032
D3404 C3409
MD3412
AZ5725-01F 1000PF/2KV
U3403

2
07T180000049 1AT600000008 1 2
L_TRLP2 1 10 L_TRLP2
CH1 n.c.4 MLCC 1000PF/2KV(1206) X7R 20%
L_TRLN2 2 9 L_TRLN2 @
CH2 n.c.3 AZ5725-01F
3
1

GND L_TRLP3 4 GND1pin8 7 L_TRLP3

07T180000049
L_TRLN3 5 CH3 n.c.2 6 L_TRLN3 @
CH4 n.c.1 GND_LAN GND_LAN
MC3404 1 2 1000PF/50V
PUSB3F96
07T220000032 @

A A
GND GND_LAN

Title : LAN 2
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 34 99 1.0
Date: Sheet of
5 4 3 2 1
 ALC233-VB2-CG CODEC
5 4

1UF/6.3V @
0201 C3651 1 2 X5R/+/-20%
3

AC_HP_R_E
AC_HP_L_E
LINE1_VREF_L
LINE1_VREF_R

MIC2-VREFO
Vinafix.com
Headphone

EXT MIC Vref.

2

+3VS +3VS_AUDIO
1

GND 1UF/6.3V
0201 C3604 1 2 X5R/+/-20% C3600 2 1 2.2UF/6.3V
A_GND

1UF/6.3V @
0201 C3650 1 2 X5R/+/-20%
C3601 1 2 10UF/6.3V
+5VS
Digital L3603
Analog +5VS_AUDIO

1 2
1UF/6.3V 100K is used to speed up the discharge for LDO1. It could
0201 C3603 1 2 X5R/+/-20% solve the pop sound during system boot up and reboot.

2 VC
1 100KOhm2
1.5V(Or 1.8V) power rail should be supplied by linear R3600 120Ohm/100Mhz

1
+5VS_AUDIO
D
regulator, not switching regulator. if switching regulator is +3VS_AUDIO C3633
D

unavoidable, Please make sure that switching frequency A_GND

50mA 10UF/6.3V

2
Analog operates at out? band(Over 20KHz). Place close to pin 26

1
Digital C3602
C3606
0.1UF/6.3V C3605
Moat
10UF/6.3V

2
10UF/6.3V

2
L3600 A_GND
50mA

36
35
34
33
32
31
30
29
28
27
26
25
1 2
+1.5VS GND

GND1
U3608

CPVEE

LDO1-CAP
CBN

VREF
CPVDD

LINE1-VREFO-L
LINE1-VREFO-R
MIC2-VREFO

AVSS1
AVDD1
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
600Ohm/100Mhz AZ5725-01F

1
A_GND
C3613 GND
10UF/6.3V A_GND

2
A_GND

+3VSUS
A_GND 37 24
38 CBP LINE2-L(PORT-E-L) 23
In order to prevent the built-in LDO damaged from
+5VS
C3612 1 2 10UF/6.3V 39 AVSS2 LINE2-R(PORT-E-R) 22 LINE1_L over-voltage on +5VS or Standby power line, we
A_GND LDO2-CAP LINE1-L(PORT-C-L)
L3601 40 21 LINE1_R suggested using this Voltage suppressing device.
2.5A 1 2 41 AVDD2 LINE1-R(PORT-C-R) 20 R3621 2 1 0Ohm tx_r0402_short
MIC
H_SPKL+_E 42 PVDD1 VD33_STB 19 C3607 1 2 10UF/6.3V
SPK-OUT-L+ MIC_CAP A_GND
H_SPKL-_E 43 18 AUD_EXT_MIC_R_E
600Ohm/100Mhz C3652 C3610 Speaker SPK-OUT-L- MIC2-R(PORT-F-R)/SLEEVE
1

1
C3609 C3608 C3611 H_SPKR-_E 44 17 AUD_EXT_MIC_L_E
1UF/6.3V 1UF/6.3V 45 SPK-OUT-R- MIC2-L(PORT-F-L)/RING 16
10UF/6.3V X5R 0.1UF/6.3V 10UF/6.3V H_SPKR+_E
X5R
0201 0201 46 SPK-OUT-R+ MONO-OUT 15 PCB trace width of MIC2_R &
X5R/+/-20% X5R/+/-20% PVDD2 SPDIFO/FRONT_JD(JD3)/GPIO3 MIC2_L are required at least 40
2

2
47 14
@ 48 PDB MIC2/LINE2_JD(JD2) 13 1 200KOhm2 1% mil and its length should be
R3623 HP_JD#_E
49 SPDIF-OUT/GPIO2 HP/LINE1_JD(JD1) as short as possible.
GND R3603 1 100KOhm2

GPIO0/DMIC-DATA
+3VS_AUDIO

GPIO1/DMIC-CLK
GND D3600
GND place close audio codec GND1 2 VC

SDATA-OUT

LDO3-CAP
SDATA-IN
@

DVDD-IO

PCBEEP
DC_DET

RESETB
C3654 C3614
1

DVDD

SYNC
C3615 AZ5725-01F

BCLK
1UF/6.3V 1UF/6.3V GND
10UF/6.3V
0201 0201
X5R R3631 1 2 0Ohm
X5R/+/-20% X5R/+/-20%
2

2
U3601A
@ Analog

1
2
3
4
5
6
1 C3616 7
8
9
10

12
11
C ALC233-VB2-CG R3630 1 2 0Ohm C
02T0J0000077
+3VS_AUDIO 1 Digital SR3601 1 2 0Ohm
+3VS_AUDIO GND T3601 U3601B @
@ 50 C3645 1 2 1000PF/50V10%
GND1
1

R3650 1 2 0Ohm 51
GND2

10UF/6.3V 2
1

1
R3652 C3623 C3624 52
1KOhm 10UF/6.3V 0.1UF/6.3V 53 GND3 C3646 1 2 0.1UF/16V
D3601 X5R 54 GND4
GND5

2
1 55
24 OP_SD# GND6
2

3 PDB 56 C3647 1 2 0.1UF/16V

HDA_RST# 2 57 GND7
GND8
1

GND GND 58
C3653 C3639 GND9
1

1V/0.1A R3651 R1.2 20160726 EMI request

10KOhm
1UF/6.3V 1UF/6.3V Place close to pin 1 GND HDA_RST# 23 Mount C3646, C3647(0.1uF) A_GND
0201 0201 ALC233-VB2-CG GND

1
C3626 GND
X5R/+/-20% X5R/+/-20%
2

22PF/50V
@
2

2
GND GND GND
R3609 +3VS_AUDIO
HDA_SYNC 23 2 1
R3610 1 2 DMIC_DAT_R
45 DMIC_DAT

1
R3611 1 2 22Ohm DMIC_CLK_R C3630 C3631 0Ohmtx_r0603_short
45 DMIC_CLK 2 22Ohm 1
SDATA_IN_R R3613 0.1UF/6.3V 10UF/6.3V C3642
HDA_SDI0 23
X5R 10PF/50V
EXT MIC Vref. HDA_SDO 23

2
1

C3628 C3627
10PF/50V 10PF/50V Place close to pin 9
@ HDA_BCLK_C R3616 1 22Ohm 2
MIC2-VREFO HDA_BCLK 23
2

GND GND GND

1
C3629
22PF/50V
GND GND
2

2
2

R3618
R3620
2.2KOhm
2.2KOhm
GND Trace width for HDA_SPKR_LP/HDA_SPKR_LN/HDA_SPKR_RN/HDA_SPKR_RP SPKR Conn.
1

Speaker 4 ohm : 40mil

1

AUD_EXT_MIC_R_E R3632 2 1 0Ohm MIC_IN_AC_E_J_R R2.0 modify Speaker 8 ohm : 20mil

B CON3602 B
1

H_SPKL+_E L3605 1 2 100ohm H_SPKL+ 1 6

1

D3603 H_SPKL-_E L3606 1 2 100ohm H_SPKL- 2 1 SIDE2

C3643 1 2 100ohm 3 2
AZ5123-01F H_SPKR-_E L3607 H_SPKR-
100PF/50V 3
07T180000044 H_SPKR+_E L3608 1 2 100ohm H_SPKR+ 4 5
2

EXT MIC IN 4 SIDE1

A_GND WTOB_CON_4P
2

12T17GISM080

2
GND

1
D3607 D3608 D3609 D3610

1
AUD_EXT_MIC_L_E R3219 2 1 0Ohm RING2_J
C3696 AZ5725-01F AZ5725-01F C3698 AZ5725-01F AZ5725-01F
C3697 C3699
100PF/50V 07T180000049 07T180000049 100PF/50V 07T180000049 07T180000049

2
100PF/50V 100PF/50V
1

2
GND
D3611 @ @ @ @
1

1
AZ5123-01F
C3618

Combo Jack
07T180000044
100PF/50V
2

A_GND
CON3601
GND
R3614 3
AC_HP_L_E 1 2 AC_HP_L_E_R B3602 1 2 120Ohm/100Mhz AC_HP_L_E_C 1
09T010000006 GND
1

51Ohm 5
10T240000026 C3644 D3604 6
100PF/50V AZ5123-01F 2
2

07T180000044 4
7
A_GND
2

PHONE_JACK_7P
GND 12T14GBSD107
HP_JD#_E R3610 1 0Ohm 2 HP_JD#_E_R
A_GND
1
1

D3606 LINE1_L C3621 2 1 4.7UF/6.3V AC_HP_L_E

C3649 AZ5123-01F MLCC 4.7UF/6.3V(0603)X5R 10%
100PF/50V 07T180000044
2

A @ LINE1_R C3622 2 1 4.7UF/6.3V AC_HP_R_E A

MLCC 4.7UF/6.3V(0603)X5R 10%
2

A_GND

GND
R3615
AC_HP_R_E 1 2 AC_HP_R_E_R B3603 1 2 120Ohm/100Mhz AC_HP_R_E_C LINE1_VREF_R R3612 1 2 4.7KOhm
09T010000006
1

51Ohm LINE1_VREF_L R3602 1 2 4.7KOhm

1

10T240000026 D3605
C3648 AZ5123-01F
vender recommend for GS mark test on HP out 100PF/50V 07T180000044
Title : AUDIO CODEC
2

PEGATRON PROPRIETARY AND CONFIDENTIAL

2

A_GND BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN

GND
vender suggestion:place on the moat and connect to digital GND. Size Project Name FX505GE Rev
FX505 Vender@2018 A2 Thursday, June 28, 2018 36 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

+3VS +3VS 7,16,21,22,23,24,28,30,31,32,33,36,45,48,50,51,57,74,87,88,89,91,92,96

+3VSUS +3VSUS 7,21,22,23,24,26,28,30,31,33,36,48,53,68,74,81,88,92,96

+3VM_SPI +3VM_SPI 28

D D

+3VS

1
C4401
0.1UF/16V
/debug

2
1
LPC_AD0 2 1 13
22,30 LPC_AD0 2 SIDE1
3
LPC_AD1 4 3
22,30 LPC_AD1 4
23,30 EXT_SMI# R4410 2 @ 1 0Ohm 5
LPC_AD2 6 5
22,30 LPC_AD2 6
R4411 2 @ 1 0Ohm 7
22,30 INT_SERIRQ 7
LPC_AD3 8
22,30 LPC_AD3 8
9
LPC_FRAME# 10 9
22,30 LPC_FRAME# 10
11 14
C CLK_DEBUG2 12 11 SIDE2 C
22 CLK_DEBUG 12
CON4401

1
C4402 FPC_CON_12P
10PF/50V 12T18GWSM055
@ /debug

2
EMI request

+3VSUS
20160413
Change from +3VA_EC to +3VM_SPI

1
R4405 R4404
3.3KOhm 3.3KOhm +3VM_SPI
@ @
1
1

2
23 UART0_DEBUG_TXD R4401 1 /debug 2 0Ohm 2 13
3 2 SIDE1
R4406 1 /debug 2 0Ohm 4 3
23 UART0_DEBUG_RXD 4
R4403 1 /debug 2 0Ohm 5
28,30 F_CS#_EC 5
B 6 B
28,30 F_SDIO_EC 6
7
28,30 F_SCK_EC 7
8
28,30 F_SDI_EC 8
9
R4402 1 /debug 2 3.3KOhm 10 9
+3VM_SPI 10
11 14
12 11 SIDE2
12
SPI CON4402
F_CS#_EC FPC_CON_12P
12T18GWSM055
F_SDIO_EC /debug
F_SCK_EC
F_SDI_EC

A A

Title : DEBUG
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 44 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+3VS +3VS 7,16,21,22,23,24,28,30,31,32,33,36,44,48,50,51,57,74,87,88,89,91,92,96

eDP Conn. +5VS +5VS 31,36,48,50,51,56,57,80,87,89,91

+AC_BAT_SYS +AC_BAT_SYS 80,81,82,83,87,88,89,94

+AC_BAT_SYS
Camera Signal
1.5A AC_INV 1
L4504
2 +3VS

1
80Ohm/100Mhz
CON4501 C4518 +3VS_CAMERA 120Ohm/100Mhz 1 2 L4505
@ C4509 Irat=2A
40 22PF/25V 0.1UF/25V C4546 C4502

1
40

2
42 39
SIDE2 39 38
R1.1 modify C4526 C4503
1UF/6.3V
0201
1UF/6.3V
0201
38 37 0.1UF/16V 0.1UF/16V X5R/+/-20% X5R/+/-20%

2
37 36 @ @ @
36 35
35 34 DMIC_CLK
D DMIC_CLK 36 D
34 33 DMIC_DAT
33 DMIC_DAT 36
32
32 31 USB_PP11_CAMERA_CONN
31 30 USB_PN11_CAMERA_CONN
30 RNX4501A

2
29 C4544 C4545
29 USB_PP11_CAMERA_CONN 1 @ 2
28 +3VS_CAMERA @ 12PF/50V @ 12PF/50V 0Ohm USB_PP11_CAMERA 20
28 27
27

1
26 LCD_BACK_PWM

2
26 25 LCD_BKEN_CON
25 24 L4501
24 EDP_HPD 21 90Ohm/100MHz
23
23 22 09T090000001
R4506 1 2 0Ohm

1
22 EDP_OD_EN 23
21 EDP_OD_EN_CON R4501 1 2 100KOhm
21 USB_PN11_CAMERA_CONN 3 @ 4
20 0Ohm USB_PN11_CAMERA 20

1
20
19
19 1.5A +LCD_VCC R2.0 modify D4504
RNX4501B
18 @ AZ5725-01F

1
18 17 C4519 1 2 47PF/50V Reserving for OD function @
07T180000049 D4505
17 16 AZ5725-01F
16 15 @
07T180000049
15 14 EDP_AUXN_CON

2
14 13 EDP_AUXP_CON
13 12

2
12 11 EDP_TXP0_CON
11 10 EDP_TXN0_CON
10 9
9 8 EDP_TXP1_CON
8 7 EDP_TXN1_CON
7 6
6 5 EDP_TXP2_CON
5 4 EDP_TXN2_CON
4 3
41 3 2 EDP_TXP3_CON
SIDE1 2 1 EDP_TXN3_CON CFL PDG:
1 AC caps are required to be placed before the motherboard eDP* connector
FPC_CON_40P Main Link
12T18GWSMA04
nominal 100nF recommended (tolerance 75–265 nF)
Aux Channel
nominal 100nF recommended (tolerance 75–200 nF)
3 0Ohm 4 RNX4502B
C C
EDP_AUXP_CON EDP_AUXP_C C4510 1 2 0.1UF/16V
EDP_AUXP 3

1
90Ohm/100MHz
L4503 09T090000001

2
EDP_AUXN_CON EDP_AUXN_C 1 2 0.1UF/16V
LCD VDDEN / +LED_VCC
C4515
@ EDP_AUXN 3

1 0Ohm 2
RNX4502A

3 0Ohm 4 RNX4503B
+LCD_VCC +3VS

1.2A
R4502 1 2 150Ohm
RES 150 OHM 1/8W(0805)5%
1.2A
FX505 RF reserve @20180131 EDP_TXN0_CON EDP_TXN0_C C4511 1 2 0.1UF/16V
EDP_TXN0 3

1
1 5 90Ohm/100MHz
OUT IN
L4507 09T090000001
2
1

GND C4513 C4547

1

2
C4501 1UF/6.3V 1UF/6.3V EDP_TXP0_CON EDP_TXP0_C C4516 1 2 0.1UF/16V
C4505 3 4 C4504 @ EDP_TXP0 3
4.7UF/6.3V EN DSG 0201 0201
10PF/50V 10PF/50V
2

X5R/+/-20% X5R/+/-20%
2

@ U4501 @
@ 1 0Ohm 2
G5244T11U
RNX4503A
06T290000002
POWER SW. G5244T11U SOT23-5 3 4 RNX4504B
0Ohm
R4505
2 1
21 EDP_VDD_EN EDP_TXN1_CON EDP_TXN1_C C4512 1 2 0.1UF/16V
EDP_TXN1 3
nb_r0402_short_5mil_small

1
1

90Ohm/100MHz
R4516 L4508 09T090000001
100KOhm

2
EDP_TXP1_CON EDP_TXP1_C C4517 1 2 0.1UF/16V
@ EDP_TXP1 3
2

B
Controll Signal 1 0Ohm 2
RNX4504A
B

3 0Ohm 4 RNX4505B

+LCD_VCC EDP_TXN2_CON EDP_TXN2_C C4514 1 2 0.1UF/16V

EDP_TXN2 3

1
90Ohm/100MHz
2

R4504 L4509 09T090000001

10KOhm

2
EDP_TXP2_CON EDP_TXP2_C C4520 1 2 0.1UF/16V
@ EDP_TXP2 3
1

D4502 1 2
1V/0.1A 0Ohm
1 RNX4505A
3 LCD_BKLTEN_EC 30
2
LID_SW# 30,66
3 0Ohm 4 RNX4506B
D4503
RB751V-40 1 2 0.1UF/16V
EDP_TXN3_CON EDP_TXN3_C C4530
LCD_BKEN_CON 1 2 EDP_TXN3 3
LCD_BKLTEN_PCH 21
4

1
1

90Ohm/100MHz
1

R4521 L4510
C4542 09T090000001
C4506 100KOhm
22PF/25V 100PF/50V
3

@ EDP_TXP3_CON 2 EDP_TXP3_C C4525 1 2 0.1UF/16V EDP_TXP3 3

2

@
@ @
2

1 0Ohm 2
RNX4506A
L4502
LCD_BACK_PWM 2 1
LCD_BL_PWM_PCH 21
2

1kOhm/100Mhz
1

D4501 Irat=300mA
AZ5725-01F C4543 C4507 FERRITE BEAD(0603)1K OHM/300mA
07T180000049 22PF/25V 100PF/50V
2

A A
@ @
1

Title : EDP/MIC
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 45 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3

R10_0727_EMI
2 1

HDMI
Size change to 0201 R1.1 modify
Delete R4855~R4862
HDMI_CLKP_CON 1 0OHM 2 HDMI_CLKP_R HDMI_CLKP_RR
RN4804A
@ +3VS +3VS 7,16,21,22,23,24,28,30,31,32,33,36,44,45,50,51,57,74,87,88,89,91,92,96
C4832 2 1 0.1UF/16V HDMI_CLKP_C
73 HDMI_CLKP +5VS +5VS 31,36,50,51,56,57,80,87,89,91

2
C4834 2 1 0.1UF/16V HDMI_CLKN_C
73 HDMI_CLKN
EMI C4803 CM4804 +12VS +12VS 28,57,91
3.3PF/50V 80ohm

2
HDMI_HPD_GPU_IFPC 75 @ +1V8_MAIN +1V8_MAIN 57,70,71,72,73,74,75,91

4
C4833 2 1 0.1UF/16V HDMI_TXP0_C

3
73 HDMI_TXP0 3
73 HDMI_TXN0 C4835 2 1 0.1UF/16V HDMI_TXN0_C D
Q4801 For GPU hot plug detection
HDMI_CLKN_CON 3 0OHM 4 RN4804B HDMI_CLKN_R HDMI_CLKN_RR
2N7002
HDMI_HPD_SRC SP4803 1 2 HDMI_HPD_R 11
G @
D 2 S D
C4828 2 1 0.1UF/16V HDMI_TXP1_C

2
73 HDMI_TXP1
C4829 2 1 0.1UF/16V HDMI_TXN1_C

1
73 HDMI_TXN1
R4815 1 2
HDMI_TXN0_CON 0OHM HDMI_TXN0_R HDMI_TXN0_RR
100KOhm RN4803A
+3VSUS
@
C4830 2 1 0.1UF/16V HDMI_TXP2_C

2
73 HDMI_TXP2
C4831 2 1 0.1UF/16V HDMI_TXN2_C D4805
73 HDMI_TXN2

2
HDMI_CLKN_RR 1 10 HDMI_CLKN_RR

1
GND GND HDMI_CLKP_RR 2 CH1 n.c.4 9 HDMI_CLKP_RR
R4817 80ohm 3 CH2 n.c.3
10KOhm CM4803 HDMI_TXN1_RR 4 GND1pin8 7 HDMI_TXN1_RR
CH3 n.c.2

4
HDMI_TXP1_RR 5 6 HDMI_TXP1_RR
@ CH4 n.c.1

2
SP4804 1 2
HDMI_HPD_TO_PCH 23 PUSB3F96
HDMI_TXP0_CON 3 0OHM 4 RN4803B HDMI_TXP0_R HDMI_TXP0_RR 07T220000032

+3VS +VDD33 For PCH trigger to GPU power on @

D4806
R4805 1 2 0Ohm HDMI_TXN2_RR 1 10 HDMI_TXN2_RR
HDMI_TXP1_CON 1 0OHM 2 HDMI_TXP1_R HDMI_TXP1_RR CH1 n.c.4
HDMI_TXP2_RR 2 9 HDMI_TXP2_RR
RN4802A 3 CH2 n.c.3
@ HDMI_TXP0_RR 4 GND1pin8 7 HDMI_TXP0_RR
HDMI_TXN0_RR 5 CH3 n.c.2 6 HDMI_TXN0_RR
+VDDRX12 +VDDTX12 CH4 n.c.1

2
+1V2_HDMI +VDD12 PUSB3F96
CM4802
80ohm 07T220000032
R4811 1 2 0Ohm

4
HDMI_TXN1_CON 3 0OHM 4 RN4802B HDMI_TXN1_R HDMI_TXN1_RR

@
+VDD12
+VDD33
+VDDRX12 U4801A HDMI_SCL
6 HDMI_SDA
11 VDD12_1 1
30 VDDA12 VDD33_1 24 HDMI_TXP2_CON 1 2 HDMI_TXP2_R HDMI_TXP2_RR
C 0OHM C
VDD12_2 VDD33_2

2 VC

2 VC
RN4801A
1

C4825 @
4.7UF/6.3V C4822 C4821 C4813
0.1UF/16V 0.1UF/16V 0.01UF/16V D4803 D4804
2

2
TVUFB0201AC0 TVUFB0201AC0
80ohm
+VDDTX12 CM4801 07T180000016 07T180000016

4
17 HDMI_TXP0_CON
+VDD12 15 OUT_D0p 16 HDMI_TXN0_CON
18 VDDTX12_1 OUT_D0n 20 HDMI_TXP1_CON
VDDTX12_2 OUT_D1p

GND1

GND1
19 HDMI_TXN1_CON HDMI_TXN2_CON 3 0OHM 4 RN4801B HDMI_TXN2_R HDMI_TXN2_RR
OUT_D1n 23 HDMI_TXP2_CON
OUT_D2p
1

22 HDMI_TXN2_CON @
C4824 C4823 C4818 C4801 C4815 +VDDRX12 OUT_D2n 14 HDMI_CLKP_CON
OUT_CLKp 13 HDMI_CLKN_CON
R1.1 modify
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.01UF/16V 0.01UF/16V OUT_CLKn
2

43
VDDRX12_1
+VDD33 20180102-1
46
VDDRX12_2 Change CM Size to 0504
7 R4820 1 2 HDMI_SCL
SCL_SNK 0ohm to 0402

1
+VDDTX12 8 R4821 1 2 HDMI_SDA
SDA_SNK R4804 R4812
10KOhm 10KOhm
@ @
HDMI_TXP0_C 44
IN_D0p

2
1

HDMI_TXN0_C 45
C4820 C4819 C4812 HDMI_TXP1_C 41 IN_D0n 28 CSDA R4863 1 @ 2 0Ohm HDMI_CSDA
IN_D1p CSDA HDMI_CSDA 16,17,28 CON4801
0.1UF/16V 0.1UF/16V 0.01UF/16V HDMI_TXN1_C 42 29 CSCL R4819 1 @ 2 0Ohm HDMI_CSCL

22
20
IN_D1n CSCL HDMI_CSCL 16,17,28
2

HDMI_TXP2_C 38 HDMI_CON_19P
HDMI_TXN2_C 39 IN_D2p 12T12GBRD013

P_GND3
P_GND1
HDMI_CLKP_C 47 IN_D2n
HDMI_CLKN_C 48 IN_CLKp
IN_CLKn 21 HDMI_HPD_SNK
HPD_SNK 1 HDMI_TXP2_RR
+VDD33 HDMI_HPD_SRC 40 2 1 3 HDMI_TXN2_RR
HPD_SRC HDMI_TXP1_RR 4 2 3 5
HDMI_SCL_GPU_C R4823 1 @ 2 0Ohm 34 HDMI_TXN1_RR 6 4 5 7 HDMI_TXP0_RR
HDMI_SDA_GPU_C R4822 1 @ 2 0Ohm 33 SCL_SRC/AUXP 35 RESETB 8 6 7 9 HDMI_TXN0_RR
SDA_SRC/AUXN RESETB 36 R4803 1 2 4.99KOhm HDMI_CLKP_RR 10 8 9 11
REXT +VDD33 +5VS_HDMI 10 11
1

B HDMI_CLKN_RR 12 13 B
C4816 C4802 C4814 14 12 13 15 HDMI_SCL
HDMI_SDA 16 14 15 17
0.1UF/16V 0.1UF/16V 0.01UF/16V 16 17
2

+5VS_HDMI 18 19 HDMI_HPD_SNK

1
2 18 19
TESTMODEB 4 R4806
PDB 10KOhm

P_GND4
P_GND2
9

1
HDMI_CEC +12VS
10 D4801
RSV1

1
+VDD33 HDMI_ID 32 12 AZ5725-01F
2

DCIN_ENB 3 HDMI_ID CEC_EN 25 C4836 07T180000049

DCIN_ENB NC RESETB Q4806 +5VS_HDMI
EQ 5 26 0.1UF/16V @
EQ RSV2 NDS351AN_NL

23
21
I2C_ADDR R4814 1 @ 2 4.7KOhm PRE 27 37 C4810 C4837
1

1
PRE POWERSWITCH

1
I2C_ADDR 31 1UF/6.3V 1UF/6.3V

2
G
HDMI_ID R4807 1 @ 2 4.7KOhm I2C_ADDR 49 0201 0201
GND_1 2 3 F4801 2 1 0.35A/6V +5VS_HDMI

2 S

3
X5R/+/-20% X5R/+/-20% +5VS
2

D
@
EQ R4810 1 @ 2 4.7KOhm
PS8209AQFN48GTR2-A2
R4801 2 @ 1 0Ohm
R2.0 modify
R4818 1 @ 2 4.7KOhm 02T080023M00 EMC
PRE R4809 1 @ 2 4.7KOhm

DCIN_ENB R4808 1 2 4.7KOhm

U4801B
58
GND_10

3
50 57 Q4807
51 GND_2 GND_9 56 1V/0.1A D4802
GND_3 GND_8 RUM003N02GT2L
I2C slave address selection; Internal pull down 52
GND_4 GND_7
55 +1V8_MAIN
L: Default, Slave address 0x10-2F 53 54
GND_5 GND_6
H: Alternative slave address 0x90-9F; 0xD0-DF HDMI_SCL_GPU_C 2 3 HDMI_SCL

S 2

D3
PS8209AQFN48GTR2-A2

1 2.2KOhm 1

3 2.2KOhm 2
HDMI ID enable; Internal pull down 02T080023M00
L: Dafault, HDMI ID enable
H: HDMI ID disable

G
1
3

EQ -- Receiver eualization setting; Internal pull up +1V8_MAIN

1
2.2KOhm
RN4809B

RN4809A

L: Compensation for channel loss up to 13db

2.2KOhm

H: Deafult, compensation for channel loss up to 17db

A M: Compensation for channel loss up to 11db A
PRE -- Output preemphasis setting; Internal pull up
4

L: Pre-emphasis = 2.5db

4
1
H: Deafult, No Pre-emphasis HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible

RN4806A

RN4806B
G
SP4801 1 2 0Ohm HDMI_SCL_GPU_C
73 HDMI_SCL_GPU HDMI_SCL
SP4802 1 2 0Ohm HDMI_SDA_GPU_C 2 3 HDMI_SDA
2 S

3D
73 HDMI_SDA_GPU

1
C4827 C4826
Q4808
10PF/50V
@
10PF/50V
@
Title : HDMI OUT

2
RUM003N02GT2L PEGATRON PROPRIETARY AND CONFIDENTIAL
For EMI BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 48 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4 3
Vinafix.com 2 1

CPU Thermal Sensor

temperature set=85 C
+3VS
RSET(kΩ)= 0.0012T^2 — 0.9308T + 96.147

1
R5002
150Ohm R5006
D 1% 25.5KOhm D
U5004 10T220000275

2
5 1
VCC SET 2
GND

1
4 3
HYST OT# CPU_THERM# 32,92
C5012

2
0.1UF/16V G709T1UF C5015
2 0.01UF/16V

1
+5VS

CPU FAN R1.1 modify

2
D5001 R5008
SS0520 0Ohm
12T17GISM080 07T030000012 @ @
C WTOB_CON_4P D5002 2 1 SS0520 C
2

1
6 1 FAN0_TACH_R R5013 1 2 0Ohm
SIDE2 1 2
FAN0_TACH 30 EC(PU@+3VS,10Kohm
2 3
3 FAN0_PWM 30
5 4
SIDE1 4
1

1
CON5001 C5008 C5006
C5011 C5010 22PF/50V 100PF/50V
R1.1 modify 22PF/50V 2.2UF/10V @ @
2

2
@

R1.1 modify

GPU FAN R1.1 modify

+5VS
1

D5003 R5005
B SS0520 0Ohm B
12T17GISM080 07T030000012 @ @
WTOB_CON_4P D5004 2 1 SS0520
2

6 1 FAN1_TACH_R R5004 1 2 0Ohm

SIDE2 1 2
FAN1_TACH 30 EC(PU@+3VS,10Kohm
2 3
3 FAN1_PWM 30
5 4
SIDE1 4
1

CON5002 C5003 C5004

C5001 C5002 22PF/50V 100PF/50V
R1.1 modify 22PF/50V 2.2UF/10V @ @
2

R1.1 modify

A A

Title : FAN/THERMAL
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 50 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4 3
Vinafix.com 2 1

SSD/HDD M.2 2280 KEY-M

CON5101

76
SIDE1 NP_NC1
78
+3VS_SSD
3A max +3VS

JP5101
1
3 1 2 +3VS_SSD 1 2
5 3 2 4 1 2
20 PCIE_RXN9_SSD 5 4

1
D 7 6 D
20 PCIE_RXP9_SSD 7 6 2MM_OPEN_5MIL

1
9 8 C5110 C5111 C5112
C5127 2 1 0.22UF/10V PCIE_TXN9_SSD_C 11 9 8 10 SSD_LED# C5101 0.01UF/50V 0.1UF/16V 22UF/6.3V
20 PCIE_TXN9_SSD 11 10 SSD_LED# 56

2
C5128 2 1 0.22UF/10V PCIE_TXP9_SSD_C 13 12 10PF/50V
20 PCIE_TXP9_SSD 13 12

2
15 14 @
17 15 14 16
20 PCIE_RXN10_SSD
19 17 16 18
R2.0 modify
20 PCIE_RXP10_SSD
21 19 18 20 EMC
C5130 2 1 0.22UF/10V PCIE_TXN10_SSD_C 23 21 20 22
20 PCIE_TXN10_SSD 23 22

FX505 RF reserve @20180131

C5104 2 1 0.22UF/10V PCIE_TXP10_SSD_C 25 24 +3VSUS +3VS_SSD
20 PCIE_TXP10_SSD 25 24
27 26
29 27 26 28
20 PCIE_RXN11_SSD 29 28 C5131
20 PCIE_RXP11_SSD 31 30
33 31 30 32 2 1
C5105 2 1 0.22UF/10V PCIE_TXN11_SSD_C 35 33 32 34
20 PCIE_TXN11_SSD 35 34
C5129 2 1 0.22UF/10V PCIE_TXP11_SSD_C 37 36 1000PF/50V
20 PCIE_TXP11_SSD 37 36
39 38
39 38 SATA_DEVSLP1 21
20 PCIE_RXP12_SATA1_SSD R5111 2 1 PCIE_RXP12_SATA1_SSD_C 41 40
R5112 2 1 PCIE_RXN12_SATA1_SSD_C 43 41 40 42 C5132
20 PCIE_RXN12_SATA1_SSD 43 42
45 44
45 44 2 1
C5126 2 1 0.22UF/10V PCIE_TXN12_SATA1_SSD_C 47 46
20 PCIE_TXN12_SATA1_SSD 47 46
C5108 2 1 0.22UF/10V PCIE_TXP12_SATA1_SSD_C 49 48
20 PCIE_TXP12_SATA1_SSD 49 48 1000PF/50V
51 50 BUF_PLT_RST#_SSD SP5101 2 1 nb_r0402_short_5mil_small
51 50 BUF_PLT_RST# 24,30,31,32,33,53,74
53 52 CLK_REQ7_SSD#
25 CLK_PCIE_SSD#_PCH 53 52 CLK_REQ7_SSD# 24
55 54 WAKE_PCIE #_SSD 1 T5104
25 CLK_PCIE_SSD_PCH 55 54
57 56
57 56 58
58

C C
+3VS_SSD
67
PCIE_SSD_PEDET 69 67 68 SUSCLK_SSD 1 T5101
71 69 68 70
73 71 70 72 +3VS_SSD
75 73 72 74
R5101 75 74

1
10KOhm
@ 77 79 C5113 C5114 C5115
H: PCIE type SIDE2 NP_NC2 0.01UF/50V 0.1UF/16V 22UF/6.3V
L: SATA type

2
21 PCIE_SSD_PEDET MINI_PCI_67P
12T44GBSM033

SATA Conn. 2.5"HDD

B B

CON5103

S1
C5119 1 2 0.01UF/16V SATA_TXP4_HDD_C S2 S1 4
21 SATA_TXP4_HDD S2 P_GND1
C5120 1 2 0.01UF/16V SATA_TXN4_HDD_C S3
21 SATA_TXN4_HDD S3
S4 2
C5121 1 2 0.01UF/16V SATA_RXN4_HDD_C S5 S4 NP_NC1
21 SATA_RXN4_HDD S5
21 SATA_RXP4_HDD C5122 1 2 0.01UF/16V SATA_RXP4_HDD_C S6
S7 S6
S7

P1
P2 P1
+5VS 1 P3 P2
+5VS_HDD P4 P3
T5103 P4
P5
P6 P5
1A max P7
P8
P6
P7
SP5102 1 2 0Ohm P9 P8
P10 P9
1 P11 P10
tx_r0603_short P11
1

T5102 P12 1
C5106 C5107 C5124 C5102 C5125 P13 P12 NP_NC2
P14 P13 3
10PF/50V 2.2NF/50V 10UF/6.3V 0.1UF/16V 1000PF/50V P14 P_GND2
2

P15
A @ @ @ P15 A

SATA_CON_22P
12T24GBRD031

FX505 RF reserve @20180131 Title : SSD/HDD

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 51 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

52.USB3.0 +5V +5V +5V 7,31,57,91

2
3 4
1 2 0.1UF/16V RN5203B 0Ohm
C5234 USB3_TXN1_C USB3_TXN1_R R5203
20 USB3_TXN1
10KOhm

3
90Ohm/100MHz

1
CM5203

13

10
@
CON5201

4
C5235 1 2 0.1UF/16V USB3_TXP1_C USB3_TXP1_R
20 USB3_TXP1 1 2 USB_PWRSW_EN

P_GND4

P_GND1
RN5203A 0Ohm
Close to Connector side
+5V_USB0
+5V
2A R1.1 modify
D RN5204B
3
0Ohm
4
USB3_RXN1_R
2A 5
VIN VOUT
U5201
1 R5205 1 2 0ohm 2A EMC
USB3_TXP1_R
+5V_USB0_F
9
1 STDA_SSTX+
VBUS D
20 USB3_RXN1 2 10TZ40000002 USB3_TXN1_R 8
GND STDA_SSTX-

1
USB_PWRSW_EN 4 3 USB_PN1_30_R 2

3
EN OCB + CE5201 D5201 D-

1
90Ohm/100MHz C5207 7
AZ5725-01F GND_DRAIN

1
CM5204 APL3518ABI-TRG 47UF/6.3V C5214 C5211 C5208 0.1UF/16V USB_PP1_30_R 3
07T180000049 6 D+
C5201 06T290000064 @ 10UF/6.3V 22UF/6.3V 22UF/6.3V USB3_RXP1_R
@ N/A STDA_SSRX+

2
1UF/10V 4

4
USB3_RXP1_R GND

2
20 USB3_RXP1 1AT200000039 USB3_RXN1_R 5
1 2 STDA_SSRX-

2
RN5204A 0Ohm MLCC 1UF/10V (0402) X5R 10%

P_GND3

P_GND2
@
1 2 R5201 1 @ 2 0Ohm
USB_PP1_30_R USB_OC0# 21
20 USB_PP1_30 RN5207A 0Ohm tx_r0402_0ohm USB_CON_9P

12

11
1

4
USB_PN1_30_R
CM5207 12T130022N00
USB_PP1_30_R
90Ohm/100MHz U5204
N/A USB3_TXP1_R 1 10 USB3_TXP1_R
CH1 n.c.4 9

3
USB3_TXN1_R 2 USB3_TXN1_R
3 4 USB_PN1_30_R 3 CH2 n.c.3
20 USB_PN1_30 RN5207B 0Ohm GND1pin8
USB3_RXP1_R 4 7 USB3_RXP1_R
@ USB3_RXN1_R 5 CH3 n.c.2 6 USB3_RXN1_R

1
D5204 D5205 CH4 n.c.1
AZ5725-01F AZ5725-01F PUSB3F96
07T180000049 07T180000049 07T220000032
N/A N/A

PLACE ESD Diodes near Connector

13

10
CON5202
RN5205B 3 0Ohm 4

P_GND4

P_GND1
C5236 1 2 0.1UF/16V USB3_TXN3_C USB3_TXN3_R
20 USB3_TXN3 +5V_USB1

3
@
90Ohm/100MHz
+5V
2A R1.1 modify
C
1
CM5205
2A 5
U5202
VIN VOUT
1 R5206 1 2 0ohm 2A EMC
USB3_TXP3_R
+5V_USB1_F
9
1 STDA_SSTX+
VBUS
C

4
C5237 1 2 0.1UF/16V USB3_TXP3_C USB3_TXP3_R 2 10TZ40000002 USB3_TXN3_R 8
20 USB3_TXP3 GND STDA_SSTX-

1
RN5205A 1 0Ohm 2 USB_PWRSW_EN 4 3 USB_PN2_30_R 2
EN OCB + CE5202 D5202 D-

1
Close to Connector side C5206
AZ5725-01F
7
GND_DRAIN

1
APL3518ABI-TRG 47UF/6.3V C5215 C5212 C5203 0.1UF/16V USB_PP2_30_R 3
07T180000049 6 D+
C5202 06T290000064 @ 10UF/6.3V 22UF/6.3V 22UF/6.3V USB3_RXP3_R
N/A STDA_SSRX+

2
RN5206B 3 0Ohm 4 1UF/10V 4
GND

2
USB3_RXN3_R 1AT200000039 USB3_RXN3_R 5
20 USB3_RXN3 STDA_SSRX-

2
MLCC 1UF/10V (0402) X5R 10%
2

P_GND3

P_GND2
90Ohm/100MHz
CM5206
1

USB3_RXP3_R R5202 1 @ 2 0Ohm

20 USB3_RXP3 1 2 USB_OC1# 21
RN5206A 0Ohm tx_r0402_0ohm USB_CON_9P

12

11
12T130022N00

@
4 0Ohm 3 USB_PN2_30_R
20 USB_PN2_30 RN5208B
3

USB_PN2_30_R
CM5202
USB_PP2_30_R U5205
90Ohm/100MHz
USB3_TXP3_R 1 10 USB3_TXP3_R
N/A CH1 n.c.4
USB3_TXN3_R 2 9 USB3_TXN3_R
CH2 n.c.3
4

1
3
2 1 RN5208A D5206 D5207 GND1pin8
0Ohm USB_PP2_30_R USB3_RXP3_R 4 7 USB3_RXP3_R
20 USB_PP2_30 AZ5725-01F AZ5725-01F CH3 n.c.2
USB3_RXN3_R 5 6 USB3_RXN3_R
07T180000049 07T180000049 CH4 n.c.1
@
N/A N/A
PUSB3F96
07T220000032

2
PLACE ESD Diodes near Connector

B B

+5V_USB20_CON
+5V
R1.1 modify CON5203
1.5A 5
U5203
1
1.5A EMC 1 P_GND4
8
6
VIN VOUT 2 USB_PN6_R 2 1 P_GND2
GND 2

1
USB_PWRSW_EN 4 3 USB_PP6_R 3
EN OCB D5208 3
1

2
@ 4 5
+ CE5203 AZ5725-01F 4 P_GND1 7
C5204 C5205 APL3518ABI-TRG C5209 C5216 C5210 C5213
07T180000049 P_GND3
0.1UF/16V 0.1UF/16V 06T290000064 47UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V 0.1UF/16V
@
2

1
USB_CON_1X4P
4 3 RN5201B USB_PN6_R @ @

2
20 USB_PN6_20 0Ohm
12T130021N00

2
3

90Ohm/100MHz
EMI CM5201
4

2 0Ohm 1 USB_PP6_R
20 USB_PP6_20
RN5201A
@

R5204 1 @ 2 0Ohm
USB_OC2# 21
tx_r0402_0ohm
USB_PN6_R
USB_PP6_R

1
D5209 D5210
AZ5725-01F AZ5725-01F
07T180000049 07T180000049

2
A A

PLACE ESD Diodes near Connector

Title : USB JCAK

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 52 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2

+3VSUS +3VSUS
1

7,21,22,23,24,26,28,30,31,33,36,44,48,68,74,81,88,92,96

WLAN+BT
+1.8VSUS +1.8VSUS 21,26,84

M.2 2230 KEY-E WLAN bypass capactors:

+3VSUS_WLAN Place 10UF near WLAN power source side.

+3VSUS
Place 0.1UF near pin 2,4,72,74
76
CON5301
78
1.5A
1 NP_NC1 SIDE1
D D
3 4 USB_PP14_BT_NGFF 3 1 2 R5301 1 2 0Ohm
20 USB_PP14_BT 0Ohm 3 2
RN5307B USB_PN14_BT_NGFF 5 4
7 5 4 6 tx_r0805_short
7 6

1
@ CNV_WR_D1N_R 9 8 C5308 C5309 C5310 C5311 C5313 C5312
90Ohm/100MHz CNV_WR_D1P_R 11 9 8 10 CNV_RF_RST#_R 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 10UF/6.3V 10UF/6.3V
CM5302 13 11 10 12
13 12

2
CNV_WR_D0N_R 15 14 XTAL_CLKREQ#_R
15 14

1
CNV_WR_D0P_R 17 16 C5301
RN5307A 1 2 19 17 16 18 0.1UF/16V
20 USB_PN14_BT 0Ohm 19 18
CNV_WR_CLKN_R 21 20 @
21 20

2
CNV_WR_CLKP_R 23 22 CNV_BRI_RSP_R
23 22
32 CNV_RGI_DT_R
33 32 34 CNV_RGI_RSP_R +3VSUS_WLAN
35 33 34 36 CNV_BRI_DT_R
21 PCIE_TXP14_WLAN 37 35 36 38 CL_RST#_NGFF R5322 1 @ 2 0Ohm CL_RST#
21 PCIE_TXN14_WLAN 39 37 38 40 CL_RST# 23
CL_DATA_NGFF R5323 1 @ 2 0Ohm CL_DATA
39 40 CL_DATA 23

1
41 42 CL_CLK_NGFF R5324 1 @ 2 0Ohm CL_CLK
21 PCIE_RXP14_WLAN 43 41 42 44 CL_CLK 23
R5311
21 PCIE_RXN14_WLAN 45 43
45
44
46
46 10KOhm PIN54: BT_DIS
47 48
25 CLK_PCIE_WLAN_PCH 47 48
49 50 WIFI_SUSCLK_32K_R
25 CLK_PCIE_WLAN#_PCH 49 50 D5303

2
51 52 PLT_RST#_BUF_R SP5351 1 2
53 51 52 54 BUF_PLT_RST# 24,30,31,32,33,51,74 1 2
BT_ON_C
24 CLK_REQ0_WLAN# 53 54 BT_ON/OFF# 21
WAKE_PCIE_WLAN# 55 56 WLAN_ON_C
57 55 56 58
CNV_WT_D1N_R 59 57 58 60 RB751V-40
59 60

1
CNV_WT_D1P_R 61 62 C5320 C5321 0.37V/30mA
63 61 62 64 CLKIN_XTAL_R 0.1UF/16V 0.1UF/16V
63 64 @
CNV_WT_D0N_R 65 66 @ @
65 66

2
CNV_WT_D0P_R 67 68 +3VSUS_WLAN
69 67 68 70
CNV_WT_CLKN_R 71 69 70 72
EMI Reserve 0.1uF

1
CNV_WT_CLKP_R 73 71 72 74 Close to CON5301
75 73 74 R5332
75 100KOhm
77
NP_NC2 SIDE2
79
PIN56: WIFI_DIS
NGFF_67P

2
D5305
12T440001N00
1 2
WLAN_ON 21
C C

RB751V-40
SP5313 0.37V/30mA
1 2 @
24,33 PCIE_WAKE#
nb_r0402_short_5mil_small

CNVi
25 CNV_WR_CLKP SP5301 1 2 CNV_WR_CLKP_R
25 CNV_WR_CLKN SP5302 1 2 CNV_WR_CLKN_R

SP5303 1 2 CNV_WR_D0P_R
R 21
21
CNV_WR_D0P
CNV_WR_D0N SP5304 1 2 CNV_WR_D0N_R

21 CNV_WR_D1P SP5305 1 2 CNV_WR_D1P_R

21 CNV_WR_D1N SP5306 1 2 CNV_WR_D1N_R

SP5307 1 2 CNV_WT_CLKP_R
25 CNV_WT_CLKP
SP5308 1 2 CNV_WT_CLKN_R
25 CNV_WT_CLKN
SP5309 1 2 CNV_WT_D0P_R
B
T 21
21
CNV_WT_D0P
CNV_WT_D0N
SP5310 1 2 CNV_WT_D0N_R
B

SP5335 1 2 CNV_WT_D1P_R
21 CNV_WT_D1P
SP5312 1 2 CNV_WT_D1N_R
21 CNV_WT_D1N

23 XTAL_CLKREQ# SP5336 1 2 XTAL_CLKREQ#_R

+1.8VSUS

R5314 1 2 22Ohm CNV_BRI_DT_R

21 CNV_BRI_DT 1 2 22Ohm CNV_BRI_RSP_R
21 CNV_BRI_RSP R5315
R5316 1 2 22Ohm CNV_RGI_DT_R CNV_RGI_DT R5341 1 2 20KOhm
21 CNV_RGI_DT 1 2 22Ohm CNV_RGI_RSP_R CNV_BRI_DT 1 2 4.7KOhm
21 CNV_RGI_RSP R5334 R5343

23 CNV_RF_RST# SP5318 1 2 CNV_RF_RST#_R

R5338 1 1% 2 71.5KOhm CNV_RF_RST#_R
R5339 1 @ 1% 2 71.5KOhm XTAL_CLKREQ#_R

R5344 2 @ 1 100KOhm CNV_RGI_DT

1 2 10KOhm CNV_BRI_DT
571391_CFL_H_PDG_Rev1p0_p.483/661 R5345 @

25 CLKIN_XTAL SP5347 1 2 CLKIN_XTAL_R

33Ohm R5337 WIFI_SUSCLK_32K_R

24 SUS_CLK

571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.98/224
R=33 ohm

571182_CNL_PCH_H_EDS_Vol_1_Rev_1p1_P.60/312 571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.107/224
571391_CFL_H_PDG_Rev1p0_p.482/661 GPP_J6 /CNV_RGI_DT /UART0_TXD: GPP_J4 /CNV_BRI_DT /UART0_RTS# :
BRI,RGI: An external pull-up or pull-down is required. An external pull-up is required on this strap since 38.4
A DT:Resistor R1 Spec: 33 Ohm, to be placed close to the connector. 0 = Integrated CNVi enable. MHz XTAL is not supported on the PCH. A

RSP:Resistor R1 Spec: 22 Ohm, to be placed close to the connector. 1 = Integrated CNVi disable. 0 = 38.4 XTAL frequency selected. (Default)
571483_CFL_H_DDR4_RVP_TDK_SCH_Rev0p9_P.97/224 1 = 24MHz XTAL frequency selected.
R=0ohm

Title : WLAN
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 53 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com
3 2 1

C5603
+5VSUS
MB Side +5VSUS +5VSUS 31,81

+5VS +5VS 31,36,48,50,51,57,80,87,89,91

2 1
CON5601
0.1UF/16V 11
D GND1 D
+5VS
1
C5604 1
2
2 1 3 2
4 3
5 4
0.1UF/16V 6 5
30,31 PWR_LED# 6
30 CHG_LED#_O 7
8 7
30 CHG_LED#_W 8
51 SSD_LED# 9
1 2 10 9
21 SATA_LED# 21 AIR_LED 10
SP5601
12
GND2

FPC_CON_10P
12T18GWSM143

C C

Power LED AIR PLANE LED

NOTE: AIR_LED#_R
High -> airplane mode ON -> LED ON
Low -> airplane mode OFF -> LED OFF

Charger LED PCB/ID LOCATION

B B

PWR LED Charger LED HDD LED RF LED

LED5601 LED5606 LED5604 LED5602

HDD LED

A A

Title : LED
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A4 Thursday, June 28, 2018 56 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+5VSUS +5VSUS
DB Side +5VSUS_DB
DBC01 +5VS +5VS
1 2
GND_DB
DBCON01
11 0.1UF/16V
GND1 GND_DB
1 +5VS_DB
1 DBC02
2
2 3 1 2
3 GND_DB
4
4 5
5 GND_DB 0.1UF/16V
6 PWR_LED#_W_DB
6 7 CHG_LED#_O_DB
7 8 CHG_LED#_W_DB
8 9 Storage_LED#_W_DB
9 10 AIR_LED_W_DB
D 10 D
12
GND2 GND_DB

FPC_CON_10P
12T18GWSM143

NOTE: AIR_LED#_R
Power LED AIR PLANE LED(White) High -> airplane mode ON -> LED ON
Low -> airplane mode OFF -> LED OFF
+5VSUS_DB
1

DBR01
10KOhm DBLED01 +5VSUS_DB +5VS_DB
2.3~1.8V DBLED02
@ 3
460~560ohm 3
2

PWR_LED#_W_DB_A PWR_LED#_W_DB_R DBR031 2 390Ohm PWR_LED#_W_DB_RR 2 1

AIR_LED_W_DB_R DBR06 1 2 390Ohm AIR_LED_W_DB_RR 2 1 AIR_LED_W_DB_PWR DBR13 2 1 0Ohm
6

2
DBQ01A DBQ01B

2
3 +5VSUS_DB
PWR_LED#_W_DB 2 UM6K1N 5 UM6K1N DBD01 D
DBQ02 DBD02
@ @ @ AZ5725-01F 2N7002
1

AZ5725-01F
07T180000049 AIR_LED_W_DB 11 WHITE DBR12 @
WHITE 07T180000049 2 1 0Ohm
G 07T130000052

1
GND_DB GND_DB 07T130000052
2 S @

1
2.7~3.4V DBR08

1
If=5mA 10KOhm
DBR02 1 2 0Ohm
GND_DB

2
GND_DB GND_DB

GND_DB

C C

Charger LED(White/Orange)

+5VSUS_DB
CHG_LED#_O_DB DBR05 1 2 560Ohm CHG_LED#_O_DB_R
2

DBLED04
DBD03 @ 3
AZ5725-01F ORANGE
07T180000049
2
1

PURE WHITE
1
GND_DB
ORANGE&WHITE
CHG_LED#_W_DB DBR07 1 2 390Ohm CHG_LED#_W_DB_R
07T130000069
S2S(Orange):1.7~2.4V
2

GH(Green):2.7~3.7V
DBD04 If=5mA
AZ5725-01F @
07T180000049
1

GND_DB

B B

HDD LED PCB/ID LOCATION

Tooling Hole
+5VS_DB
+5VS_DB
1

DBLED03
DBR15 3
10KOhm
1 2 390Ohm 2 1 DBH01
Storage_LED#_W_DB_R DBR04 Storage_LED#_W_DB_RR
1
2

Storage_LED#_W_DB_A HOLE_NPTH
2
6

DBQ05A
UM6K1N
DBQ05B
UM6K1N @
DBD05
AZ5725-01F
PWR LED Charger LED HDD LED RF LED
Storage_LED#_W_DB 2 5
07T180000049 WHITE
DBLED01 DBLED04 DBLED03 DBLED02
1

07T130000052
1

GND_DB GND_DB
GND_DB
A A
DBR14 2 @ 1 0Ohm

Title : LED
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 56 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

V^2/R R1.1 modify

0402 = 1/16W = 62.5mW
0603 = 1/10W = 100mW 75.76mW 27.27mW 3.03mW 65.45mW 1.09mW
0805 = 1/8W = 125mW +5VS +3VS +1.05VS +1V2_HDMI +12VS +VTT_DDR
1206 = 1/4W = 250mW

2
@ @ @ @

2
R5708 R5705 R5716 R5701 R5715 R5709
+3VA 150Ohm 220Ohm 22Ohm 22Ohm R5710 4.7KOhm 330Ohm
RES 150 OHM 1/8W(0805)5% 220Ohm RES 4.7K OHM 1/16W (0402) 5% RES 330 OHM 1/16W (0402) 5%
10T440000010 10T240000014 10T240000023

1
1
10T240000014

1
D R5711 +5VS_DISCHRG +3VS_DISCHRG +1.05VS1_DISCHRG +1.05VS2_DISCHRG +12VS_DISCHRG +VTT_DDR_DISCHRG D
100KOhm

3
Q5701A Q5701B Q5704A Q5704B Q5703B Q5708A Q5708B
UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN UM6K1NG1DTN

2
2 @ 5 @ 2 5 5 2 5

4
@ @

6
Q5703A
UM6K1NG1DTN GND GND GND GND GND GND GND
21,30,68,91,92 SUSB_EC# 2

1
GND

R1.1 modify
75.76mW 27.27mW 3mW 4.36mW 18.94mW
+3VA +5V +3V +1.05V +1P2V +2P5VPP

2
@ @ @ @ @ @
R5714 R5712 R5713 R5731 R5727 R5732
100KOhm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
RES 100K OHM 1/16W (0402) 5% RES 330 OHM 1/10W(0603)5% RES 330 OHM 1/16W (0402) 5% RES 330 OHM 1/16W (0402) 5% RES 330 OHM 1/16W (0402) 5% RES 330 OHM 1/16W (0402) 5%
10T340000011
2

1
+5V_DISCHRG +3V_DISCHRG +1.05V_DISCHRG +1P2V_DISCHRG +2P5VPP_DISCHRG
C C

6
Q5790B Q5716B Q5716A Q5702B Q5702A
5 UM6K1NG1DTN 5 UM6K1NG1DTN 2 UM6K1NG1DTN 5 UM6K1NG1DTN 2 UM6K1NG1DTN

1
6

@ @ @ @ @
Q5790A
30,68,91 SUSC_EC# 2 UM6K1NG1DTN GND GND
GND GND
GND
1

@
GND

+3VA +NVVDD +1V8_MAIN +PEX_VDD

+1V8_AON +FBVDDQ

B R1.1 modify B

2
2

2
R5724
R5735 R5723 R5725 R5736
R5726 100Ohm
1

100Ohm 51Ohm 22Ohm 22Ohm +3VA 100Ohm @

R5720
100KOhm

1
1

1
1
+FBVDDQ_DISCHRG
+VGA_VCORE1_DISCHRG +1V8_MAIN_DISCHRG +PEX_VDD1_DISCHRG +PEX_VDD2_DISCHRG
R5717 +1V8_AON_DISCHRG
2

3
100KOhm 3
3

3
D

3
Q5714
Q5711B Q5711A Q5713A Q5713B
Q5707B 2N7002
5 UM6K1N 2 UM6K1N 2 UM6K1N 5 UM6K1N

2
5 UM6K1N 11 @
G
4

4
3

3
2 S

4
D
Q5717

2
6
2N7002
Q5707A
74,91 VGA_PWRON 11
74,91 VGA_AON_PWR_EN 2 UM6K1N
G
2 S

1
2

+NVVDD
+3VS_VGA

GND
R5741
R5737 R5738 150Ohm
22Ohm 22Ohm RES 150 OHM 1/8W(0805)5%
@ @
A A
+VGA_VCORE2_DISCHRG +VGA_VCORE3_DISCHRG
3

3
D
6

Q5720
Q5718A Q5718B 2N7002
2 UM6K1N 5 UM6K1N 11
@ @ G
2 S Title : DISCHARGE
1

PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 57 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4 3 2 1

D
Vinafix.com D

Battery Conn.
+BAT_CON

T6001 1 TPC26T
T6002 1 TPC26T

10
CON6001
8
Reserve for EMI
9 SIDE2 8 7
SIDE1 7 6
6 5 R6003 1 2 NB_R0603_10MIL_SMALL
5 SMB0_CLK 30,88
4 R6004 1 2 NB_R0603_10MIL_SMALL
4 SMB0_DAT 30,88
3
3 2
2 1
1

1
D6002 D6003
WTOB_CON_8P AZ5725-01F AZ5725-01F
C 12T17GBSM093 07T180000049 07T180000049 C
@ @

2
ABBA assign: 1217-01UG0AS(1217-017L000)，doesn't include 1217-01EG000 (the same pool)

AC in Conn.
+A/D_DOCK_IN_CON +A/D_DOCK_IN

CON6002
L6001
8 1 2
NP_NC2 1
1 2 80Ohm/100Mhz
2 3 FERRITE BEAD (1812)80 OHM/8A
3 4 09T010000051
4 5
B 5 6 B
6
1

1
7
NP_NC1 C6002 C6003
WTOB_CON_6P 0.1UF/25V 0.1UF/25V
2

2
12T17GBSM152

FX505GE N17P Adaptor: 120W

FX505GM N17E Adaptor: 150W

A A

Title : BAT/AC IN
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 60 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

65.NUT,Screw hole,Tooling hole

M.2 SSD NUT:
H6522

H6518
GND CT236B176D146

D D

H6525
Tooling hole
drill 3*3.5 drill 1.7 drill 2.2*1.7 H6524
H6518 H6524 H6526
1 1 1
O138x118DO138x118N C67D67N O87X67DO87X67N

1
H6521

O138x118DO138x118N
H6523

Screw hole H6521 H6517

B group: E:
CPU GPU bracket hole TOP: phi 7 drill 6
H6501 H6505
BOT: phi 7 drill 6
1 1
CT303CB185D146 CT303CB185D146 H6517
1
C H6502 H6506 C
1 1 C276D236
CT303CB185D146 CT303CB185D146
H6503 H6507
1 1 GND
CT303CB185D146 CT303CB185D146

1
H6504

CT303CB185D146
1
H6508

CT303CB185D146
H6509 H6510
F:
GND GND TOP: phi 8 drill 3
D group: BOT: phi 4 drill 3
H6511
H6513
1
CT315CB157D118
H6510
1
P_GND
GND
2 49
3 NP_NC_1 NP_NC_48 48

GND
4
5
NP_NC_2
NP_NC_3
NP_NC_47
NP_NC_46
47
46
C group:
6
7
NP_NC_4
NP_NC_5
NP_NC_45
NP_NC_44
45
44
TOP: phi 8 drill 2.5
8
9
NP_NC_6
NP_NC_7
NP_NC_43
NP_NC_42
43
42
BOT: phi 8 drill 2.5
10 NP_NC_8 NP_NC_41 41

放放放TOP)
NP_NC_9 NP_NC_40
H6511(放
11 40
12 NP_NC_10 NP_NC_39 39 H6514
13 NP_NC_11 NP_NC_38 38 1
B B
NP_NC_12 NP_NC_37
C315D98
14 37
NP_NC_13 NP_NC_36 S1T1XDCCUY00
H6516
15 36
NP_NC_14 NP_NC_35
H6514
16 35
17
18
NP_NC_15
NP_NC_16
NP_NC_17
NP_NC_34
NP_NC_33
NP_NC_32
34
33
1
H6515

C315D98
H6515
19 32
20 NP_NC_18 NP_NC_31 31 S1T1XDCCUY00

H6522 (放放放
放BOT)
21 NP_NC_19 NP_NC_30 30
NP_NC_20 NP_NC_29 H6516
22 29
NP_NC_21 NP_NC_28 1
23 28
NP_NC_22 NP_NC_27 C315D98

H6512 (放放放
放TOP)
24 27
25 NP_NC_23 NP_NC_26 26 S1T1XDCCUY00
NP_NC_24 NP_NC_25

GND
C315D118

Near Audio Jack H group: I group:

TOP: square 8 H6509 TOP: square8*8.5 drill 2.5 TOP: phi 7 drill 3 TOP: phi 3 drill 2.5
BOT: phi 8 drill 3 1
P_GND BOT: square8*8.5 drill 2.5 BOT: phi 7 drill 3 BOT: phi 3 drill 2.5
2 20
3 NP_NC1 NP_NC19 21
4 NP_NC2 NP_NC20 22
H6512 NP_NC3 NP_NC21
GND 5 23 H6513
1 NP_NC4 NP_NC22
6 24 1 H6523
RT315X335B315D118 NP_NC5 NP_NC23 H6525
7 25 R315X335D98 1
NP_NC6 NP_NC24 1
8 26 C276D118
9 NP_NC7 NP_NC25 27 C118D98
10 NP_NC8 NP_NC26 28
A B_GND NP_NC9 NP_NC27 A
11 29
12 NP_NC10 NP_NC28 30
NP_NC11 NP_NC29 GND
13 31 GND
14 NP_NC12 NP_NC30 32 GND
0Ohm NP_NC13 NP_NC31
R6501 1 @ 2 15 33
16 NP_NC14 NP_NC32 34
17 NP_NC15 NP_NC33 35
0Ohm NP_NC16 NP_NC34
R6502 1 @ 2 18 36
NP_NC17 NP_NC35
19
NP_NC18 NP_NC36
37
Title : NUT/HOLE
PEGATRON PROPRIETARY AND CONFIDENTIAL
C315D118
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
B_GND A_GND
Size Project Name FX505GE Rev
Custom Thursday, June 28, 2018 65 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com

5 4 3 2 1

+3VA +3VA 25,30,57,74,81,88,93

D D

Hall sensor
+3VA
LDU6601
1
3 Vdd
GND

1
2 C6601
OUTPUT
0.1UF/16V

2
AH180N-WG-7-P
06T340000001 GND
GND
/15inch

LDU6602 EC side PU
1
C 3 Vdd C
GND
2 LID_SW# LID_SW# 30,45
OUTPUT

AH180N-WG-7-P

1
06T340000001
GND
/17inch C6602
100PF/50V

2
@

GND

B B

A A

Title : TO DB
PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 66 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+3VSUS +3VSUS 7,21,22,23,24,26,28,30,31,33,36,44,48,53,74,81,88,92,96

EC processing time (3ms~33ms)

D R6801 1 2 D
24,30 PM_SUSB# SUSB_EC# 21,30,57,91,92
R6802 1 2
24,30 PM_SUSC# SUSC_EC# 30,57,91

DE_ALL_SYS_PGD_EC
DELAY_ALL_SYSTEM_PWRGDCPU_VRON
IMVP8 VR
p.30
EC p.68 15 p.68 CORE
VCCSA
For Intel power sequence requestment +3VSUS
+3V
for PM_PWROK
VCCGT
ALL_SYS_PWRGD to Delay_ALL_SYS_PGD >2ms p.24 VCCGTX
PM_SUSB#

1
Delay By EC(2ms)+ EC processing time (3ms~33ms) R6842
------------------------------------
PM_SUSB#
U6802
1 A 5
10KOhm p.24 for VCCST_PWRGD
VCC p.7
R6809 1 2 2 B

2
30 DE_ALL_SYS_PGD_EC
nb_r0402_short_5mil_small 3 4 R6811 1 2 DE_ALL_SYS_PGD_HW R6810 1 2
GND DELAY_ALL_SYSTEM_PWRGD 7,24
@ Y

1
C Vcc=2~5.5 nb_r0402_short_5mil_small nb_r0402_short_5mil_small C

1
R6808 C6804
@ 100KOhm 0.1UF/25V R6805 1 2
CPU_VRON 80
For shut down Sequence @

2
nb_r0402_short_5mil_small
Tplt17 < 1us

2
1
3
PM_SUSB# 2 GND GND

D6802
1V/0.1A

For shut down Sequence Tplt17 < 200us

Due to PDG1.2 Figure 43-5. SYS_PWROK
drop after PM_SUSB# before CPU_VRON 20
to add this solution +3VSUS +3V EC
SYS_PWROK_EC 21 PCH
p.30 SYS_PWROK
PM_SUSB# p.68
1

PM_SUSB#
U6803
1 A 5 R6841
p.24
VCC
100KOhm
R6843 1 2 SYS_PWROK_EC_G 2 B
30 SYS_PWROK_EC
2

B nb_r0402_short_5mil_small 3 4 R6804 1 2 B
GND SYS_PWROK 24,30
Y
Vcc=2~5.5 nb_r0402_short_5mil_small
1

@
R6806
1 @ 100KOhm
3
PM_SUSB# 2
2

D6811
1V/0.1A
GND

A A

Title : BYPASS EC SEQ.

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A3 Thursday, June 28, 2018 68 99 1.0
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

+PEX_VDD +PEX_VDD 57,73,96

+1V8_MAIN +1V8_MAIN 48,57,71,72,73,74,75,91
+1V8_AON +1V8_AON 57,74,75,87,89,91

NVIDIA Design Guide

DG-07875-001_v09 P.96
----------------------
PEX_DVDD Decoupling
------------------------
Under GPU
4 X 1uF (0402)
-------------------------
Near GPU
+1V8_MAIN SYS_PEX_RST_MON# 2 1 R7008
2 X 4.7uF (0603)
D 74 SYS_PEX_RST_MON# PEX_RST# 74 -------------------------- D

btw GPUand VR
1 X 10uF (0805)
1 X 22uF (0805)
1

R7001
0Ohm
U7001A PLACE BETWEEN GPU AND POWER SUPPLY
+1V8_AON PLACE UNDER GPU
2

1/18 PCI_EXPRESS
GM107/GM108
0201 size 0603 size 0805 size

2
GK107/GK208 +PEX_VDD
R7005
1

GF117
10KOhm AJ11
1

NC PEX_DVDD 285mA 1.05A

G

NC42 AG19 PEX_IOVDD

AJ12 PEX_IOVDD_1 AG21
1 PEX_RST_N PEX_IOVDD_2

1
AG22

1
3 2 AK12 PEX_IOVDD_3 AG24 C7003 C7007 C7012 C7019 C7008
CLKREQ_PEG#_R C7001 C7002 C7063 C7066 C7067 C7068
24 CLK_REQ9_PEG#
S 2

PEX_CLKREQ_N PEX_IOVDD_4 4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V

D3

AH21 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V

PEX_IOVDD_5

2
AL13 AH25

2
25 CLK_PCIE_PEG_PCH AK13 PEX_REFCLK PEX_IOVDD_6 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112
Q7001
25 CLK_PCIE_PEG#_PCH PEX_REFCLK_N @ @ @ +1V8_MAIN
RUM003N02GT2L
Rdson=1.4Ohm/Vgs(th)=1V PCIENB_RXP0 C7031 1 2 0.22UF/10V PCIENB_RXP0_C AK14
PEX_TX0 GND
PCIENB_RXN0 C7032 1 2 0.22UF/10V PCIENB_RXN0_C AJ14
PEX_TX0_N
PCIEG_TXP0 AN12
PEX_RX0 PEX_HVDD 750mA 750mA
PCIEG_TXN0 AM12 AG13 PEX_IOVDDQ
PEX_RX0_N PEX_IOVDDQ_01 AG15
PEX_IOVDDQ_02

1
PCIENB_RXP1 C7033 1 2 0.22UF/10V PCIENB_RXP1_C AH14 AG16

1
PEX_TX1 PEX_IOVDDQ_03 C7006 C7015 C7018 C7020 C7016
PCIENB_RXN1 C7034 1 2 0.22UF/10V PCIENB_RXN1_C AG14 AG18 C7004 C7005 C7064 C7065 C7069 C7070 C7071 C7072
PEX_TX1_N PEX_IOVDDQ_04 AG25 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V
PEX_IOVDDQ_05 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V

2
PCIEG_TXP1 AN14 AH15

2
PCIEG_TXN1 AM14 PEX_RX1 PEX_IOVDDQ_06 AH18 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112
PEX_RX1_N PEX_IOVDDQ_07 AH26 @ @ @ @
PCIENB_RXP2 C7035 1 2 0.22UF/10V PCIENB_RXP2_C AK15 PEX_IOVDDQ_08 AH27
PCIENB_RXN2 C7036 1 2 0.22UF/10V PCIENB_RXN2_C AJ15 PEX_TX2 PEX_IOVDDQ_09 AJ27
PEX_TX2_N PEX_IOVDDQ_10 AK27 GND

PCIEG: CPU => GPU PCIEG_TXP2

PCIEG_TXN2
AP14
AP15 PEX_RX2
PEX_IOVDDQ_11
PEX_IOVDDQ_12
AL27
AM28
PEX_RX2_N PEX_IOVDDQ_13 AN28
6 PCIEG_TXN[0..15] PEX_IOVDDQ_14
C PCIENB_RXP3 C7037 1 2 0.22UF/10V PCIENB_RXP3_C AL16 C
6 PCIEG_TXP[0..15] PEX_TX3
PCIENB_RXN3 C7038 1 2 0.22UF/10V PCIENB_RXN3_C AK16
PEX_TX3_N
PCIEG_TXP3 AN15
PCIEG_TXN3 AM15 PEX_RX3 PLACE UNDER GPU
PEX_RX3_N +1V8_MAIN
0402 size 0603 size
PCIENB_RXP4 C7039 1 2 0.22UF/10V PCIENB_RXP4_C AK17
PCIENB_RXN4 C7040 1 2 0.22UF/10V PCIENB_RXN4_C AJ17 PEX_TX4
PEX_TX4_N
PCIEG_TXP4 AN17
PCIEG_TXN4 AM17 PEX_RX4
PCIENB: CPU <= GPU PEX_RX4_N
PCIENB_RXP5 C7041 1 2 0.22UF/10V PCIENB_RXP5_C AH17
PEX_TX5 NVIDIA Design Guide
PCIENB_RXN5 C7042 1 2 0.22UF/10V PCIENB_RXN5_C AG17 >15mil
6 PCIENB_RXP[0..15] PEX_TX5_N AH12 PEX_PLL_HVDD
DG-07875-001_v09 P.96
6 PCIENB_RXN[0..15]
PCIEG_TXP5 AP17 PEX_PLL_HVDD ----------------------
PEX_RX5
PEX_HVDD Decoupling

1
PCIEG_TXN5 AP18 NC AG12 C7023 C7021 C7013
PEX_RX5_N PEX_SVDD_3V3 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V ------------------------
PCIENB_RXP6 C7043 1 2 0.22UF/10V PCIENB_RXP6_C AK18
PEX_TX6 Under GPU

2
PCIENB_RXN6 C7044 1 2 0.22UF/10V PCIENB_RXN6_C AJ18
PEX_TX6_N 4 X 1uF (0402)
PCIEG_TXP6 AN18 NVIDIA Design Guide -------------------------
PCIEG_TXN6 AM18 PEX_RX6 GND DG-07875-001_v09 P.96
PEX_RX6_N Near GPU
---------------------- 2 X 4.7uF (0603)
PCIENB_RXP7 C7045 1 2 0.22UF/10V PCIENB_RXP7_C AL19
PCIENB_RXN7 C7046 1 2 0.22UF/10V PCIENB_RXN7_C AK19 PEX_TX7 PEX_PLL_HVDD Decoupling --------------------------
PEX_TX7_N ------------------------ btw GPUand VR
PCIEG_TXP7 AN20
PEX_RX7
Under GPU 2 X 10uF (0805)
PCIEG_TXN7 AM20
PEX_RX7_N 1 X 0.1uF (0402) 1 X 22uF (0805)
PCIENB_RXP8 C7047 1 2 0.22UF/10V PCIENB_RXP8_C AK20
PCIENB_RXN8 C7048 1 2 0.22UF/10V PCIENB_RXN8_C AJ20 PEX_TX8
PEX_TX8_N L4
AP20 VDD_SENSE NVVDD_VDD_SENSE 87
PCIEG_TXP8
PCIEG_TXN8 AP21 PEX_RX8
PEX_RX8_N L5
GND_SENSE NVVDD_VSS_SENSE 87

PEX LANES 4 TO 15 NC FOR GM108

PCIENB_RXP9 C7049 1 2 0.22UF/10V PCIENB_RXP9_C AH20
PCIENB_RXN9 C7050 1 2 0.22UF/10V PCIENB_RXN9_C AG20 PEX_TX9
PEX_TX9_N
PCIEG_TXP9 AN21
PCIEG_TXN9 AM21 PEX_RX9
B PEX_RX9_N B
PCIENB_RXP10 C7051 1 2 0.22UF/10V PCIENB_RXP10_C AK21
PCIENB_RXN10 C7052 1 2 0.22UF/10V PCIENB_RXN10_C AJ21 PEX_TX10
PEX_TX10_N GPIO22 P8
PCIEG_TXP10 AN23 3V3AUX_NC
PCIEG_TXN10 AM23 PEX_RX10
PEX_RX10_N
PCIENB_RXP11 C7053 1 2 0.22UF/10V PCIENB_RXP11_C AL22
PCIENB_RXN11 C7054 1 2 0.22UF/10V PCIENB_RXN11_C AK22 PEX_TX11
PEX_TX11_N
PCIEG_TXP11 AP23
PCIEG_TXN11 AP24 PEX_RX11
PEX_RX11_N NC AJ26 PEX_TSTCLK+ R7002 1 1% 2 200Ohm
PCIENB_RXP12 C7055 1 2 0.22UF/10V PCIENB_RXP12_C AK23 PEX_TSTCLK_OUT
NC AK26 PEX_TSTCLK- @
PCIENB_RXN12 C7056 1 2 0.22UF/10V PCIENB_RXN12_C AJ23 PEX_TX12 PEX_TSTCLK_OUT_N
PEX_TX12_N
PCIEG_TXP12 AN24
PCIEG_TXN12 AM24 PEX_RX12
PEX LANES 8 TO 15 NC FOR GK208/GF117

PEX_RX12_N
PCIENB_RXP13 C7057 1 2 0.22UF/10V PCIENB_RXP13_C AH23
PCIENB_RXN13 C7058 1 2 0.22UF/10V PCIENB_RXN13_C AG23 PEX_TX13 NC AG26
PEX_TX13_N PEX_PLLVDD
PCIEG_TXP13 AN26
PCIEG_TXN13 AM26 PEX_RX13
PEX_RX13_N
PCIENB_RXP14 C7059 1 2 0.22UF/10V PCIENB_RXP14_C AK24
PCIENB_RXN14 C7060 1 2 0.22UF/10V PCIENB_RXN14_C AJ24 PEX_TX14 NVJTAG_SEL AK11 GPU_TESTMODE R7004 1 2 10KOhm
PEX_TX14_N TESTMODE GND
PCIEG_TXP14 AP26
PCIEG_TXN14 AP27 PEX_RX14
PEX_RX14_N
PCIENB_RXP15 C7061 1 2 0.22UF/10V PCIENB_RXP15_C AL25
PCIENB_RXN15 C7062 1 2 0.22UF/10V PCIENB_RXN15_C AK25 PEX_TX15
PEX_TX15_N
AN27 AP29 1%
PCIEG_TXP15 PEX_TERMP R7003 1 2 2.49KOhm
GND
PCIEG_TXN15 AM27 PEX_RX15 PEX_TERMP
PEX_RX15_N

A A

N16P-GT-A2
02T0A0000034

Title : GPU PCIE

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 70 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

U7001B +FBVDDQ +FBVDDQ 57,76,77,89

2/18 FBA +PEX_VDD +PEX_VDD 57,70,73,96
+1V8_MAIN +1V8_MAIN 48,57,70,72,73,74,75,91
U7001C
3/18 FBB U7001D +FBVDDQ
GC6 2.0 NO USE
FBA_D<0> L28 BUFRST_N E1 GPU_BUFRST R7118 2 @ 1 10KOhm 15/18 FBVDDQ
76 FBA_D<0> FBA_D0 FB_CLAMP ALL PINS NC FOR GM108/
FBA_D<1> M29
76 FBA_D<1> FBA_D1 GK208/GF117 AA27
FBA_D<2> L29 GND FBVDDQ_01
76 FBA_D<2> FBA_D2 AA30
FBA_D<3> M28 FBB_D<0> G9 FBVDDQ_02
76 FBA_D<3> FBA_D3 77 FBB_D<0> FBB_D0 AB27
FBA_D<4> N31 FBB_D<1> E9 FBVDDQ_03
76 FBA_D<4> FBA_D4 77 FBB_D<1> FBB_D1 AB33
FBA_D<5> P29 FB_REFPLL_AVDD K27 FB_PLLAVDD FBB_D<2> G8 FBVDDQ_04
76 FBA_D<5> FBA_D5 FB_DLL_AVDD 77 FBB_D<2> FBB_D2 AC27
FBA_D<6> R29 FBB_D<3> F9 FBVDDQ_05
76 FBA_D<6> FBA_D6 77 FBB_D<3> FBB_D3 AD27
FBA_D<7> P28 FBB_D<4> F11 FBVDDQ_06
76 FBA_D<7> FBA_D7 77 FBB_D<4> FBB_D4 AE27

1
FBA_D<8> J28 C7110 FBB_D<5> G11 FBVDDQ_07
76 FBA_D<8> FBA_D8 77 FBB_D<5> FBB_D5 AF27
FBA_D<9> H29 0.1UF/16V FBB_D<6> F12 FBVDDQ_08
76 FBA_D<9> FBA_D9 77 FBB_D<6> FBB_D6 AG27
FBA_D<10> J29 FBB_D<7> G12 FBVDDQ_09
76 FBA_D<10> FBA_D10 77 FBB_D<7> FBB_D7 B13

2
FBA_D<11> H28 FBB_D<8> G6 FBVDDQ_10
76 FBA_D<11> FBA_D11 77 FBB_D<8> FBB_D8 B19
D FBA_D<12> G29 FBB_D<9> F5 FBVDDQ_11 D
76 FBA_D<12> FBA_D12 77 FBB_D<9> FBB_D9 E13
FBA_D<13> E31 FBB_D<10> E6 FBVDDQ_12
76 FBA_D<13> FBA_D13 77 FBB_D<10> FBB_D10 E19
FBA_D<14> E32 GND FBB_D<11> F6 FBVDDQ_13
76 FBA_D<14> FBA_D14 77 FBB_D<11> FBB_D11 H10
76 FBA_D<15>
FBA_D<15> F30 PLACE UNDER GPU 77 FBB_D<12>
FBB_D<12> F4 FBVDDQ_14 H11
FBA_D<16> C34 FBA_D15 FBB_D<13> G4 FBB_D12 +FBVDDQ
76 FBA_D<16> 77 FBB_D<13> FBVDDQ_15 H12
FBA_D16 +FBVDDQ FBB_D13
76 FBA_D<17>
FBA_D<17> D32
FBA_D17
FBA_CKE 77 FBB_D<14>
FBB_D<14> E2
FBB_D14
FBC_CKE FBVDDQ_16 H13
FBA_D<18> B33 FBB_D<15> F3 FBVDDQ_17
76 FBA_D<18> FBA_D18 77 FBB_D<15> FBB_D15 H14
FBA_D<19> C33 FBA_CMD<14> R7108 2 1 10KOhm 5% FBB_D<16> C2 FBB_CMD<14> R7114 2 1 10KOhm 5% FBVDDQ_18
76 FBA_D<19> FBA_D19 77 FBB_D<16> FBB_D16 H18
FBA_D<20> F33 FBA_CMD<30> R7109 2 1 10KOhm 5% FBB_D<17> D4 FBVDDQ_19
76 FBA_D<20> FBA_D20 77 FBB_D<17> FBB_D17 H19
FBA_D<21> F32 FBB_D<18> D3 FBB_CMD<30> R7113 2 1 10KOhm 5% FBVDDQ_20
76 FBA_D<21> FBA_D21 77 FBB_D<18> FBB_D18 H20
FBA_D<22> H33 FBB_D<19> C1 FBVDDQ_21
76 FBA_D<22> FBA_D22 77 FBB_D<19> FBB_D19 H21
76 FBA_D<23>
FBA_D<23> H32
77 FBB_D<20>
FBB_D<20> B3 FBC_RST# FBVDDQ_22 H22
FBA_D23 FBB_D20
76 FBA_D<24>
FBA_D<24> P34
FBA_D24
FBA_RST# 77 FBB_D<21>
FBB_D<21> C4
FBB_D21
FBVDDQ_23 H23
FBA_D<25> P32 FBB_D<22> B5 FBVDDQ_24
76 FBA_D<25> FBA_D25 77 FBB_D<22> FBB_D22 H24
FBA_D<26> P31 FBA_CMD<13> R7112 2 1 10KOhm 5% FBB_D<23> C5 FBB_CMD<13> R7117 2 1 10KOhm 5% FBVDDQ_25
76 FBA_D<26> FBA_D26 77 FBB_D<23> FBB_D23 H8
FBA_D<27> P33 FBA_CMD<29> R7110 2 1 10KOhm 5% FBB_D<24> A11 FBB_CMD<29> R7115 2 1 10KOhm 5% FBVDDQ_26
76 FBA_D<27> FBA_D27 77 FBB_D<24> FBB_D24 H9
FBA_D<28> L31 FBB_D<25> C11 FBVDDQ_27
76 FBA_D<28> FBA_D28 77 FBB_D<25> FBB_D25 L27
FBA_D<29> L34 FBB_D<26> D11 FBVDDQ_28
76 FBA_D<29> FBA_D29 77 FBB_D<26> FBB_D26 M27
FBA_D<30> L32 FBB_D<27> B11 FBVDDQ_29
76 FBA_D<30> FBA_D30 77 FBB_D<27> FBB_D27 N27
FBA_D<31> L33 GND FBB_D<28> D8 GND FBVDDQ_30
76 FBA_D<31> FBA_D31 77 FBB_D<28> FBB_D28 P27
FBA_D<32> AG28 FBB_D<29> A8 FBVDDQ_31
76 FBA_D<32> FBA_D32 77 FBB_D<29> FBB_D29 R27
FBA_D<33> AF29 U30 FBA_CMD<0> FBB_D<30> C8 FBVDDQ_32
76 FBA_D<33> FBA_D33 FBA_CMD0 FBA_CMD<0> 76 77 FBB_D<30> FBB_D30 T27
FBA_D<34> AG29 T31 FBA_CMD<1> FBB_D<31> B8 FBVDDQ_33
76 FBA_D<34> FBA_D34 FBA_CMD1 FBA_CMD<1> 76 77 FBB_D<31> FBB_D31 T30
FBA_D<35> AF28 U29 FBA_CMD<2> FBB_D<32> F24 FBVDDQ_34
76 FBA_D<35> FBA_D35 FBA_CMD2 FBA_CMD<2> 76 77 FBB_D<32> FBB_D32 T33
FBA_D<36> AD30 R34 FBA_CMD<3> FBB_D<33> G23 D13 FBB_CMD<0> FBVDDQ_35
76 FBA_D<36> FBA_D36 FBA_CMD3 FBA_CMD<3> 76 77 FBB_D<33> FBB_D33 FBB_CMD0 FBB_CMD<0> 77 Y27
FBA_D<37> AD29 R33 FBA_CMD<4> FBB_D<34> E24 E14 FBB_CMD<1> FBVDDQ_36
76 FBA_D<37> FBA_D37 FBA_CMD4 FBA_CMD<4> 76 77 FBB_D<34> FBB_D34 FBB_CMD1 FBB_CMD<1> 77
FBA_D<38> AC29 U32 FBA_CMD<5> FBB_D<35> G24 F14 FBB_CMD<2>
76 FBA_D<38> FBA_D38 FBA_CMD5 FBA_CMD<5> 76 77 FBB_D<35> FBB_D35 FBB_CMD2 FBB_CMD<2> 77 B16 FBVDDQ
FBA_D<39> AD28 U33 FBA_CMD<6> FBB_D<36> D21 A12 FBB_CMD<3> FBVDDQ FBVDDQ_AON_1
76 FBA_D<39> FBA_D39 FBA_CMD6 FBA_CMD<6> 76 77 FBB_D<36> FBB_D36 FBB_CMD3 FBB_CMD<3> 77 CALIBRATION PIN GDDR5/ E16 FBVDDQ
FBA_D<40> AJ29 U28 FBA_CMD<7> FBB_D<37> E21 B12 FBB_CMD<4> FBVDDQ FBVDDQ_AON_2
76 FBA_D<40> FBA_D40 FBA_CMD7 FBA_CMD<7> 76 77 FBB_D<37> FBB_D37 FBB_CMD4 FBB_CMD<4> 77 H15 FBVDDQ
FBA_D<41> AK29 V28 FBA_CMD<8> FBB_D<38> G21 C14 FBB_CMD<5> FBVDDQ FBVDDQ_AON_3
76 FBA_D<41> FBA_D41 FBA_CMD8 FBA_CMD<8> 76 77 FBB_D<38> FBB_D38 FBB_CMD5 FBB_CMD<5> 77 FB_CALx_PD_VDDQ 40.2 H16 FBVDDQ
FBA_D<42> AJ30 V29 FBA_CMD<9> FBB_D<39> F21 B14 FBB_CMD<6> FBVDDQ FBVDDQ_AON_4
76 FBA_D<42> FBA_D42 FBA_CMD9 FBA_CMD<9> 76 77 FBB_D<39> FBB_D39 FBB_CMD6 FBB_CMD<6> 77 V27 FBVDDQ
FBA_D<43> AK28 V30 FBA_CMD<10> FBB_D<40> G27 G15 FBB_CMD<7> FBVDDQ FBVDDQ_AON_5
76 FBA_D<43> FBA_D43 FBA_CMD10 FBA_CMD<10> 76 77 FBB_D<40> FBB_D40 FBB_CMD7 FBB_CMD<7> 77 FB_CALx_PU_GND 40.2 W27 FBVDDQ
FBA_D<44> AM29 U34 FBA_CMD<11> FBB_D<41> D27 F15 FBB_CMD<8> FBVDDQ FBVDDQ_AON_6
76 FBA_D<44> FBA_D44 FBA_CMD11 FBA_CMD<11> 76 77 FBB_D<41> FBB_D41 FBB_CMD8 FBB_CMD<8> 77 W30 FBVDDQ
FBA_D<45> AM31 U31 FBA_CMD<12> FBB_D<42> G26 E15 FBB_CMD<9> FBVDDQ FBVDDQ_AON_7
76 FBA_D<45> FBA_D45 FBA_CMD12 FBA_CMD<12> 76 77 FBB_D<42> FBB_D42 FBB_CMD9 FBB_CMD<9> 77 FB_CALx_TERM_GND 60.4 W33 FBVDDQ
FBA_D<46> AN29 V34 FBA_CMD<13> FBB_D<43> E27 D15 FBB_CMD<10> FBVDDQ FBVDDQ_AON_8
76 FBA_D<46> FBA_D46 FBA_CMD13 FBA_CMD<13> 76 77 FBB_D<43> FBB_D43 FBB_CMD10 FBB_CMD<10> 77
FBA_D<47> AM30 V33 FBA_CMD<14> FBB_D<44> E29 A14 FBB_CMD<11> GK107/
76 FBA_D<47> FBA_D47 FBA_CMD14 FBA_CMD<14> 76 77 FBB_D<44> FBB_D44 FBB_CMD11 FBB_CMD<11> 77
FBA_D<48> AN31 Y32 FBA_CMD<15> FBB_D<45> F29 D14 FBB_CMD<12> GK208/ GM107/GM108
76 FBA_D<48> FBA_D48 FBA_CMD15 FBA_CMD<15> 76 77 FBB_D<45> FBB_D45 FBB_CMD12 FBB_CMD<12> 77 GF117
FBA_D<49> AN32 AA31 FBA_CMD<16> FBB_D<46> E30 A15 FBB_CMD<13>
76 FBA_D<49> FBA_D49 FBA_CMD16 FBA_CMD<16> 76 77 FBB_D<46> FBB_D46 FBB_CMD13 FBB_CMD<13> 77
FBA_D<50> AP30 AA29 FBA_CMD<17> FBB_D<47> D30 B15 FBB_CMD<14>
76 FBA_D<50> FBA_D50 FBA_CMD17 FBA_CMD<17> 76 77 FBB_D<47> FBB_D47 FBB_CMD14 FBB_CMD<14> 77
FBA_D<51> AP32 AA28 FBA_CMD<18> FBB_D<48> A32 C17 FBB_CMD<15>
76 FBA_D<51> FBA_D51 FBA_CMD18 FBA_CMD<18> 76 77 FBB_D<48> FBB_D48 FBB_CMD15 FBB_CMD<15> 77 F1
FBA_D<52> AM33 AC34 FBA_CMD<19> FBB_D<49> C31 D18 FBB_CMD<16> 89 FBVDDQ_SENSE FB_VDDQ_SENSE
76 FBA_D<52> FBA_D52 FBA_CMD19 FBA_CMD<19> 76 77 FBB_D<49> FBB_D49 FBB_CMD16 FBB_CMD<16> 77
C FBA_D<53> AL31 AC33 FBA_CMD<20> FBB_D<50> C32 E18 FBB_CMD<17> +FBVDDQ C
76 FBA_D<53> FBA_D53 FBA_CMD20 FBA_CMD<20> 76 77 FBB_D<50> FBB_D50 FBB_CMD17 FBB_CMD<17> 77 T7105 1 PROBE_FB_GND F2
FBA_D<54> AK33 AA32 FBA_CMD<21> FBB_D<51> B32 F18 FBB_CMD<18> FB_GND_SENSE
76 FBA_D<54> FBA_D54 FBA_CMD21 FBA_CMD<21> 76 77 FBB_D<51> FBB_D51 FBB_CMD18 FBB_CMD<18> 77
FBA_D<55> AK32 AA33 FBA_CMD<22> FBB_D<52> D29 A20 FBB_CMD<19>
76 FBA_D<55> FBA_D55 FBA_CMD22 FBA_CMD<22> 76 77 FBB_D<52> FBB_D52 FBB_CMD19 FBB_CMD<19> 77 R7107 1 2 40.2Ohm 1% FBCAL_PD J27
FBA_D<56> AD34 Y28 FBA_CMD<23> FBB_D<53> A29 B20 FBB_CMD<20> FB_CAL_PD_VDDQ
76 FBA_D<56> FBA_D56 FBA_CMD23 FBA_CMD<23> 76 77 FBB_D<53> FBB_D53 FBB_CMD20 FBB_CMD<20> 77
FBA_D<57> AD32 Y29 FBA_CMD<24> FBB_D<54> C29 C18 FBB_CMD<21>
76 FBA_D<57> FBA_D57 FBA_CMD24 FBA_CMD<24> 76 77 FBB_D<54> FBB_D54 FBB_CMD21 FBB_CMD<21> 77 R7106 1 2 40.2Ohm 1% FBCAL_PU H27
FBA_D<58> AC30 W31 FBA_CMD<25> FBB_D<55> B29 B18 FBB_CMD<22> FB_CAL_PU_GND
76 FBA_D<58> FBA_D58 FBA_CMD25 FBA_CMD<25> 76 77 FBB_D<55> FBB_D55 FBB_CMD22 FBB_CMD<22> 77
FBA_D<59> AD33 Y30 FBA_CMD<26> FBB_D<56> B21 G18 FBB_CMD<23>
76 FBA_D<59> FBA_D59 FBA_CMD26 FBA_CMD<26> 76 77 FBB_D<56> FBB_D56 FBB_CMD23 FBB_CMD<23> 77 R7105 1 2 60.4Ohm FBCAL_TERM H25
FBA_D<60> AF31 AA34 FBA_CMD<27> FBB_D<57> C23 G17 FBB_CMD<24> FB_CAL_TERM_GND
76 FBA_D<60> FBA_D60 FBA_CMD27 FBA_CMD<27> 76 77 FBB_D<57> FBB_D57 FBB_CMD24 FBB_CMD<24> 77
FBA_D<61> AG34 Y31 FBA_CMD<28> FBB_D<58> A21 F17 FBB_CMD<25>
76 FBA_D<61> FBA_D61 FBA_CMD28 FBA_CMD<28> 76 77 FBB_D<58> FBB_D58 FBB_CMD25 FBB_CMD<25> 77
FBA_D<62> AG32 Y34 FBA_CMD<29> FBB_D<59> C21 D16 FBB_CMD<26>
76 FBA_D<62>
FBA_D<63> AG33 FBA_D62 FBA_CMD29 Y33 FBA_CMD<30>
FBA_CMD<29> 76 77 FBB_D<59>
FBB_D<60> B24 FBB_D59 FBB_CMD26 A18 FBB_CMD<27>
FBB_CMD<26> 77 PLACE CLOSE TO BALL N16P-GT-A2
76 FBA_D<63> FBA_D63 FBA_CMD30 FBA_CMD<30> 76 +FBVDDQ 77 FBB_D<60> FBB_D60 FBB_CMD27 FBB_CMD<27> 77
V31 FBA_CMD<31> FBB_D<61> C24 D17 FBB_CMD<28>
FBA_CMD31 FBA_CMD<31> 76 77 FBB_D<61> FBB_D61 FBB_CMD28 FBB_CMD<28> 77 02T0A0000034
R28 FBB_D<62> B26 A17 FBB_CMD<29>
FBA_DEBUG0 FBA_CMD32 77 FBB_D<62> FBB_D62 FBB_CMD29 FBB_CMD<29> 77
FBA_DBI<0> P30 AC28 FBB_D<63> C26 B17 FBB_CMD<30>
76 FBA_DBI<0> FBA_DQM0 FBA_DEBUG1 FBA_CMD33 77 FBB_D<63> FBB_D63 FBB_CMD30 FBB_CMD<30> 77+FBVDDQ
FBA_DBI<1> F31 R32 FBA_DEBUG0 R7101 1 @ 2 60.4Ohm 1% E17 FBB_CMD<31>
76 FBA_DBI<1> FBA_DQM1 NC FBA_CMD34 FBB_CMD31 FBB_CMD<31> 77
76 FBA_DBI<2>
FBA_DBI<2> F34
FBA_DQM2 NC FBA_CMD35
AC32 FBA_DEBUG1 R7102 1 @ 2 60.4Ohm 1% FBB_DEBUG0 FBB_CMD32
G14 NVIDIA Design Guide
FBA_DBI<3> M32 FBB_DBI<0> E11 G20
76 FBA_DBI<3>
FBA_DBI<4> AD31 FBA_DQM3 GK107/GK208
GM107/GM108 77 FBB_DBI<0>
FBB_DBI<1> E3 FBB_DQM0 FBB_DEBUG1 FBB_CMD33 C12 FBB_DEBUG0 R7103 1 @ 2 60.4Ohm 1%
DG-07875-001_v09 P.96
76 FBA_DBI<4>
FBA_DBI<5> AL29 FBA_DQM4
GF117 77 FBB_DBI<1>
FBB_DBI<2> A3 FBB_DQM1 NC
NC
FBB_CMD34 C20 FBB_DEBUG1 R7104 1 @ 2 60.4Ohm 1% ----------------------
76 FBA_DBI<5> FBA_DQM5 77 FBB_DBI<2> FBB_DQM2 FBB_CMD35
76 FBA_DBI<6>
FBA_DBI<6> AM32
FBA_DQM6 77 FBB_DBI<3>
FBB_DBI<3> C9
FBB_DQM3 GK107 GM107
FBVDDQ(GPU side) Decoupling
FBA_DBI<7> AF34 FBB_DBI<4> F23 ----------------------
76 FBA_DBI<7> FBA_DQM7 77 FBB_DBI<4> FBB_DQM4
FBB_DBI<5> F27
77 FBB_DBI<5>
FBB_DBI<6> C30 FBB_DQM5 Under GPU
77 FBB_DBI<6>
76 FBA_EDC<0>
FBA_EDC<0> M31 77 FBB_DBI<7> FBB_DBI<7> A24 FBB_DQM6 12 X 1uF (0402)
FBA_DQS_WP0 FBB_DQM7
76 FBA_EDC<1>
FBA_EDC<1> G31
FBA_DQS_WP1 4 X 10uF (0603)
FBA_EDC<2> E33 R30
76 FBA_EDC<2>
FBA_EDC<3> M33 FBA_DQS_WP2 FBA_CLK0 R31 FBA_CLK0 76 FBB_EDC<0> D10
----------------------
76 FBA_EDC<3> FBA_DQS_WP3 FBA_CLK0_N FBA_CLK0# 76 77 FBB_EDC<0> FBB_DQS_WP0 Near GPU
FBA_EDC<4> AE31 AB31 FBB_EDC<1> D5
76 FBA_EDC<4> FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 76 77 FBB_EDC<1> FBB_DQS_WP1
76 FBA_EDC<5>
FBA_EDC<5> AK30
FBA_DQS_WP5 FBA_CLK1_N
AC31
FBA_CLK1# 76 77 FBB_EDC<2>
FBB_EDC<2> C3
FBB_DQS_WP2 FBB_CLK0
D12
FBB_CLK0 77 2 X 10uF (0603)
FBA_EDC<6> AN33 FBB_EDC<3> B9 E12
5 X 22uF (0603)
76 FBA_EDC<6> FBA_DQS_WP6 77 FBB_EDC<3> FBB_DQS_WP3 FBB_CLK0_N FBB_CLK0# 77
FBA_EDC<7> AF33 FBB_EDC<4> E23 E20
76 FBA_EDC<7> FBA_DQS_WP7 77 FBB_EDC<4> FBB_DQS_WP4 FBB_CLK1 FBB_CLK1 77
FBB_EDC<5> E28 F20
77 FBB_EDC<5> FBB_DQS_WP5 FBB_CLK1_N FBB_CLK1# 77+FBVDDQ
FBB_EDC<6> B30
77 FBB_EDC<6> FBB_DQS_WP6
M30 K31 FBB_EDC<7> A23
FBA_DQS_RN0 FBA_WCK01 FBA_WCK01 76 77 FBB_EDC<7> FBB_DQS_WP7
H30 L30
E34 FBA_DQS_RN1
FBA_DQS_RN2
FBA_WCK01_N
FBA_WCK23
H34 FBA_WCK01#
FBA_WCK23
76
76
Place Under GPU
M34 J34 D9 F8
AF30 FBA_DQS_RN3 FBA_WCK23_N AG30 FBA_WCK23# 76 E4 FBB_DQS_RN0 FBB_WCK01 E8 FBB_WCK01 77 0603 size
+1V8_MAIN FBA_DQS_RN4 FBA_WCK45 FBA_WCK45 76 FBB_DQS_RN1 FBB_WCK01_N FBB_WCK01# 77
PLACE AK31 AG31 B2 A5

1
AM34 FBA_DQS_RN5 FBA_WCK45_N AJ34 FBA_WCK45# 76 A9 FBB_DQS_RN2 FBB_WCK23 A6 FBB_WCK23 77 C7116 C7103 C7104 C7120 C7115 C7117
L7103 NEAR GPU FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 76 FBB_DQS_RN3 FBB_WCK23_N FBB_WCK23# 77 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
AF32 AK34 D22 D24
1 2 FBA_DQS_RN7 FBA_WCK67_N FBA_WCK67# 76 FBB_DQS_RN4 FBB_WCK45 FBB_WCK45 77
B D28 D25 B

2
FBA_WCKB01 J30 A30 FBB_DQS_RN5 FBB_WCK45_N B27 FBB_WCK45# 77
30Ohm/100Mhz
1

C7145 C7146 FBA_WCKB01_NNC21 J31 B23 FBB_DQS_RN6 FBB_WCK67 C27 FBB_WCK67 77

tx_l0603_t02_h37 FBA_WCKBxx ARE
22UF/6.3V 4.7UF/6.3V FBA_WCKB23 NC22 J32 FBB_DQS_RN7 FBB_WCK67_N FBB_WCK67# 77
RESERVED,NC ON: +1V8_MAIN
GM108/GM107 FBA_WCKB23_NNC23 J33 PLACE PLACE FBB_WCKB01 D6
2

GK208/GF117 FBA_WCKB45 NC24 AH31 UNDER GPU NEAR GPU FBB_WCKBxx ARE FBB_WCKB01_NNC13 D7

1
FBA_WCKB45_NNC25 AJ31 FBB_WCKB23 NC14 C6 C7101 C7102 C7106 C7107 C7108 C7119
RESERVED,NC ON:
GND GND USED ONLY ON: FBA_WCKB67 NC26 AJ32 FBB_WCKB23_NNC15 B6 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
GM108/GM107
GK107 FBA_WCKB67_NNC27 AJ33 FBB_WCKB45 NC16 F26

2
NC28 USED ONLY ON: FBB_WCKB45_NNC17 E26
PLACE GPCPLL_AVDD H26
GPCPLL_AVDD
U27 FB_PLLAVDD L7102 1 2 30OHM GK107 FBB_WCKB67 NC18 A26
UNDER GPU FB_VREF FBA_PLL_AVDD FBB_WCKB67_NNC19 A27
NC20
1

C7144 C7123 C7122 C7111 C7112 tx_l0402

0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 22UF/6.3V H17 FB_PLLAVDD

1
N16P-GT-A2 FBB_PLL_AVDD C7121 C7133 C7149 C7150
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

02T0A0000034

1
C7114 C7147

2
GND GND GND N16P-GT-A2 0.1UF/16V 0.1UF/16V
GND GND 02T0A0000034

2
NVIDIA Design Guide
DG-07875-001_v09 P.96
---------------------- +FBVDDQ EMI requirement_20171013 GND GND
NVIDIA Design Guide
IFPAB_PLLVDD Decoupling
DG-07875-001_v09 P.96
PLACE UNDER GPU Place Near GPU
IFPCD_PLLVDD
IFPEF_PLLVDD ----------------------
0603 size
GPCPLL_AVDDx FBA_PLL_AVDD Decoupling

1
XS_PLLVDD FBB_PLL_AVDD C7118 C7148
1

C7179 C7180 C7181 C7182 C7183 C7184 C7185 C7186 C7187 C7188
SP_PLLVDD 10UF/6.3V 10UF/6.3V
FB_REFPLL_AVDD 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V
VID_PLLVDD ---------------------- @ @ @ @ @ @ @ @ @ @

2
2

----------------------
Under GPU Under GPU
3 X 0.1uF (0402) per ball IFPAB, CD & EF 3 X 0.1uF (0402) FBA_PLL_AVDD & FBB_PLL_AVDD
2 X 0.1uF (0402) GPCPLL_AVDDx & XS_PLLVDD 1 X 0.1uF (0402) FB_REFPLL_AVDD +FBVDDQ
1 X 0.1uF (0402) SP_PLLVDD ---------------------- GND

1
1 X 0.1uF (0402) VID_PLLVDD Near GPU C7143 C7141 C7132 C7131 C7130
---------------------- +FBVDDQ
Near GPU 1 X 22uF (0805) 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
1 X 30 ohm Bead (0603) max ESR 10 mohm
1

1 X 22uF (0805) C7189 C7190 C7191 C7192 C7193 C7194 C7195 C7196 C7197 C7198
A 1 X 4.7uF (0603) 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V A
1 X 30 ohm Bead (0603) max ESR 10 mohm @ @ @ @ @ @ @ @ @ @
2

2
1

C7151 C7152 C7153 C7154 C7155 C7156 C7157 C7158 C7159

+FBVDDQ
3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V GND +FBVDDQ
N/A N/A N/A N/A N/A N/A N/A N/A N/A
2

C7199 C71100 C71101 C71102 C71103 C71104 C71105 C71106 C71107 C71108
GND
1

1
10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V 10PF/50V C7168 C7169 C7170 C7171 C7172 C7173 C7174
@ @ @ @ @ @ @ @ @ @ 22PF/50V 22PF/50V 22PF/50V 22PF/50V 22PF/50V 22PF/50V 22PF/50V Title : GPU FB
1

C7160 C7161 C7162 C7163 C7164 C7165 C7166 C7167

2

N/A N/A N/A N/A N/A N/A N/A PEGATRON PROPRIETARY AND CONFIDENTIAL
3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V 3.3PF/50V
2

2
N/A N/A N/A N/A N/A N/A N/A N/A BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
2

G15GR PR 3.3pf/22pf change to NA for EMI 0209 Size Project Name FX505GE Rev
GND GND
A2 Thursday, June 28, 2018 71 99 1.0
GND
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

D D

+PEX_VDD +PEX_VDD 57,70,73,96

+1V8_MAIN +1V8_MAIN 48,57,70,71,73,74,75,91

+1V8_MAIN
PLACE UNDER GPU
NVIDIA Design Guide PLACE NEAR GPU
DG-07875-001_v09 P.96
---------------------- L7201
IFPAB_PLLVDD Decoupling 1 2
IFPCD_PLLVDD 30Ohm/100Mhz
IFPEF_PLLVDD tx_l0603_t02_h37

1
C7205 C7210 C7206
GPCPLL_AVDDx 22UF/6.3V 4.7UF/6.3V 0.1UF/16V
U7001P
XS_PLLVDD

2
SP_PLLVDD MLCC 4.7UF/6.3V(0603)X5R 10%
12/18 XTAL_PLL

VID_PLLVDD
---------------------- GND PLL_VDD AD8 XS_PLL_AVDD
PLL_VDD_VID_SP AE8 PLLVDD
Under GPU SP_PLLVDD
3 X 0.1uF (0402) per ball IFPAB, CD & EF GND AD7
VID_PLLVDD NC
2 X 0.1uF (0402) GPCPLL_AVDDx & XS_PLLVDD
1 X 0.1uF (0402) SP_PLLVDD GM107 GM108

1
C7216 C7215 GK107/GK208 GF117
1 X 0.1uF (0402) VID_PLLVDD 0.1UF/16V 0.1UF/16V
----------------------

2
Near GPU XTALSSIN H1
XTAL_SSIN XTAL_OUTBUFF
J4 XTAL_OUTB
1 X 22uF (0805)
C 1 X 4.7uF (0603) GND GND H3 H2 XTALOUT_R
C

1 X 30 ohm Bead (0603) max ESR 10 mohm XTAL_IN XTAL_OUT

1
N16P-GT-A2

1
RN7206B 02T0A0000034 R7203 RN7206A
10KOhm 10KOhm

2
XTALIN 1 3 XTALOUT

X7201

1
27MHZ

4
GND C7208 C7209 GND
10PF/50V 10PF/50V

2
R2.0 modify

GND

CRT
U7001N
4/18 DACA

GM107 GM107/GM108
GM108/GF117 GF117
GK107/GK208 GK107/GK208

B NCAG10 NC GPIO25 R4 NC B
DACA_VDD NC
NC GPIO26 I2CA_SCL R5 NC
TS_VREFAP9 I2CA_SDA
DACA_VREF TSEN_VREF GM108 GM107
GF117
N17P GK107/GK208
NC AP8
DACA_RSET
NC NC DACA_HSYNC
AM9 NC DG-07875-001_v09:
AN9 NC
NC DACA_VSYNC Unused GPIOs may be left floating(NC) on the board design.
AK9 NC
NC DACA_RED
AL10 NC
NC DACA_GREEN
AL9 NC
NC DACA_BLUE

N16P-GT-A2
02T0A0000034

A A

Title : GPU RGB/XTAL

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 72 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+PEX_VDD +PEX_VDD 57,70,96

U7001I
LVDS +1V8_MAIN
+1V8_AON
+1V8_MAIN
+1V8_AON
48,57,70,71,72,74,75,91
57,70,74,75,87,89,91

5/18 IFPAB
ALL PINS NC FOR GF117
ALL PINS NC FOR GM108 EXCEPT GPIO14

DP
LVDS
(GK208/GM107)

DPA_L3
AN6 IFPA_L3_N U7001M
IFPA_TXC_N AM6 IFPA_L3
DPA_L3 IFPA_TXC 9/18 IFPG
AJ8
IFPAB_RSET
+IFP_PLLVDD ALL PINs XVDD FOR GM108/
DPA_L2
AN3 IFPA_L2_N
IFPA_TXD0_N GK107/GK208/GF117
PLACE DPA_L2
AP3 IFPA_L2
+NVVDD
IFPA_TXD0
UNDER GPU
AH8
IFPAB_PLLVDD AA8 XVDD DVI/HDMI DP
DPA_L1 AM5 IFPA_L1_N NC10
D IFPA_TXD1_N AN5 IFPA_L1 D
DPA_L1 IFPA_TXD1

1
AA6 XVDD
C7334 NC11
AK6 IFPA_L0_N +NVVDD
0.1UF/6.3V DPA_L0 IFPA_TXD2_N

2
AL6 IFPA_L0
DPA_L0 IFPA_TXD2
XVDD AA5
TXC
XVDD NC9 AA4
GND AH6 IFPA_AUX_SDA TXC NC8
IFPA_TXD3_N AJ6 IFPA_AUX_SCL
+PEX_VDD IFPA_TXD3 XVDD Y3
TXD0
IFPG XVDD NC7 Y2
TXD0 NC6
PLACE DPB_L3
AH9 IFPB_L3_N
XVDD AA3
IFPB_TXC_N AJ9 IFPB_L3 TXD1
UNDER GPU DPB_L3 IFPB_TXC XVDD NC5 AA2
TXD1 NC4
AG8
IFPA_IOVDD XVDD Y1
AP5 IFPB_L2_N TXD2
DPB_L2 IFPB_TXD4_N XVDD NC3 AA1
AG9 AP6 IFPB_L2 TXD2 NC2
IFPB_IOVDD DPB_L2 IFPB_TXD4
+PEX_VDD
NVIDIA Design Guide
AL7 IFPB_L1_N
DG-07875-001_v09 P.96 DPB_L1 IFPB_TXD5_N AM7 IFPB_L1
AA7
NC1
XVDD

1
DPB_L1
---------------------- IFPB_TXD5
C7301
IFPAB_PLLVDD Decoupling 0.1UF/6.3V AM8 IFPB_L0_N
IFPCD_PLLVDD N16P-GT-A2

2
DPB_L0 IFPB_TXD6_N 02T0A0000034
AN8 IFPB_L0
IFPEF_PLLVDD DPB_L0 IFPB_TXD6
GPCPLL_AVDDx

1
GND
XS_PLLVDD C7302 IFPB_TXD7_N
AL8 IFPA_AUX_SDA_N
AK8 IFPB_AUX_SCL
SP_PLLVDD 0.1UF/6.3V IFPB_TXD7

2
VID_PLLVDD
----------------------
Under GPU GND
3 X 0.1uF (0402) per ball IFPAB, CD & EF N4 GPIO14_HPD_IFPA 1 T7312
2 X 0.1uF (0402) GPCPLL_AVDDx & XS_PLLVDD IFPAB
GPIO14
1 X 0.1uF (0402) SP_PLLVDD PLACE
1 X 0.1uF (0402) VID_PLLVDD UNDER GPU N16P-GT-A2 02T0A0000034 U7001L
---------------------- 8/18 IFPEF
C
Near GPU C
1 X 22uF (0805) ALL PINS NC FOR GF117
ALL PINS NC FOR GM108 EXCEPT GPIO18/19
1 X 4.7uF (0603)
1 X 30 ohm Bead (0603) max ESR 10 mohm
U7001J
HDMI/DP DVI-DL DVI-SL/HDMI DP
6/18 IFPC +IFP_PLLVDD

ALL PINS NC FOR GF117 PLACE I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA_N AB4

ALL PINS NC FOR GM108 EXCEPT GPIO15 UNDER GPU I2CY_SCL I2CY_SCL AB3
AB8 IFPE_AUX_I2CY_SCL
R7307 1 1% 2 1KOhm IFPCD_RSET AF8 IFPEF_PLLVDD
+IFP_PLLVDD GND IFPC_RSET
+1V8_MAIN DVI/HDMI DP AC5
IFPCD_RSET TXC TXC IFPE_L3_N

1
AD6 AC4
GM107 IFPEF_RSET TXC TXC IFPE_L3
C7335
L7303 1 2 +IFP_PLLVDD 1 2 +IFPCD_PLLVDD AF7 IFPCD_PLLVDD I2CW_SDA AG2 0.1UF/6.3V NC FOR GK208 AC3
IFPC_PLLVDD IFPC_AUX_I2CW_SDA_N HDMI_SDA_GPU 48 TXD0 TXD0 IFPE_L2_N

2
SP7325 I2CW_SCL AG3 AC2
30Ohm/100Mhz IFPC_AUX_I2CW_SCL HDMI_SCL_GPU 48 TXD0 TXD0 IFPE_L2
1

Irat=1A AC1
1

C7331 AG4
TXD1 TXD1 IFPE_L1_N AD1
C7317 GND
tx_l0603_t02_h37 22UF/6.3V
0.1UF/6.3V
TXC
TXC
IFPC_L3_N
IFPC_L3
AG5
HDMI_CLKN
HDMI_CLKP
48
48 IFPE TXD1 TXD1 IFPE_L1
2

AD3
2

AH4 TXD2 TXD2 IFPE_L0_N AD2

TXD0 IFPC_L2_N HDMI_TXN0 48 IFPE_L0
IFPC TXD0 IFPC_L2
AH3
HDMI_TXP0 48
TXD2 TXD2

GND NC FOR GK208

GND PLACE AJ2
TXD1 IFPC_L1_N HDMI_TXN1 48
PLACE UNDER GPU TXD1 AJ3
HDMI_TXP1 48
IFPC_L1
NEAR GPU
AJ1 HPD_E HPD_E R1
TXD2 IFPC_L0_N HDMI_TXN2 48 GPIO18
+PEX_VDD AK1
PLACE PLACE TXD2 IFPC_L0 HDMI_TXP2 48
NEAR GPU UNDER GPU +PEX_VDD

AF6 IFP_IOVDD
IFPC_IOVDD GPIO15
P2 PLACE
UNDER GPU
AC7
N16P-GT-A2 IFPE_IOVDD
1

AF2
I2CZ_SDA IFPF_AUX_I2CZ_SDA_N
C7318 C7332 C7333 C7319 02T0A0000034 I2CZ_SCL AF3
4.7UF/6.3V 0.1UF/6.3V AC8 IFPF_AUX_I2CZ_SCL
1uF/6.3V 1uF/6.3V IFPF_IOVDD
2

+PEX_VDD
1AT100000112 1AT100000112
B
NC FOR GK208
TXC AF1 B
@ IFPF_L3_N AG1

1
TXC IFPF_L3
GND GND GND C7304
GND
eDP 0.1UF/6.3V TXD3 TXD0 IFPF_L2_N
AD5
AD4

2
U7001K TXD3 TXD0 IFPF_L2
7/18 IFPD TXD4 TXD1 AF5
ALL PINS NC FOR GF117 GND
IFPF TXD4 TXD1
IFPF_L1_N
IFPF_L1
AF4

1
ALL PINS NC FOR GM108 EXCEPT GPIO17
AE4
C7305 TXD5 TXD2 IFPF_L0_N
NVIDIA Design Guide 0.1UF/6.3V TXD5 TXD2 IFPF_L0
AE3
NC AN2
DG-07875-001_v09 P.96

2
NC12 NC
DVI/HDMI DP
---------------------- GK107/GK208 GM107
NC FOR GK208

IFP_IOVDD(6 balls) Decoupling

AG7 NC AK2 GND P3
---------------------- IFPD_PLLVDD I2CX_SDA IFPD_AUX_I2CX_SDA_N AK3
HPD_F
GPIO19
Under GPU I2CX_SCL IFPD_AUX_I2CX_SCL
6 X 0.1uF (0402) PLACE
N16P-GT-A2
---------------------- TXC IFPD_L3_N
AK5 UNDER GPU
AK4 02T0A0000034
Near GPU TXC IFPD_L3
3 X 4.7uF (0603) AL4
TXD0 IFPD_L2_N
3 X 1uF (0402) IFPD TXD0 IFPD_L2
AL3

TXD1 AM4
IFPD_L1_N AM3
TXD1 IFPD_L1
+PEX_VDD AM2
TXD2 IFPD_L0_N AM1
TXD2 IFPD_L0
PLACE
UNDER GPU
AG6 IFP_IOVDD M6
IFPD_IOVDD GPIO17

N16P-GT-A2
02T0A0000034
1

C7303
A 0.1UF/6.3V A
2

GND

Title : GPU HDMI/DP/LVDS

PEGATRON PROPRIETARY AND CONFIDENTIAL
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 73 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

U7001Q +1V8_AON N17P VRAM strap +3VSUS

+3VS_VGA
+3VSUS 7,21,22,23,24,26,28,30,31,33,36,44,48,53,68,81,88,92,96
+3VS_VGA 57,87,91
+3VS +3VS 7,16,21,22,23,24,28,30,31,32,33,36,44,45,48,50,51,57,87,88,89,91,92,96
13/18 MISC2 H6 ROM_CS# 1 T7412
ROM_CS_N
+PEX_VDD +PEX_VDD 57,70,73,96
H5 ROM_SI
ROM_SI +1V8_MAIN +1V8_MAIN 48,57,70,71,72,73,75,91

2
H7 ROM_SO
ROM_SO +1V8_AON +1V8_AON 57,70,75,87,89,91
STRAP0 J2 H4 ROM_SCLK R7414 R7416 R7407 R7409 R7411 R7418
STRAP1 J7 STRAP0 ROM_SCLK 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm
STRAP1 NC
STRAP2 J6 /VRAM /VRAM /VRAM @ @
STRAP2 NC
STRAP3 J5
STRAP3 NC GC6 2.1

1
STRAP4 J3 NC +1V8_AON +1V8_AON
STRAP4
GK107/GK208 GM107
GF117 GM108 STRAP0
STRAP1

2
STRAP2
GPIO24_HPD_IFPF L2 R74120 U7402
BUFRST STRAP3
BUFRST_N @ 10KOHM 5 A 1
STRAP4 VCC DGPU_HOLD_RST# 21
D STRAP5 D
B 2

1
STRAP5 J1 STRAP5 BUF_PLT_RST# 24,30,31,32,33,51,53

1
MULTI_STRAP_REF0_GND R7484 4 3

2
10KOhm 70 SYS_PEX_RST_MON# GND
Y
@ R7415 R7417 R7408 R7410 R7412 R7419

2
N16P-GT-A2 SN74LVC1G08DCKR
100KOhm 100KOhm 100KOhm 100KOhm 100KOhm 100KOhm
R74121

2
02T0A0000034 /VRAM /VRAM /VRAM @
10KOHM

1
GND
+1V8_AON

1
GND
GND +1V8_AON +1V8_AON
2

2
R7401 R7402 R7403
100KOhm 100KOhm 100KOhm R74133
PEX_RST# 70

1
10KOHM

1
@

G
1

1
C7413 2 1 0.1UF/16V

1
ROM_SI +1V8_AON +3VS
ROM_SO GND
ROM_SCLK GPU_EVENT# 2 3

2 S

3D
GPU_EVENT#_PCH 21

2
2

1
R74100 R7477 Q7408

1
R7404 R7427 R7406 100KOhm 100KOhm RUM003N02GT2L

G
100KOhm 100KOhm 100KOhm @ Rdson=1.4Ohm/Vgs(th)=1V
@ @ @

1
1

GPU_OVERT#_Q 2 3

2 S

3D
GPU_OVERT# 23,32,87,96
Q7405
RUM003N02GT2L
GND Rdson=1.4Ohm/Vgs(th)=1V @

+1V8_AON

+1V8_AON +1V8_AON

C C

2
GPIO12_AC_BATT#

1
R74106 88 GPIO12_AC_BATT# R74119

1
10KOhm 10KOHM

3
D3

1
@
GPIO9_THERM_ALERT 2 3

2 S

3D
GPU_ALERT# 23
1 1
Q7419
G
RUM003N02GT2L
Rdson=1.4Ohm/Vgs(th)=1V
Q7404

3
S 2 3
RUM003N02GT2L D
Rdson=1.4Ohm/Vgs(th)=1V

2
11 R7455 1 2 0Ohm
THRO_GPU# 24
G
S 2
Q7424

2
2N7002
R7456 1 @ 2 0Ohm
@ AC_IN_OC 24,30,88
C7411 1 2 10PF/50V +3VS_VGA

@ GND
C7412 1 2 10PF/50V +3VSUS

+3VA

2
RN7401B 4 3 +3V3_SMB_VGA SP7401 1 2 0Ohm
RN7401A 2 2.2KOhm 1 R7498
2.2KOhm
SHORT PIN 0402 10KOHM

2
Q7477A R7497

1
UM6K1N 10KOHM 1V8_MAIN_PWRGD
U7001R
2

3
11/18 MISC1 3
D

1
T4 SMB_CLK_VGA 1 6
I2CS_SCL T3 4 3 SMB1_CLK 28,30
GM107/GM108 GK107 SMB_DAT_VGA
I2CS_SDA SMB1_DAT 28,30 11
GK208 GF117 Q7414
GPU_OVERT#_Q M1 R2 R7485 1 2 1.8KOHM G 2N7002
GPIO8
OVERT I2CC_SCL R3 R7486 1 2 1.8KOHM UM6K1N 2 S
I2CC_SDA
5

2
Q7477B

3
B
NC R7 R7453 1 2 1.8KOHM B
K4 I2CB_SCL R6 R7454 1 2 1.8KOHM GPU_GPIO0 R7458 1 2 0Ohm NVVDD_VID +1V8_MAIN 3D
THERMDN NC I2CB_SDA NVVDD_VID 87
+3V3_SMB_VGA S1T020100001
GM107/GM108
K3 GF117
GK107/GK208 GND
THERMDP GPU_GPIO1 R7433 1 2 0Ohm GC6_FB_EN_R R7496 1 2 0Ohm 1 1
GND S1T020100001 G Q7413
T7408 1 AM10 RUM003N02GT2L
T7409 1 AP11 JTAG_TCK GPU_GPIO2 R7443 1 2 0Ohm GPU_EVENT# Rdson=1.4Ohm/Vgs(th)=1V
JTAG_TMS 2 S

1
T7410 1 AM11 S1T020100001 C7402
T7411 1 AP12 JTAG_TDI 0.01UF/16V
JTAG_TDO

2
AN11 P6 GPU_GPIO0 GPU_GPIO3 1 T7414 @
JTAG_TRST_N GPIO0

2
M3 GPU_GPIO1
GPIO1 L6 GPU_GPIO2
GPIO2
2

P5 GPU_GPIO3 GPU_GPIO4 R7466 1 2 0Ohm VGA_PWRON_R

R7440 GPIO3 P7 GPU_GPIO4 S1T020100001 GND GND
10KOHM GPIO4 L7
GPIO5 M7 NVVDD_PSI
GPIO6 NVVDD_PSI 87
N8
GK107/GK208/GF117 GPIO7
1

NC
L3 GPU_GPIO8
GPIO8 M2 SAME GPIO9_THERM_ALERT GPU_GPIO8 R7471 1 2 0Ohm MEM_VDD_CTL D7403
GPIO9 L1 MEM_VDD_CTL 89 1
SAME GPIO10_MEM_VREF_CTL S1T020100001 21 VGA_PWR_EN
VGA_PWR_EN
GPIO10 M5 GPIO10_MEM_VREF_CTL 76,77 3
GND VGA_AON_PWR_EN 57,91
GPIO11 N3 SAME GPIO12_AC_BATT# 1V8_MAIN_PWRGD 2
GPIO12 M4
GPIO13 R8 GPU_GPIO16 1 T7413
GPIO16 NC GPIO16 0.8V/0.2mA
GPIO16 P4 +3VSUS
GPIO20 NC NC GPIO20 +3VSUS
GPIO8 P1 +3VSUS
NC NC GPIO21 U7401
GK208 GF117 GK107
GM107
+3VA 1V8_MAIN_EN 1 A 5
GM108 VCC
2

2
+3VA
VGA_PWR_EN 2 B
R74144 R74102
N16P-GT-A2 10KOHM 10KOHM 3 4
2

2
02T0A0000034 GND VGA_PWRON 57,91
Y
R7461 R74103
Vcc=2~5.5
1

1
10KOHM 1V8_MAIN_EN 10KOHM GC6_FB_EN 21,89
GND
3

3
3 3
D D
1

1
11 Q7423 11 Q7422 +1V8_AON
G 2N7002 G 2N7002
A 2 S 2 S A
2

2
MEM_VDD_CTL_R MEM_VDD_CTL R7441 1 @ 2 10KOhm
3

3D 3D VGA_PWRON_R VGA_PWRON_R R7478 1 2 10KOhm

GPIO12_AC_BATT# GPIO12_AC_BATT# R7479 1 2 100KOhm
GND GND VGA_PSI#_R 1 2 10KOhm
NVVDD_PSI R7480
VGA_PWRON_R 1 1 GC6_FB_EN_R 1 1
G Q7403 G Q7409
RUM003N02GT2L RUM003N02GT2L
Rdson=1.4Ohm/Vgs(th)=1V Rdson=1.4Ohm/Vgs(th)=1V 1 2 10KOhm
2 S 2 S MEM_VDD_CTL R7446
GPIO10_MEM_VREF_CTL R7448 1 2 100KOhm
GC6_FB_EN_R R7447 1 2 10KOhm
Title : GPU GPIO/STRAP
2

PEGATRON PROPRIETARY AND CONFIDENTIAL

BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
GND GND Size Project Name Rev
FX505GE
A2 Thursday, June 28, 2018 74 99 1.0
GND
Date: Sheet of
5 4 3 2 1
 5 4
Vinafix.com 3 2 1

+NVVDD Place Under GPU

+NVVDD
+PEX_VDD
+NVVDD
+PEX_VDD
57,73,87
57,70,73,96
0201 1uF X16
+1V8_MAIN +1V8_MAIN 48,57,70,71,72,73,74,91
+1V8_AON +1V8_AON 57,70,74,87,89,91

1
C7501 C7502 C7503 C7504 C7550 C7551 C7580 C7582 C7587 C7588 C7589 C7590 C7591 C7592 C7593 C7594
U7001F
U7001E +NVVDD 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V

2
16/18 GND_1/2
17/18 GND_2/2 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112
AM25 A2 U7001G +NVVDDS
GND_071 GND_001 N19 T28 @ @ @ @ @ @ @ @
AN1 A33 GND_141 GND_170
14/18 NVVDD
GND_072 GND_002 N2 T32
AN10 AA13 GND_142 GND_171 AA12 VDDS
GND_073 GND_003 N21 T5 VDD_01 GND
AN13 AA15 GND_143 GND_172 AA14
GND_074 GND_004 N23 T7 VDD_02
AN16 AA17 AA16 VDDS
AN19 GND_075 GND_005 AA18
N28
N30
GND_144
GND_145
GND_173
GND_174
U12
U14
VDD_03 AA19 VDDS 0402 4.7uF X9
AN22 GND_076 GND_006 AA20 VDD_04 AA21
N32 GND_146 GND_175 U16
AN25 GND_077 GND_007 AA22 VDD_05 AA23 VDDS
GND_147 GND_176

1
D GND_078 GND_008 N33 U19 VDD_06 C7567 C7558 C7556 C7568 C7569 C7574 C7581 C7509 C7513 D
AN30 AB12 GND_148 GND_177 AB13
GND_079 GND_009 N5 U21 VDD_07 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V
AN34 AB14 GND_149 GND_178 AB15
GND_080 GND_010 N7 U23 VDD_08
AN4 AB16 GND_150 GND_179 AB17

2
GND_081 GND_011 P13 V12 VDD_09
AN7 AB19 GND_151 GND_180 AB18
GND_082 GND_012 P15 V14 VDD_10
AP2 AB2 GND_152 GND_181 AB20
GND_083 GND_013 P17 V16 VDD_11
AP33 AB21 GND_153 GND_182 AB22
P18 V19 GND
B1
B10
GND_084
GND_085
GND_014
GND_015
AB23
AB28
P20 GND_154 GND_183 V21
VDD_12
VDD_13
AC12
AC14 VDDS
0603 4.7uF X7
P22 GND_155 GND_184 V23
B22 GND_086 GND_016 AB30 VDD_14 AC16
R12 GND_156 GND_185 W13
B25 GND_087 GND_017 AB32 VDD_15 AC19
GND_157 GND_186

1
GND_088 GND_018 R14 W15 VDD_16 C7514 C7515 C7522 C7557 C7579 C7512 C7578
B28 AB5 GND_158 GND_187 AC21 VDDS
GND_089 GND_019 R16 W17 VDD_17 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V
B31 AB7 GND_159 GND_188 AC23
GND_090 GND_020 R19 W18 VDD_18
B34 AC13 GND_160 GND_189 M12

2
GND_091 GND_021 R21 W20 VDD_19
B4 AC15 GND_161 GND_190 M14 VDDS
GND_092 GND_022 R23 W22 VDD_20
B7 AC17 GND_162 GND_191 M16
GND_093 GND_023 T13 W28 VDD_21
C10 AC18 GND_163 GND_192 M19
GND_094 GND_024 T15 Y12 VDD_22 GND
C13 AC20 GND_164 GND_193 M21 VDDS
GND_095 GND_025 T17 Y14 VDD_23
C19 AC22 GND_165 GND_194 M23
C22 GND_096
GND_097
GND_026
GND_027
AE2
T18
T2 GND_166 GND_195
Y16
Y19
VDD_24
VDD_25
N13 Place Near GPU
C25 AE28
T20 GND_167 GND_196 Y21
N15 NVIDIA Design Guide
C28
C7
GND_098
GND_099
GND_028
GND_029
AE30
AE32
T22 GND_168 GND_197 Y23
VDD_26
VDD_27
N17
N18
0603 10uF X3 0603 4.7uF X6 DG-07875-001_v09 P.96
GND_169 GND_198
D2 GND_100 GND_030 AE33 VDD_28 N20 ----------------------
D31 GND_101 GND_031 AE5 VDD_29 N22 NVVDD Decoupling

1
D33 GND_102 GND_032 AE7 VDD_30 P12 VDDS C7510 C7561 C7577 C7584 C7523 C7554 C7555 C7576 C7583
E10 GND_103 GND_033 AH10 VDD_31 P14 10UF/6.3V 10UF/6.3V 10UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V ----------------------
E22 GND_104 GND_034 AH13 VDD_32 P16 VDDS Under GPU

2
E25 GND_105 GND_035 AH16
AG11 AH11
VDD_33 P19 VDDS 8 X 1uF (0402)
GND_106 GND_036 VDD_34
E5
GND_107 GND_037
AH19 GND_199 GND_200
VDD_35
P21 16 X 4.7uF (0603)
E7 AH2 P23 VDDS
----------------------
F28
F7
GND_108
GND_109
GND_038
GND_039
AH22
AH24
VDD_36
VDD_37
R13
R15
GND 0805 22uF X7 GND
Near GPU
GND_110 GND_040 VDD_38
G10
GND_111 GND_041
AH28
VDD_39
R17 9 X 10uF (0603)
G13 AH29 R18
GND_112 GND_042 VDD_40 7 X 22uF (0805)

1
G16 AH30 R20 C7528 C7560 C7564 C7562 C7563 C7516 C7517
G19 GND_113 GND_043 AH32 VDD_41 R22 22UF/10V 22UF/10V 22UF/10V 22UF/10V 22UF/10V 22UF/10V 22UF/10V 1 X 330uF (Poscap)
GND_114 GND_044 C16 VDD_42
G2 AH33 GND_OPT_1 T12 @ @
GND_115 GND_045 W32 VDD_43

2
G22 AH5 GND_OPT_2 T14 VDDS
G25 GND_116 GND_046 AH7 VDD_44 T16
G28 GND_117 GND_047 AJ7 Optional CMD GNDs (2) VDD_45 T19
G3 GND_118 GND_048 AK10 NC for 4-Lyr cards VDD_46 T21 VDDS
C GND_119 GND_049 VDD_47 GND C
G30 AK7 T23
G32 GND_120 GND_050 AL12 VDD_48 U13
N16P-GT-A2

1
G33
G5
GND_121
GND_122
GND_051
GND_052
AL14
AL15
02T0A0000034
VDD_49
VDD_50
U15
U17 VDDS
+ CE7531 + CE7532 2017.11.01 NV requert merge
G7 GND_123 GND_053 AL17 GND GND VDD_51 U18 330UF/2V 330UF/2V
K2 GND_124 GND_054 AL18 VDD_52 U20

2
K28 GND_125 GND_055 AL2 VDD_53 U22 @
K30 GND_126 GND_056 AL20 VDD_54 V13
K32 GND_127 GND_057 AL21 VDD_55 V15
K33 GND_128 GND_058 AL23 VDD_56 V17 GND +NVVDDS +NVVDD
K5 GND_129 GND_059 AL24 VDD_57 V18 VDDS
K7 GND_130 GND_060 AL26 VDD_58 V20
M13 GND_131 GND_061 AL28 VDD_59 V22
M15 GND_132 GND_062 AL30 VDD_60 W12
M17 GND_133 GND_063 AL32 VDD_61 W14 VDDS
M18 GND_134 GND_064 AL33 VDD_62 W16 +NVVDDS
M20 GND_135 GND_065 AL5 VDD_63 W19
M22 GND_136
GND_137
GND_066
GND_067
AM13 VDD_64
VDD_65
W21 VDDS Place Under GPU
N12 AM16 W23
N14 GND_138 GND_068 AM19 VDD_66 Y13
N16 GND_139 GND_069 AM22 VDD_67 Y15
0603 size 0201 size
GND_140 GND_070 VDD_68 Y17
VDD_69 Y18

1
N16P-GT-A2 VDD_70 Y20 C7524 C7525 C7526 C7527 C7529

1
02T0A0000034 VDD_71 Y22 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
GND GND
VDD_72 C7559 C7552 C7553 C7570 C7586 C7595 C7596 C7597 C7598 C7599

2
1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V

2
N16P-GT-A2 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112 1AT100000112
02T0A0000034 @ @ @ @ @
GND
Place Near GPU GND

0805 size 0603 size

1
C7572 C7575 C7573 C7566 C7565
22UF/10V 22UF/10V 22UF/10V 10UF/6.3V 10UF/6.3V
NVIDIA Design Guide
@ @ DG-07875-001_v09 P.96

2
---------------------- +NVVDDS
B NVVDDS Decoupling B

----------------------
GND Under GPU
0402 size 0201 size 0603 size 5 X 1uF (0402) 0402 size
5 X 10uF (0603)
----------------------

1
C7506 C7571
PLACE UNDER GPU PLACE NEAR GPU
Near GPU 10PF/50V 68PF/50V
@ @
R7501 2 1 0Ohm 2 X 10uF (0603)

2
U7001O +1V8_AON
3 X 22uF (0805)
1

18/18 NC/VDD33 C7585 C7531 C7538 tx_r0603_short

0.1UF/16V 0.1UF/16V C7537 C7539 4.7UF/6.3V
GK208 GM107
GK107 1uF/6.3V 1uF/6.3V +1V8_AON
2

GF117 GM108 GND

AJ28 VDD33 3V3MISC
J8 1V8_AON 1AT100000112 1AT100000112 NVIDIA Design Guide U7001H
C15 NC34 3V3_AON_1 K8 1V8_AON @ DG-07875-001_v09 P.96
VDD33 3V3MISC
NC35 3V3_AON_2 10/18 XVDD
D19 ----------------------

1
D20 NC36 L8 VDD18 GND
D23 NC37 3V3_MAIN_1 M8VDD18 1V8_AON Decoupling CONFIGURABLE R7503
D26 NC38 3V3_MAIN_2 ---------------------- POWER 10KOhm
NC39 FB_VREF CHANNELS
T7500 1 FB_VREF_PROBE H31
NC40
Under GPU U1 NVVDDS_VDD_SENSE 1 T7502
V32 VDDS_SENSE XVDD_01
2 X 0.1uF (0402)

2
NC41 U2 NVVDDS_VSS_SENSE 1 T7503
GNDS_SENSEXVDD_02
AC6 ---------------------- GPIO27 XVDD_03
U3
HDMI_HPD_GPU_IFPC 48
NC33 DO NOT U4
AJ4
NC32 CONNECT
Near GPU XVDD_04 U5
AJ5 1 X 1uF (0402) XVDD_05
NC30 THESE U6 +NVVDD
AL11 XVDD_06
T7501 1 T8 NC29 PINS 1 X 4.7uF (0603) XVDD_07
U7
NC31 GPIO23 U8
R7502 2 1 0Ohm XVDD_08 V1
+1V8_MAIN XVDD_09
1

N16P-GT-A2 C7533 C7532 C7535 tx_r0603_short

0.1UF/16V 0.1UF/16V C7534 C7540 4.7UF/6.3V V2
02T0A0000034 XVDD_10
1uF/6.3V 1uF/6.3V V3
XVDD_11
2

V4
1AT100000112 1AT100000112 XVDD_12 V5
@ XVDD_13
NVIDIA Design Guide XVDD_14
V6
V7
GND DG-07875-001_v09 P.96 XVDD_15 V8
---------------------- XVDD_16 W2
XVDD_17
A 1V8_AON Decoupling XVDD_18
W3 A
----------------------
Under GPU W4
2 X 0.1uF (0402) XVDD_19 W5
XVDD_20
---------------------- XVDD_21
W7
W8
Near GPU XVDD_22 Y4
1 X 1uF (0402) XVDD_23 Y5
XVDD_24
1 X 4.7uF (0603) XVDD_25
Y6
Y7
XVDD_26 Y8
XVDD_27
Title : GPU POWER/GND
N16P-GT-A2 PEGATRON PROPRIETARY AND CONFIDENTIAL
02T0A0000034 BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 75 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+FBVDDQ +FBVDDQ 57,71,77,89

0 U7600A U7600B U7601A U7601B

Normal 2 7 Mirror 5
FBA_D<0>A4 FBA_D<19> U11 FBA_D<63> A4 FBA_D<42> U11
71 FBA_D<0> DQ0/DQ24 71 FBA_D<19> DQ16/DQ8 71 FBA_D<63> DQ0/DQ24 71 FBA_D<42> DQ16/DQ8
FBA_D<1>A2 FBA_D<18> U13 FBA_D<56> A2 FBA_D<41> U13
71 FBA_D<1> DQ1/DQ25 71 FBA_D<18> DQ17/DQ9 71 FBA_D<56> DQ1/DQ25 71 FBA_D<41> DQ17/DQ9
FBA_D<3>B4 FBA_D<23> T11 FBA_D<59> B4 FBA_D<40> T11
71 FBA_D<3> DQ2/DQ26 71 FBA_D<23> DQ18/DQ10 71 FBA_D<59> DQ2/DQ26 71 FBA_D<40> DQ18/DQ10
MEMORY : FBA Partition 31:0 (Normal) FBA_D<4>B2 FBA_D<17> T13 FBA_D<58> B2 FBA_D<44> T13
71 FBA_D<4> DQ3/DQ27 71 FBA_D<17> DQ19/DQ11 71 FBA_D<58> DQ3/DQ27 71 FBA_D<44> DQ19/DQ11
FBA_D<2>E4 FBA_D<22> N11 FBA_D<61> E4 FBA_D<43> N11
MEMORY : FBA Partition 63:32 (Mirror) 71 FBA_D<2>
FBA_D<5>E2 DQ4/DQ28 71 FBA_D<22>
FBA_D<16> N13 DQ20/DQ12 71 FBA_D<61>
FBA_D<57> E2 DQ4/DQ28 71 FBA_D<43>
FBA_D<46> N13 DQ20/DQ12
71 FBA_D<5> DQ5/DQ29 71 FBA_D<16> DQ21/DQ13 71 FBA_D<57> DQ5/DQ29 71 FBA_D<46> DQ21/DQ13
FBA_D<7>F4 FBA_D<20> M11 FBA_D<60> F4 FBA_D<45> M11
71 FBA_D<7> DQ6/DQ30 71 FBA_D<20> DQ22/DQ14 71 FBA_D<60> DQ6/DQ30 71 FBA_D<45> DQ22/DQ14
FBA_D<6>F2 FBA_D<21> M13 FBA_D<62> F2 FBA_D<47> M13
71 FBA_D<6> DQ7/DQ31 71 FBA_D<21> DQ23/DQ15 71 FBA_D<62> DQ7/DQ31 71 FBA_D<47> DQ23/DQ15
D D
C2
FBA_EDC<0> R13 C2 R13
71 FBA_EDC<0> EDC0/EDC3 71 FBA_EDC<2> EDC2/EDC1 71 FBA_EDC<7> EDC0/EDC3 71 FBA_EDC<5> EDC2/EDC1
D2
FBA_DBI<0> P13 D2 P13
71 FBA_DBI<0> DBI0#/DBI3# 71 FBA_DBI<2> DBI2#/DBI1# 71 FBA_DBI<7> DBI0#/DBI3# 71 FBA_DBI<5> DBI2#/DBI1#
A10 FBA_VREFD1
1 T7601 U10 FBA_VREFD2 1 T7602 A10 FBA_VREFD3 1 T7603 U10 FBA_VREFD4
1 T7604
VREFD1 VREFD2 VREFD1 VREFD2
1 3 6 4
A11
FBA_D<14> FBA_D<31> U4 FBA_D<48> A11 FBA_D<37> U4
71 FBA_D<14> DQ8/DQ16 71 FBA_D<31> DQ24/DQ0 71 FBA_D<48> DQ8/DQ16 71 FBA_D<37> DQ24/DQ0
FBA_D<11> A13 FBA_D<25> U2 FBA_D<50> A13 FBA_D<38> U2
71 FBA_D<11> DQ9/DQ17 71 FBA_D<25> DQ25/DQ1 71 FBA_D<50> DQ9/DQ17 71 FBA_D<38> DQ25/DQ1
FBA_D<9> B11 FBA_D<24> T4 FBA_D<51> B11 FBA_D<39> T4
71 FBA_D<9> DQ10/DQ18 71 FBA_D<24> DQ26/DQ2 71 FBA_D<51> DQ10/DQ18 71 FBA_D<39> DQ26/DQ2
FBA_D<15> B13 FBA_D<27> T2 FBA_D<49> B13 FBA_D<36> T2
71 FBA_D<15> DQ11/DQ19 71 FBA_D<27> DQ27/DQ3 71 FBA_D<49> DQ11/DQ19 71 FBA_D<36> DQ27/DQ3
FBA_D<10> E11 FBA_D<29> N4 FBA_D<54> E11 FBA_D<33> N4
71 FBA_D<10> DQ12/DQ20 71 FBA_D<29> DQ28/DQ4 71 FBA_D<54> DQ12/DQ20 71 FBA_D<33> DQ28/DQ4
FBA_D<12> E13 FBA_D<26> N2 FBA_D<52> E13 FBA_D<35> N2
71 FBA_D<12> DQ13/DQ21 71 FBA_D<26> DQ29/DQ5 71 FBA_D<52> DQ13/DQ21 71 FBA_D<35> DQ29/DQ5
FBA_D<8> F11 FBA_D<28> M4 FBA_D<55> F11 FBA_D<34> M4
71 FBA_D<8> DQ14/DQ22 71 FBA_D<28> DQ30/DQ6 71 FBA_D<55> DQ14/DQ22 71 FBA_D<34> DQ30/DQ6
FBA_D<13> F13 FBA_D<30> M2 FBA_D<53> F13 FBA_D<32> M2
71 FBA_D<13> DQ15/DQ23 71 FBA_D<30> DQ31/DQ7 71 FBA_D<53> DQ15/DQ23 71 FBA_D<32> DQ31/DQ7
FBA_EDC<1> C13 FBA_EDC<3> R2 FBA_EDC<6> C13 FBA_EDC<4> R2
71 FBA_EDC<1> EDC1/EDC2 71 FBA_EDC<3> EDC3/EDC0 71 FBA_EDC<6> EDC1/EDC2 71 FBA_EDC<4> EDC3/EDC0
FBA_DBI<1> D13 FBA_DBI<3> P2 FBA_DBI<6> D13 FBA_DBI<4> P2
71 FBA_DBI<1> DBI1#/DBI2# 71 FBA_DBI<3> DBI3#/DBI0# 71 FBA_DBI<6> DBI1#/DBI2# 71 FBA_DBI<4> DBI3#/DBI0#
D4 P4 D4 P4
71 FBA_WCK01 WCK01/WCK23 71 FBA_WCK23 WCK23/WCK01 71 FBA_WCK67 WCK01/WCK23 71 FBA_WCK45 WCK23/WCK01
D5 P5 D5 P5
71 FBA_WCK01# WCK01#/ WCK23# 71 FBA_WCK23# WCK23#/ WCK01# 71 FBA_WCK67# WCK01#/ WCK23# 71 FBA_WCK45# WCK23#/ WCK01#
H5GC4H24MFR-T2C H5GC4H24MFR-T2C H5GC4H24MFR-T2C H5GC4H24MFR-T2C
03T150000077 03T150000077 03T150000077 03T150000077

MF =1 (PU) : Mirror
+FBVDDQ +FBVDDQ MF =0 (PD) : Normal
MF =1 (PU) : Mirror

1
MF =0 (PD) : Normal
+FBVDDQ U7601C R7617 +FBVDDQ
R7615 U7600D 0Ohm U7601D
U7600C 0Ohm G3
71 FBA_CMD<31> RAS#/CAS#
L3
71 FBA_CMD<28> CAS#/RAS#

2
FBA_CMD<12> G3 FBA_MF1 J1 L12 FBA_MF2 J1
71 FBA_CMD<12> RAS#/CAS# @ MF 71 FBA_CMD<16> WE#/CS# MF
FBA_CMD<15> L3 B10 C10 G12 B10 C10
71 FBA_CMD<15> CAS#/RAS# VSS1 VDD1 71 FBA_CMD<21> CS#/WE# VSS1 VDD1

1
FBA_CMD<5> L12 B5 C5 B5 C5
71 FBA_CMD<5> WE#/CS# VSS2 VDD2 VSS2 VDD2
FBA_CMD<0> G12 R7616 D10 D11 J4 D10 D11
71 FBA_CMD<0> CS#/WE# VSS3 VDD3 71 FBA_CMD<24> ABI# VSS3 VDD3
0Ohm G10 G1 R7618 G10 G1
FBA_CMD<8> J4 G5 VSS4 VDD4 G11 H4 0Ohm G5 VSS4 VDD4 G11
71 FBA_CMD<8> ABI# VSS5 VDD5 71 FBA_CMD<22> A10/A0/A8/A7 VSS5 VDD5
H1 G14 H5 H1 G14
VSS6 VDD6 71 FBA_CMD<23> A9/A1/A11/A6 VSS6 VDD6

2
C FBA_CMD<10> H4 H14 G4 H11 H14 G4 C
71 FBA_CMD<10> A10/A0/A8/A7 VSS7 VDD7 71 FBA_CMD<19> BA0/A2/BA2/A4 @ VSS7 VDD7
FBA_CMD<11> H5 K1 L1 H10 K1 L1
71 FBA_CMD<11> A9/A1/A11/A6 VSS8 VDD8 71 FBA_CMD<20> BA3/A3/BA1/A5 VSS8 VDD8
FBA_CMD<2> H11 GND K14 L11 K11 GND K14 L11
71 FBA_CMD<2> BA0/A2/BA2/A4 VSS9 VDD9 71 FBA_CMD<18> BA2/A4/BA0/A2 VSS9 VDD9
FBA_CMD<1> H10 L10 L14 K10 L10 L14
71 FBA_CMD<1> BA3/A3/BA1/A5 VSS10 VDD10 71 FBA_CMD<17> BA1/A5/BA3/A3 VSS10 VDD10
FBA_CMD<3> K11 L5 L4 K5 L5 L4
71 FBA_CMD<3> BA2/A4/BA0/A2 VSS11 VDD11 71 FBA_CMD<27> A11/A6/A9/A1 VSS11 VDD11
FBA_CMD<4> K10 P10 P11 K4 P10 P11
71 FBA_CMD<4> BA1/A5/BA3/A3 VSS12 VDD12 71 FBA_CMD<26> A8/A7/A10/A0 VSS12 VDD12
FBA_CMD<7> K5 T10 R10 J5 T10 R10
71 FBA_CMD<7> A11/A6/A9/A1 VSS13 VDD13 71 FBA_CMD<25> A12/RFU/NC VSS13 VDD13
FBA_CMD<6> K4 T5 R5 T5 R5
71 FBA_CMD<6> A8/A7/A10/A0 VSS14 VDD14 VSS14 VDD14
FBA_CMD<9> J5
71 FBA_CMD<9> A12/RFU/NC A1 B1 A1 B1
A12 VSSQ1 VDDQ1 B12 A12 VSSQ1 VDDQ1 B12
A14 VSSQ2 VDDQ2 B14 A14 VSSQ2 VDDQ2 B14
A3 VSSQ3 VDDQ3 B3 FBA_CMD<29> J2 A3 VSSQ3 VDDQ3 B3
VSSQ4 VDDQ4 71 FBA_CMD<29> RESET# VSSQ4 VDDQ4
C1 D1 FBA_CMD<30> J3 C1 D1
VSSQ5 VDDQ5 71 FBA_CMD<30> CKE# VSSQ5 VDDQ5
FBA_CMD<13> J2 C11 D12 C11 D12
71 FBA_CMD<13> RESET# VSSQ6 VDDQ6 VSSQ6 VDDQ6
FBA_CMD<14> J3 C12 D14 J12 C12 D14
71 FBA_CMD<14> CKE# VSSQ7 VDDQ7 71 FBA_CLK1 CK VSSQ7 VDDQ7
C14 D3 J11 C14 D3
VSSQ8 VDDQ8 71 FBA_CLK1# CK# VSSQ8 VDDQ8
J12 C3 E10 C3 E10
71 FBA_CLK0 CK VSSQ9 VDDQ9 VSSQ9 VDDQ9
J11 C4 E5 C4 E5
71 FBA_CLK0# CK# VSSQ10 VDDQ10 VSSQ10 VDDQ10

1
E1 F1 E1 F1
E12 VSSQ11 VDDQ11 F12 R7605 R7604 E12 VSSQ11 VDDQ11 F12
VSSQ12 VDDQ12 VSSQ12 VDDQ12
1

E14 F14 40.2Ohm 40.2Ohm E14 F14

R7603 R7602 E3 VSSQ13 VDDQ13 F3 1% 1% E3 VSSQ13 VDDQ13 F3
40.2Ohm F10 VSSQ14 VDDQ14 G13 F10 VSSQ14 VDDQ14 G13
40.2Ohm VSSQ15 VDDQ15 VSSQ15 VDDQ15

2
1% 1% F5 G2 F5 G2
H13 VSSQ16 VDDQ16 H12 A5 H13 VSSQ16 VDDQ16 H12
VSSQ17 VDDQ17 VPP/NC1 VSSQ17 VDDQ17
2

H2 H3 U5 H2 H3
VSSQ18 VDDQ18 VPP/NC2 VSSQ18 VDDQ18

1
A5 K13 K12 K13 K12
U5 VPP/NC1 K2 VSSQ19 VDDQ19 K3 C7602 K2 VSSQ19 VDDQ19 K3
VPP/NC2 VSSQ20 VDDQ20 VSSQ20 VDDQ20
1

M10 L13 0.01UF/16V M10 L13

VSSQ21 VDDQ21 VSSQ21 VDDQ21

2
+FBVDDQ C7601 M5 L2 M5 L2
N1 VSSQ22 VDDQ22 M1 N1 VSSQ22 VDDQ22 M1
0.01UF/16V VSSQ23 VDDQ23 VSSQ23 VDDQ23
2

N12 M12 GND N12 M12

VSSQ24 VDDQ24 VSSQ24 VDDQ24
1

N14 M14 N14 M14

R7600 N3 VSSQ25 VDDQ25 M3 N3 VSSQ25 VDDQ25 M3
GND VSSQ26 VDDQ26 VSSQ26 VDDQ26
549Ohm R1 N10 R1 N10
R11 VSSQ27 VDDQ27 N5 R11 VSSQ27 VDDQ27 N5
R12 VSSQ28 VDDQ28 P1 J14
FBA_VREF_CA1 R12 VSSQ28 VDDQ28 P1
VSSQ29 VDDQ29 VREFC VSSQ29 VDDQ29
2

R14 P12 R14 P12

FBA_VREF_CA1 J14 R3 VSSQ30 VDDQ30 P14 FBA_ZQ1 J13 R3 VSSQ30 VDDQ30 P14
VREFC R4 VSSQ31 VDDQ31 P3 ZQ R4 VSSQ31 VDDQ31 P3
B FBA_ZQ0 J13 U1 VSSQ32 VDDQ32 T1 J10 U1 VSSQ32 VDDQ32 T1 B
ZQ VSSQ33 VDDQ33 SEN VSSQ33 VDDQ33
1

1
U12 T12 U12 T12
VSSQ34 VDDQ34 VSSQ34 VDDQ34
1

1
R7601 R7609 C7600 J10 U14 T14 C7605 R7613 U14 T14
1.33KOhm 931OHM SEN U3 VSSQ35 VDDQ35 T3 820PF/50V 121OHM H5GC4H24MFR-T2C U3 VSSQ35 VDDQ35 T3
820PF/50V VSSQ36 VDDQ36 VSSQ36 VDDQ36
1

1% 1% 1% 03T150000077
2

2
R7612 H5GC4H24MFR-T2C
2

2
121OHM 03T150000077 H5GC4H24MFR-T2C H5GC4H24MFR-T2C
1% 03T150000077 03T150000077
2

GND GND GND GND GND GND GND

3

GND GND
3D

Q7600
1 1 RUM003N02GT2L
74,77 GPIO10_MEM_VREF_CTL
G Rdson=1.4Ohm/Vgs(th)=1V

2 S 0402 size +FBVDDQ

0402 size
+FBVDDQ
2

1
C7635 C7636 C7637 C7638 C7639 C7640 C7641 C7642 C7643 C7644 C7662
1

1
C7606 C7607 C7608 C7609 C7610 C7611 C7612 C7613 C7614 C7615 C7661
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
2

2
@
GND

GND
GND
+FBVDDQ +FBVDDQ
0603 size 0603 size 0402 size
+FBVDDQ 0603 size +FBVDDQ +FBVDDQ +FBVDDQ
0201 size 0402 size 0603 size

1
C7647 C7648 C7651 C7653 C7654 C7655
1UF/10V 1UF/10V 1UF/10V 10UF/6.3V 10UF/6.3V 22UF/6.3V C7656 C7663
10UF/6.3V 10UF/6.3V
1

1
C7616 C7617 C7618 C7619 C7620 C7621 C7622 C7626 C7627

2
A @ @ A
1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1uF/6.3V 1uF/6.3V C7624 C7660 22UF/6.3V 22UF/6.3V @ @ @
1AT100000112 1AT100000112 10UF/6.3V 10UF/6.3V
2

2
@ @
@ @
GND GND R2.0 modify
Change to 1AT300000017 EMC
R1.1 modify +FBVDDQ
GND GND GND GND
EMC 0201 size
Change to 1AT300000017

1
C7649 C7650 C7652 C7657 C7658 C7659
1uF/6.3V
1AT100000112
1uF/6.3V
1AT100000112
1uF/6.3V
1AT100000112
1uF/6.3V
1AT100000112
1uF/6.3V
1AT100000112
1uF/6.3V
1AT100000112
Title : GDDR5 1
PEGATRON PROPRIETARY AND CONFIDENTIAL

2
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN

R1.1 modify Size Project Name FX505GE Rev

GND
EMC A2 Thursday, June 28, 2018 76 99 1.0
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+FBVDDQ +FBVDDQ 57,71,76,89

U7700A Normal U7700B U7701A U7701B

0 2 7 Mirror 5
FBB_D<3> A4 FBB_D<16> U11 FBB_D<56> A4 FBB_D<43> U11
71 FBB_D<3> DQ0/DQ24 71 FBB_D<16> DQ16/DQ8 71 FBB_D<56> DQ0/DQ24 71 FBB_D<43> DQ16/DQ8
FBB_D<4> A2 FBB_D<19> U13 FBB_D<59> A2 FBB_D<40> U13
71 FBB_D<4> DQ1/DQ25 71 FBB_D<19> DQ17/DQ9 71 FBB_D<59> DQ1/DQ25 71 FBB_D<40> DQ17/DQ9
FBB_D<1> B4 FBB_D<17> T11 FBB_D<61> B4 FBB_D<41> T11
71 FBB_D<1> DQ2/DQ26 71 FBB_D<17> DQ18/DQ10 71 FBB_D<61> DQ2/DQ26 71 FBB_D<41> DQ18/DQ10
FBB_D<0> B2 FBB_D<18> T13 FBB_D<58> B2 FBB_D<44> T13
MEMORY : FBA Partition 31:0 (Normal) 71 FBB_D<0>
FBB_D<2> E4 DQ3/DQ27 71 FBB_D<18>
FBB_D<22> N11 DQ19/DQ11 71 FBB_D<58>
FBB_D<63> E4 DQ3/DQ27 71 FBB_D<44>
FBB_D<42> N11 DQ19/DQ11
MEMORY : FBA Partition 63:32 (Mirror) 71 FBB_D<2>
FBB_D<6> E2 DQ4/DQ28 71 FBB_D<22>
FBB_D<20> N13 DQ20/DQ12 71 FBB_D<63>
FBB_D<57> E2 DQ4/DQ28 71 FBB_D<42>
FBB_D<45> N13 DQ20/DQ12
71 FBB_D<6> DQ5/DQ29 71 FBB_D<20> DQ21/DQ13 71 FBB_D<57> DQ5/DQ29 71 FBB_D<45> DQ21/DQ13
FBB_D<5> F4 FBB_D<23> M11 FBB_D<62> F4 FBB_D<46> M11
71 FBB_D<5> DQ6/DQ30 71 FBB_D<23> DQ22/DQ14 71 FBB_D<62> DQ6/DQ30 71 FBB_D<46> DQ22/DQ14
FBB_D<7> F2 FBB_D<21> M13 FBB_D<60> F2 FBB_D<47> M13
71 FBB_D<7> DQ7/DQ31 71 FBB_D<21> DQ23/DQ15 71 FBB_D<60> DQ7/DQ31 71 FBB_D<47> DQ23/DQ15

71 FBB_EDC<0> FBB_EDC<0> C2 71 FBB_EDC<2> FBB_EDC<2> R13

71 FBB_EDC<7> FBB_EDC<7> C2 71 FBB_EDC<5> FBB_EDC<5> R13
D FBB_DBI<0> D2 EDC0/EDC3 FBB_DBI<2> P13 EDC2/EDC1 FBB_DBI<7> D2 EDC0/EDC3 FBB_DBI<5> P13 EDC2/EDC1 D
71 FBB_DBI<0> DBI0#/DBI3# 71 FBB_DBI<2> DBI2#/DBI1# 71 FBB_DBI<7> DBI0#/DBI3# 71 FBB_DBI<5> DBI2#/DBI1#
A10 FBB_VREFD1 1 T7701 U10 FBB_VREFD2 1 T7702 A10 FBB_VREFD3
1 T7703 U10 FBB_VREFD4 1 T7704
VREFD1 VREFD2 VREFD1 VREFD2
1 3 6 4
FBB_D<11> A11 FBB_D<30> U4 FBB_D<50> A11 FBB_D<34> U4
71 FBB_D<11> DQ8/DQ16 71 FBB_D<30> DQ24/DQ0 71 FBB_D<50> DQ8/DQ16 71 FBB_D<34> DQ24/DQ0
71 FBB_D<12> FBB_D<12> A13 71 FBB_D<26>
FBB_D<26> U2
71 FBB_D<51>
FBB_D<51> A13
71 FBB_D<33>
FBB_D<33> U2
FBB_D<8> B11 DQ9/DQ17 FBB_D<28> T4 DQ25/DQ1 FBB_D<49> B11 DQ9/DQ17 FBB_D<35> T4 DQ25/DQ1
71 FBB_D<8> DQ10/DQ18 71 FBB_D<28> DQ26/DQ2 71 FBB_D<49> DQ10/DQ18 71 FBB_D<35> DQ26/DQ2
FBB_D<15> B13 FBB_D<25> T2 FBB_D<48> B13 FBB_D<32> T2
71 FBB_D<15> DQ11/DQ19 71 FBB_D<25> DQ27/DQ3 71 FBB_D<48> DQ11/DQ19 71 FBB_D<32> DQ27/DQ3
FBB_D<9> E11 FBB_D<29> N4 FBB_D<53> E11 FBB_D<39> N4
71 FBB_D<9> DQ12/DQ20 71 FBB_D<29> DQ28/DQ4 71 FBB_D<53> DQ12/DQ20 71 FBB_D<39> DQ28/DQ4
71 FBB_D<14> FBB_D<14> E13 71 FBB_D<27> FBB_D<27> N2
71 FBB_D<52> FBB_D<52> E13
71 FBB_D<36> FBB_D<36> N2
FBB_D<10> F11 DQ13/DQ21 FBB_D<31> M4 DQ29/DQ5 FBB_D<54> F11 DQ13/DQ21 FBB_D<38> M4 DQ29/DQ5
71 FBB_D<10> DQ14/DQ22 71 FBB_D<31> DQ30/DQ6 71 FBB_D<54> DQ14/DQ22 71 FBB_D<38> DQ30/DQ6
FBB_D<13> F13 FBB_D<24> M2 FBB_D<55> F13 FBB_D<37> M2
71 FBB_D<13> DQ15/DQ23 71 FBB_D<24> DQ31/DQ7 71 FBB_D<55> DQ15/DQ23 71 FBB_D<37> DQ31/DQ7
FBB_EDC<1>C13 FBB_EDC<3> R2 FBB_EDC<6> C13 FBB_EDC<4>R2
71 FBB_EDC<1> EDC1/EDC2 71 FBB_EDC<3> EDC3/EDC0 71 FBB_EDC<6> EDC1/EDC2 71 FBB_EDC<4> EDC3/EDC0
FBB_DBI<1> D13 FBB_DBI<3> P2 FBB_DBI<6> D13 FBB_DBI<4>P2
71 FBB_DBI<1> DBI1#/DBI2# 71 FBB_DBI<3> DBI3#/DBI0# 71 FBB_DBI<6> DBI1#/DBI2# 71 FBB_DBI<4> DBI3#/DBI0#
D4 P4 D4 P4
71 FBB_WCK01 WCK01/WCK23 71 FBB_WCK23 WCK23/WCK01 71 FBB_WCK67 WCK01/WCK23 71 FBB_WCK45 WCK23/WCK01
D5 P5 D5 P5
71 FBB_WCK01# WCK01#/ WCK23# 71 FBB_WCK23# WCK23#/ WCK01# 71 FBB_WCK67# WCK01#/ WCK23# 71 FBB_WCK45# WCK23#/ WCK01#
H5GC4H24MFR-T2C H5GC4H24MFR-T2C H5GC4H24MFR-T2C H5GC4H24MFR-T2C
03T150000077 03T150000077 03T150000077 03T150000077

MF =1 (PU) : Mirror
+FBVDDQ MF =0 (PD) : Normal
MF =1 (PU) : Mirror
+FBVDDQ MF =0 (PD) : Normal

1
R7717 +FBVDDQ

1
U7701C 0Ohm U7701D
+FBVDDQ
U7700C R7715 U7700D FBB_CMD<31> G3
71 FBB_CMD<31> RAS#/CAS#

2
0Ohm FBB_CMD<28> L3 FBB_MF2 J1
71 FBB_CMD<28> CAS#/RAS# MF
FBB_CMD<12> G3 FBB_CMD<16> L12 B10 C10
71 FBB_CMD<12> RAS#/CAS# 71 FBB_CMD<16> WE#/CS# VSS1 VDD1

1
FBB_CMD<15> L3 FBB_MF1 J1 FBB_CMD<21> G12 B5 C5
71 FBB_CMD<15> CAS#/RAS# @ MF 71 FBB_CMD<21> CS#/WE# VSS2 VDD2
FBB_CMD<5> L12 B10 C10 D10 D11
71 FBB_CMD<5> WE#/CS# VSS1 VDD1 VSS3 VDD3

1
71 FBB_CMD<0> FBB_CMD<0> G12 B5 C5
71 FBB_CMD<24> J4 R7718 G10 G1
CS#/WE# VSS2 VDD2 FBB_CMD<24> ABI# VSS4 VDD4
R7716 D10 D11 0Ohm G5 G11
FBB_CMD<8> J4 G10 VSS3 VDD3 G1 FBB_CMD<22> H4 H1 VSS5 VDD5 G14
71 FBB_CMD<8> ABI# 0Ohm VSS4 VDD4 71 FBB_CMD<22> A10/A0/A8/A7 VSS6 VDD6

2
G5 G11 FBB_CMD<23> H5 H14 G4
VSS5 VDD5 71 FBB_CMD<23> A9/A1/A11/A6 @ VSS7 VDD7
FBB_CMD<10> H4 H1 G14 FBB_CMD<19> H11 K1 L1
C 71 FBB_CMD<10> A10/A0/A8/A7 VSS6 VDD6 71 FBB_CMD<19> BA0/A2/BA2/A4 VSS8 VDD8 C

2
FBB_CMD<11> H5 H14 G4 FBB_CMD<20> H10 GND K14 L11
71 FBB_CMD<11> A9/A1/A11/A6 VSS7 VDD7 71 FBB_CMD<20> BA3/A3/BA1/A5 VSS9 VDD9
71 FBB_CMD<2> FBB_CMD<2> H11 K1 L1
71 FBB_CMD<18> FBB_CMD<18> K11 L10 L14
FBB_CMD<1> H10 BA0/A2/BA2/A4 K14 VSS8 VDD8 L11 FBB_CMD<17> K10 BA2/A4/BA0/A2 L5 VSS10 VDD10 L4
71 FBB_CMD<1> BA3/A3/BA1/A5 GND VSS9 VDD9 71 FBB_CMD<17> BA1/A5/BA3/A3 VSS11 VDD11
FBB_CMD<3> K11 L10 L14 FBB_CMD<27> K5 P10 P11
71 FBB_CMD<3> BA2/A4/BA0/A2 VSS10 VDD10 71 FBB_CMD<27> A11/A6/A9/A1 VSS12 VDD12
FBB_CMD<4> K10 L5 L4 FBB_CMD<26> K4 T10 R10
71 FBB_CMD<4> BA1/A5/BA3/A3 VSS11 VDD11 71 FBB_CMD<26> A8/A7/A10/A0 VSS13 VDD13
FBB_CMD<7> K5 P10 P11 FBB_CMD<25> J5 T5 R5
71 FBB_CMD<7> A11/A6/A9/A1 VSS12 VDD12 71 FBB_CMD<25> A12/RFU/NC VSS14 VDD14
FBB_CMD<6> K4 T10 R10
71 FBB_CMD<6> A8/A7/A10/A0 VSS13 VDD13
FBB_CMD<9> J5 T5 R5 A1 B1
71 FBB_CMD<9> A12/RFU/NC VSS14 VDD14 VSSQ1 VDDQ1
A12 B12
A1 B1 A14 VSSQ2 VDDQ2 B14
A12 VSSQ1 VDDQ1 B12 A3 VSSQ3 VDDQ3 B3
A14 VSSQ2 VDDQ2 B14 FBB_CMD<29> J2 C1 VSSQ4 VDDQ4 D1
VSSQ3 VDDQ3 71 FBB_CMD<29> RESET# VSSQ5 VDDQ5
A3 B3 FBB_CMD<30> J3 C11 D12
VSSQ4 VDDQ4 71 FBB_CMD<30> CKE# VSSQ6 VDDQ6
FBB_CMD<13> J2 C1 D1 C12 D14
71 FBB_CMD<13> RESET# VSSQ5 VDDQ5 VSSQ7 VDDQ7
FBB_CMD<14> J3 C11 D12 J12 C14 D3
71 FBB_CMD<14> CKE# VSSQ6 VDDQ6 71 FBB_CLK1 CK VSSQ8 VDDQ8
C12 D14 J11 C3 E10
VSSQ7 VDDQ7 71 FBB_CLK1# CK# VSSQ9 VDDQ9
J12 C14 D3 C4 E5
71 FBB_CLK0 CK VSSQ8 VDDQ8 VSSQ10 VDDQ10
J11 C3 E10 E1 F1
71 FBB_CLK0# CK# VSSQ9 VDDQ9 VSSQ11 VDDQ11

1
C4 E5 E12 F12
E1 VSSQ10 VDDQ10 F1 R7705 R7704 E14 VSSQ12 VDDQ12 F14
VSSQ11 VDDQ11 VSSQ13 VDDQ13
1

E12 F12 40.2Ohm 40.2Ohm E3 F3

R7703 R7702 E14 VSSQ12 VDDQ12 F14 1% 1% F10 VSSQ14 VDDQ14 G13
40.2Ohm E3 VSSQ13 VDDQ13 F3 F5 VSSQ15 VDDQ15 G2
40.2Ohm VSSQ14 VDDQ14 VSSQ16 VDDQ16

2
1% 1% F10 G13 H13 H12
F5 VSSQ15 VDDQ15 G2 A5 H2 VSSQ17 VDDQ17 H3
VSSQ16 VDDQ16 VPP/NC1 VSSQ18 VDDQ18
2

H13 H12 U5 K13 K12

VSSQ17 VDDQ17 VPP/NC2 VSSQ19 VDDQ19

1
A5 H2 H3 K2 K3
U5 VPP/NC1 K13 VSSQ18 VDDQ18 K12 C7702 M10 VSSQ20 VDDQ20 L13
VPP/NC2 VSSQ19 VDDQ19 VSSQ21 VDDQ21
1

K2 K3 0.01UF/16V M5 L2
VSSQ20 VDDQ20 VSSQ22 VDDQ22

2
+FBVDDQ C7701 M10 L13 N1 M1
M5 VSSQ21 VDDQ21 L2 N12 VSSQ23 VDDQ23 M12
0.01UF/16V VSSQ22 VDDQ22 VSSQ24 VDDQ24
2

N1 M1 GND N14 M14

VSSQ23 VDDQ23 VSSQ25 VDDQ25
1

N12 M12 N3 M3
R7700 N14 VSSQ24 VDDQ24 M14 R1 VSSQ26 VDDQ26 N10
GND VSSQ25 VDDQ25 VSSQ27 VDDQ27
549Ohm N3 M3 R11 N5
R1 VSSQ26 VDDQ26 N10 R12 VSSQ28 VDDQ28 P1
R11 VSSQ27 VDDQ27 N5 J14
FBB_VREF_CA1 R14 VSSQ29 VDDQ29 P12
VSSQ28 VDDQ28 VREFC VSSQ30 VDDQ30
2

R12 P1 R3 P14
FBB_VREF_CA1 J14 R14 VSSQ29 VDDQ29 P12 FBB_ZQ1 J13 R4 VSSQ31 VDDQ31 P3
VREFC R3 VSSQ30 VDDQ30 P14 ZQ U1 VSSQ32 VDDQ32 T1
FBB_ZQ0 J13 R4 VSSQ31 VDDQ31 P3 J10 U12 VSSQ33 VDDQ33 T12
B ZQ VSSQ32 VDDQ32 SEN VSSQ34 VDDQ34 B
1

1
U1 T1 U14 T14
VSSQ33 VDDQ33 VSSQ35 VDDQ35
1

1
R7701 R7709 C7700 J10 U12 T12 R7713 U3 T3
SEN VSSQ34 VDDQ34 VSSQ36 VDDQ36
1

1.33KOhm 931OHM 820PF/50V U14 T14 C7705 121OHM H5GC4H24MFR-T2C

1% 1% R7712 U3 VSSQ35 VDDQ35 T3 820PF/50V 1%
VSSQ36 VDDQ36 03T150000077
2

2
121OHM H5GC4H24MFR-T2C H5GC4H24MFR-T2C
2

2
1% 03T150000077 03T150000077
H5GC4H24MFR-T2C
2

03T150000077 GND
GND GND GND GND GND
GND
GND GND
3

3D

Q7700
1 1 RUM003N02GT2L
74,76 GPIO10_MEM_VREF_CTL
G Rdson=1.4Ohm/Vgs(th)=1V
+FBVDDQ
+FBVDDQ 0402 size
2 S
0402 size
2

1
C7735 C7736 C7737 C7738 C7739 C7740 C7741 C7742 C7743 C7744 C7762
1

C7706 C7707 C7708 C7709 C7710 C7711 C7712 C7713 C7714 C7715 C7760
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
2

GND
GND
GND

+FBVDDQ
+FBVDDQ 0603 size
+FBVDDQ +FBVDDQ +FBVDDQ
0603 size 0402 size 0603 size 0603 size 0402 size

1
C7753 C7716 C7756
1

1
C7746 C7747 C7748 C7749 C7750
1

C7754 C7717 C7718 C7719 C7721 C7725 C7726 C7727 10UF/6.3V 1UF/10V 22UF/6.3V C7755 C7757
C7724 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 10UF/6.3V 22UF/6.3V 22UF/6.3V 10UF/6.3V 10UF/6.3V
10UF/6.3V

2
A @ @ A
2

2
@ @ @
2

@ @ @

R1.1 modify
EMC GND
GND R2.0 modify
GND
Change to 1AT300000017 GND GND Change to 1AT300000017 EMC
+FBVDDQ +FBVDDQ
0201 size 0201 size

Title :
1

1
C7720 C7722 C7745 C7751 GDDR5 2
1uF/6.3V 1uF/6.3V 1uF/6.3V 1uF/6.3V
1AT100000112 1AT100000112 1AT100000112 1AT100000112 PEGATRON PROPRIETARY AND CONFIDENTIAL
R1.1 modify R1.1 modify
2

2
BG1-HW RDC-HW2-HW RD Dept.1 Engineer: XMAN
EMC EMC Size Project Name FX505GE Rev
A2 Thursday, June 28, 2018 77 99 1.0
GND GND
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

VCORE POWER SUPPLY

+1.05V
+5VS
SR8000
1 2
+AC_BAT_SYS
SR8001
1 2
+5VS

1
R80147 R80148 R80149 C80134 U8006A

1
100Ohm 110Ohm 45.3Ohm 0.1UF/25V C80137 1 2 1UF/6.3V R8011 /VCCGT SIC534CD-T1-GE3 C80082 C80139
D 1% 1% 1% C80108 1 2 1UF/6.3V 1Ohm FCCM_B 1 23 1UF/6.3V 1UF/6.3V D
ZCD_EN# CGND

2
@ 1AT200000068 1 2 2 22 PWM1_B N/A N/A
+5VS VCIN PWM

2
C80107
1AT200000068 C80136 1/VCCGT
2 0.1UF/25V 3 21
NC VDRV 1AT200000068 1AT200000068
0.22UF/25V C80052 1/VCCGT
2 0.1UF/25V 4 20
BOOT PGND2

1
1 2 C80144 C80019 1 2 5 19
7 VIDSOUT R8014 2 1% 1 10Ohm 1UF/6.3V 1UF/6.3V R8071 /VCCGT 2.2Ohm 6 PHASE GL 12
N/A N/A 9 VIN VSWH T8054 TPC28T L8003
PGND1

2
7 VIDALERT# R8013 1 2 0.15uH
1AT200000068 1AT200000068
06T52M011N00 PH1_B 1 2
+VCCGT

1
2
7 VIDSCLK 2 1 49.9Ohm

7,88 PROCHOT#
R8012

R8003 1
1%

2 C80104
2.23A /VCCGT
R8073 @ Irat=36A
Rdc=0.7704mohm
C80106 10% R8036 1% 0.1UF/25V
+AC_BAT_SYS U8006B
2.2Ohm
/VCCGT

1
1 2 1 1KOhm 2 ISUMN_C_R 2 1 C80076 C80070 C80079 + CE8014 SIC534CD-T1-GE3

1
1

2
24,44,92 VRM_PWRGD @ C80027 10UF/25V 10UF/25V 10UF/25V 15UF/25V 24 32
PGND2 CGND4

1
R8017 1 2 2200PF/50V 10% 1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @ 25 31

SHORT_PIN

SHORT_PIN
30,93 CPU_VRON_PWR R8035 1 1% 2 619Ohm R80124 R8026 /VCCGT /VCCGT /VCCGT 26 PGND3 CGND3 30 C80046 @

JP8058

JP8057
PGND4 CGND2

2
R80151 1 2 0Ohm 10KOhm 27 29 1500PF/50V 10%
30,93 CPU_VRON +5VS PGND5 CGND1

1
3% R8026 Place close to L8005 28 tx_c0603
PGND6

VR_ENABLE

1
R8032 @ C80105 R8025

VR_READY

1 2

1
VR_HOT#
2 0Ohm 1 0.047UF/16V 11KOhm 06T52M011N00

ALERT#

PROG1
PROG2
PROG3
PROG4
1% /VCCGT

SCLK

1
R8021

VCC
C80103 C80111 R8024

SDA

VIN

2
1 2 0.01UF/50V 10NF/25V 2.61KOhm
88 PSYS_CHG 1%
U8000A

2
C8010 X7R/+/-10% R8062 1% /VCCGT

49
48
47
46
45
44
43
42
41
40
39
38
37

2
330PF/50V ISL95855CHRTZ-T ISUMP_B 1 3.65KOHM
2
1 2 R8028 1 1% 2 110KOHM

GND

VCC
VIN
PROG1
PROG2
PROG3
PROG4
VR_HOT#

SDA
SCLK
VR_READY

ALERT#
VR_ENABLE
C8014 10% /VCCGT R8041 1 1% 2 1.87KOHM R80140 1% /VCCGT
330PF/50V R8046 1 1% 2 1.87KOHM ISEN1_B 1 100KOhm2
1 2 R8087 1 1% 2 121KOhm VCCSA_VSSSENSE 10
36 PROG5 R8085 1 2 100KOhm R8033 1% R8064 1% /VCCGT
PROG5
+VCCGT R8039 Place close to U8004 /VCCGT
R8029 1 2 137KOhm
PSYS
IMON_B
1
2 PSYS
IMON_B
PWM_C
FCCM_C
35
34
PWM_C
FCCM_C
2 100Ohm 1 ISUMN_B_R 1 1Ohm 2

R8039 1 2 100KOHM R8031 1 2 15.8KOhm 1% /VCCGT NTC_B 3 33 ISUMN_C C8003 10%

/VCCGT C8015 1 2 18PF/50V 5% /VCCGT COMP_B 4 NTC_B ISUMN_C 32 ISUMP_C 330PF/50V
FB_B 5 COMP_B ISUMP_C 31 RTN_C 2 1
FB_B RTN_C
1

1 2 R8030 1 1% 2 604Ohm /VCCGT RTN_B 6 30 FB_C

RTN_B FB_C

2
R8019 /VCCGT C8016 2.2NF/50V X5R/+/-10% /VCCGT ISUMP_B 7 29 COMP_C C8001
ISUMN_B 8 ISUMP_B COMP_C 28 IMON_C 0.22UF/16V C8006 10%
100Ohm
1 2 R8023 1 1% 2 2KOhm /VCCGT ISEN1_B 9 ISUMN_B IMON_C 27 PWM3_A @ 330PF/50V
ISEN1_B PWM3_A

1
C8009 390PF/50V X7R/+/-10% /VCCGT ISEN2_B 10 26 PWM2_A 1 1% 2 C8007 1 2 1000PF/50V 2 1
ISEN2_B PWM2_A
2

R8020 /VCCGT FCCM_B 11 25 PWM1_A R8079 499Ohm X7R/+/-10%

1 0Ohm 2 R8015 1 2 2.67KOhm /VCCGT PWM1_B 12 FCCM_B PWM1_A 1 1% 2 R8048 1 2 0Ohm +5VS
PWM1_B

ISUMN_A
ISUMP_A
9 VCCGT_VCCSENSE VCCSA_VCCSENSE 10

PWM2_B

COMP_A

ISEN1_A
ISEN2_A
ISEN3_A
FCCM_A
R8099 2.74KOHM U8004A

IMON_A
NTC_A

RTN_A

1
C8023 1 2 R8037 1 1% 2 2KOhm /VCCGT 1 1% 2 C8008 1 2 470PF/50V R8010 /VCCGT SIC534CD-T1-GE3 C80025 C80138

FB_A
0.22UF/16V @ C8021 680PF/50V X7R/+/-10%
/VCCGT R8047 2KOhm R8075 1Ohm FCCM_B 1 23 1UF/6.3V 1UF/6.3V
2 1 VCCGT_VSSSENSE R8027 1 2 0Ohm /VCCGT 1 1% 2 C8012 1 2 2200PF/50V 100Ohm 1 2 2 ZCD_EN# CGND 22 PWM2_B N/A N/A
+5VS VCIN PWM

2
9 VCCGT_VSSSENSE R8093 2.49KOhm NPO/+/-5% C80135 1/VCCGT
2 0.1UF/25V 3 21
NC VDRV 1AT200000068 1AT200000068

13
14
15
16
17
18
19
20
21
22
23
24
1

C8005 1 2 33PF/50V C80042 1/VCCGT

2 0.1UF/25V 4 20
BOOT PGND2

2
1

1
R8089 C8022 C8013
+5VS +5VS +VCCSA C80145 C80064 1 2 5
PHASE GL
19
1

100Ohm 330PF/50V 330PF/50V R8038 1 1% 2 78.7KOHM 1UF/6.3V 1UF/6.3V R8065 /VCCGT 2.2Ohm 6 12
VIN VSWH
1

1% 10% 10% R8094 C8036 C80110 R8076 @ R80103 @ N/A N/A 9 T8055 TPC28T L8004

ISUMN_A
ISUMP_A
PWM2_B

COMP_A

ISEN1_A
ISEN2_A
ISEN3_A
FCCM_A
IMON_A
PGND1
2

2
/VCCGT /VCCGT /VCCGT 2 0Ohm 1 2 0Ohm 1 C8004 1 2 330PF/50V

NTC_A
6.8KOHM 0.1UF/16V 4700PF/50V

RTN_A
0.15uH
1AT200000068 1AT200000068

FB_A
2

1 2
1% /VCCGT 10% 06T52M011N00 PH2_B
+VCCGT
2

1
1

2
/VCCGT R8044 C8027 R8091 @
2.23A /VCCGT
1 2

11KOhm 0.047UF/16V 2 0Ohm 1 R8072 @ Irat=36A

1

1% /VCCGT U8004B Rdc=0.651mohm

+AC_BAT_SYS 2.2Ohm
2

R8088 Place close to L8003 R8088 /VCCGT R8040 R8045 1% /VCCGT U8000B SIC534CD-T1-GE3 /VCCGT
2

1
10KOhm 0Ohm 316ohm ISL95855CHRTZ-T C80006 C80005 C80091 CE8011 CE8012 24 32
+5VS + + PGND2 CGND4

1
1

2
C8028 3% /VCCGT 1 2 50 @ C80074 10UF/25V 10UF/25V 10UF/25V 15UF/25V 15UF/25V 25 31
0.1UF/25V /VCCGT R8043 1% C8034 10% /VCCGT R8006 @ 51 GND_1 10% 1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @ @ 26 PGND3 CGND3 30

SHORT_PIN

SHORT_PIN
GND_2 PGND4 CGND2
2

2 1 ISUMN_B_R 1 1KOhm 2/VCCGT2 1 2 0Ohm 1 52 /VCCGT /VCCGT /VCCGT 27 29 C80056 @

JP8059

JP8060
GND_3 PGND5 CGND1

2
R8007 @ 53 28 1500PF/50V 10%
/VCCGT /VCCGT C8029 2 1 0.022UF/25VX7R/+/-10% 2200PF/50V 2 0Ohm 1 54 GND_4 PGND6 tx_c0603
R8034 @ GND_5 06T52M011N00
C C

1
/VCCGT C8030 2 1 0.022UF/25VX7R/+/-10% 2 0Ohm 1 /VCCGT

C8035 10% C8011 2 1 0.022UF/25VX7R/+/-10%

330PF/50V
1 2 C8019 2 1 0.022UF/25VX7R/+/-10%
R8063 1% /VCCGT

+VCORE R8084 Place close to U8002 97.6KOHM1%

1 R8092 2 C8018 10% R80102 1%
C8017 2 1 0.022UF/25VX7R/+/-10% C8020
0.1UF/25V
ISUMP_B 1 3.65KOHM
2

R8084 1 2 100KOHM R8081 1 2 15.8KOhm 1% 1 2 1 1KOhm 2 ISUMN_A_R 2 1 R80145 1% /VCCGT

10TS20000004 C8032 1 2 12PF/50VNPO/+/-5% ISEN2_B 1 100KOhm2

1
2200PF/50V
1

1 2 R8096 1 2 2KOhm R8098 1 1% 2 604Ohm R8097 R8082 R8066 1% /VCCGT

R80112 C8031 8200PF/16V X7R/+/-10% 0Ohm 10KOhm ISUMN_B_R 1 1Ohm 2
+5VS

1
100Ohm 3% R8082 Place close to L8000

1
1 2 R8080 1 1% 2 604Ohm R8008 @ C8026 R8083

1 2
C8033 560PF/50V 2 0Ohm 1 0.1UF/16V 11KOhm
2

R8004 1%

1
1 0Ohm 2 R80100 1 1% 2 4.53KOhm C80133 C80109 R80101

2
9 VCORE_VCCSENSE 0.1UF/16V 0.1UF/25V 909Ohm
C8025 1 2 R8049 1 1% 2 1KOhm @ 1%

2
0.22UF/16V @ C8024 680PF/50V X7R/+/-10%

2
2 1 VCORE_VSSSENSE R8005 1 0Ohm 2
9 VCORE_VSSSENSE
+VCORE
1

ICCMAX : 32A
1

R8000 C8002 C8000

100Ohm 330PF/50V
10%
330PF/50V
10% PL2 : 25A
2

2
2

+VCCGT

2
C80001 C80003 C80007 C80011 C80014 C80015 C80016 C80018 C80021 C80028 C80030 C80033 C80034 C80035
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V C80013 C80012 C80062 C80009 C80077 C80102 C80010 C80024 C80098 C80039

2
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068 1AT200000068
1AT200000068 1AT200000068 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

1
C80125 C80124
/VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT

1
2.2NF/50V 10PF/50V
+ CE8004 X5R/+/-10% 5%

2
470UF/2V vx_c0402_small vx_c0402_small
/VCCGT @ @

3
2
1

2
+AC_BAT_SYS C80037 C80043 C80045 C80047 C80048 C80051 C80053 C80054 C80058 C80060 C80017 C80008 C80004 C80022 C80040 C80095 C80023 C80032 C80068 C80057

5.96A 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
ICCMAX : 128A 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

1
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068 /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT
PL2 : 80A
1

C8050 C8051 C8052 CE8002 CE8007

+ +
1

@ C8053 10UF/25V 10UF/25V 10UF/25V 15UF/25V 15UF/25V

1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @ @
10

2
10%
+VCORE
2

9 C80069 C80116 C80117 C80121 C80113

GND3

HG1_A 1 GND2 8 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

UGATE PHASE

1
5

2
BOOT1_A 2 7 FCCM_A R8001
BOOT FCCM /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT
1

1
PWM1_A 3 6 1 2 Q8003 Q8005 C8074 C8075 C8076 C8077 C8037 C8038 C8039 C8040 C8041 C8042 C80123 C80122
+5VS
D

4 PWM VCC 5 LG1_A + CE8000 + CE8001 + CE8015 2.2NF/50V 10PF/50V

AON7534 AON7534 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
GND1 LGATE
1

1
470UF/2V 470UF/2V 470UF/2V X5R/+/-10% 5%
G

G
S

2
1

C8065 C80141 vx_c0402_small vx_c0402_small

U8001 1UF/6.3V 1UF/6.3V @ @
4
3
2
1

4
3
2
1

3
2

3
2

3
2

ISL95808HRZ
2

2
06T52M004N00
1AT200000068 1AT200000068

1
C8078 C8079 C8080 C8081 C8082 C8083 C8084 C8085 C8091 C8092
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V C80061 C80063 C80067 C80065 C80071 C80072 C80080 C80081 C80084 C80085 C80086 C80088
1

1
R8050 C8054 T8050 TPC28T L8000 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
0Ohm 0.22UF/25V 0.15uH /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT /VCCGT
B
1 2 1 2 PH1_A 1 2
+VCORE 1AT200000068
1AT200000068 1AT200000068
1AT200000068 1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068
1AT200000068 B
1
2

2
R8053 @ Irat=36A
2.2Ohm Rdc=0.7704mohm C8093 C8094 C8095 C8096 C8097 C8098 C8099 C80092 C80055 C80075
5

22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

1
5

Q8006
D

Q8004 AON7508
1.542A
D

AON7508
SHORT_PIN

SHORT_PIN
S

C8071 @
+AC_BAT_SYS
G

JP8050

JP8051
S

2
1500PF/50V 10%
4
3
2
1

tx_c0603 C80038 C80026 C80078 C80036 C80002 C80073 C80020 C80050 C80087 C80083
4
3
2
1

22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

1
C8089 C8088 C8087 CE8006 CE8010

10
+ +

1
10UF/25V 10UF/25V 10UF/25V @ C8090 15UF/25V 15UF/25V
R8056 1% 9 MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% 1000PF/50V @ @

GND3
ISUMP_A 1 3.65KOHM
2 HG_C 1 GND2 8 10%
UGATE PHASE

2
BOOT_C 2 7 FCCM_C SR8002
BOOT FCCM

5
R801251% PWM_C 3 6 1 2
ISEN1_A 1 100KOhm2 4 PWM VCC 5 LG_C
+5VS Q8002

D
GND1 LGATE
AON7534

1
R8057 1% C80066 C80140

S
ISUMN_A_R 1 1Ohm 2 U8005
1UF/6.3V 1UF/6.3V
ISL95808HRZ

4
3
2
1
06T52M004N00 1AT200000068 1AT200000068
ICCMAX : 11.1A
R8068
0Ohm
C8086
0.22UF/25V
T8053 TPC28T L8005
0.47uH
PL2 : 10A
1 2 1 2 1 2
PH_C
+VCCSA

1
Irat=18A

2
Rdc=3.8535mohm
R8070 @

5
2.2Ohm

2
Q8001

D
+AC_BAT_SYS AON7508
+AC_BAT_SYS

SHORT_PIN

SHORT_PIN
1
5.96A

JP8056

JP8061
S
5.96A

4
3
2
1
C80041 @

1
1

C8058 C8057 C8056 + CE8003 + CE8008 1500PF/50V 10%

1

1
@ C8059 10UF/25V 10UF/25V 10UF/25V 15UF/25V 15UF/25V C8063 C8062 C8061 + CE8005 + CE8009 tx_c0603
1

1
1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @ @ @ C8064 10UF/25V 10UF/25V 10UF/25V 15UF/25V 15UF/25V
10

10% 1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @ @

10
2

9 10%
GND3

GND2
2

2
HG2_A 1 8 9
GND3

UGATE PHASE GND2

5

BOOT2_A 2 7 FCCM_A R8002 HG3_A 1 8 R8067 1%

BOOT FCCM UGATE PHASE
5

PWM2_A 3 6 1 2 Q8009 Q8007 BOOT3_A 2 7 FCCM_A R8009 ISUMP_C 1 3.65KOHM

2
+5VS
D

4 PWM VCC 5 LG2_A PWM3_A 3 BOOT FCCM 6 1 2 Q8013 Q8011

AON7534 AON7534 +5VS
D

GND1 LGATE 4 PWM VCC 5 LG3_A R8069

G

AON7534 AON7534
GND1 LGATE
S

S
1

C8066 C80142 ISUMN_C_R 1 0Ohm 2

G

G
S

U8002
1

1UF/6.3V 1UF/6.3V C8067 C80143

U8003
4
3
2
1

4
3
2
1

ISL95808HRZ 1uF/6.3V 1uF/6.3V

2

4
3
2
1

4
3
2
1

06T52M004N00 ISL95808HRZ
1AT200000068 1AT200000068
2

06T52M004N00

R8051 C8055 T8051 TPC28T L8001

0Ohm 0.22UF/25V 0.15uH R8052 C8060 T8052 TPC28T L8002
1 2 1 2 1 2
PH2_A
+VCORE 0Ohm 0.22UF/25V 0.15uH
1
2

1 2 1 2 1 2
PH3_A
+VCORE
1
2

R8054 @ Irat=36A
2.2Ohm Rdc=0.7704mohm R8055 @ Irat=36A
A 2.2Ohm Rdc=0.7704mohm A
5

11.1A
1

Q8010 Q8008
D

AON7508 AON7508 Q8014 Q8012

+VCCSA
D

D
SHORT_PIN

SHORT_PIN

C8072 @
G

JP8052

JP8053

AON7508 AON7508
SHORT_PIN

SHORT_PIN
S

2
1500PF/50V 10% C8073 @
G

JP8054

JP8055
S

tx_c0603 1500PF/50V 10% C80044 C80059 C80031 C80049 C80029 C80131 C80129 C80132 C80130 C80128
4
3
2
1

4
3
2
1

tx_c0603 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

4
3
2
1

4
3
2
1

1
C80127 C80126
1

2.2NF/50V 10PF/50V
X5R/+/-10% 5%

2
vx_c0402_smallvx_c0402_small
@ @
R8058 1%

1
ISUMP_A 1 3.65KOHM
2 R8060 1%
ISUMP_A 1 3.65KOHM
2 C80119 C80114 C80118 C80115 C80112 C80089
R801301% 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 1UF/6.3V

2
ISEN2_A 1 100KOhm2 R801351%
ISEN3_A 1 100KOhm2
R8059 1%
ISUMN_A_R 1 1Ohm 2 R8061 1%
ISUMN_A_R 1 1Ohm 2

VCORE
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven kuo
Engineer:
Size
Custom Project Name G15G Rev
A00
Thursday, June 28, 2018 80 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+5VO & +3VO POWER SUPPLY

D D

0A
2.755A T8100
TPC26T
3.451A
+AC_BAT_SYS
+5VA +AC_BAT_SYS

1
C8104 C8105 C8106 @

1
10UF/25V 10UF/25V 0.1UF/25V C8101 C8132 C8102 C8103

1
X5R/+/-10% X5R/+/-10% X5R/+/-10% C8100 1UF/25V X5R/+/-10% 10UF/25V 10UF/25V 0.1UF/25V
vx_c0805_h57_small vx_c0805_h57_small vx_c0402_small 0.1UF/10V vx_c0603_small X5R/+/-10% X5R/+/-10% X5R/+/-10%
2

2
Q8107 vx_c0805_h57_small vx_c0805_h57_small vx_c0402_small
vx_c0402_small

2
PMPB20EN @

7
6
5
2
1
T8106 X5R/+/-20% T8101
D TPC26T 1AT200000125 TPC26T
5V_VO1

5
3 5V_LG 3V_LG Q8101

D
1

1
S G T8102 AON7534
TPC26T

S
4.214A T8103

15
14
13
12
11
8

4
U8100A TPC26T
+5VO

4
3
2
1
+5VSUS
5V_HG
7.9998A 1.7376A

VO1
VREG5
VIN
DRVL1

DRVL2
1
C8133 X7R/+/-10%
T8104 0.1UF/25V tx_c0402 3V_HG
+3VO +3VSUS

1
JP8101 L8100 TPC26T 2 1 C8134 2 1 0.1UF/25V T8105
1MM_OPEN_M1M2 3.3uH SR8100 16 10 SR8101 TPC26T L8101 JP8102
2 1 1 2 2 15V_BST_R 2 1 5V_BST17 DRVH1 DRVH2 9 3V_BST 2 1 3V_BST_R 2 1 2.2UH 1MM_OPEN_M1M2
2 1 VBST1 VBST2
1

5V_LX 18 8 3V_LX 1 2 2 1
SW1 SW2 2 1

2 1
Irat=6.5A R8100 @ VCLK 19 7
VCLK PGOOD
2

1Ohm Q8104 C8107 20 6 C8108 Irat=8A

tx_r0603_h24 PMPB20EN 0.1UF/25V X7R/+/-10% 21 EN1 EN2 0.1UF/25V X7R/+/-10% R8101 @
GND
1

7
6
5
2
1
C8109 tx_c0402 tx_c0402 1Ohm

VREG3
1

1
0.1UF/10V tx_r0603_h24 + CE8101 C8110

VFB1

VFB2
+ + D 1AT200000103 1AT200000103

CS1

CS2
15V_RC

X5R/+/-20% CE8102 CE8100 Q8102 100UF/6.3V 0.1UF/10V

D
2

13V_RC 1

2
vx_c0402_small 100UF/6.3V 100UF/6.3V AON7508 tx_c3528_150x122 X5R/+/-20%

2
@ 3 5V_LG TPS51225CRUKR JP8105 vx_c0402_small

G
SUS_PWRGD 30,92

S
2

1
2
3
4
5

2
1

S G SHORT_PIN @
C8111 @

4
3
2
1
1500PF/50V
2

1
C JP8104 Enable1 Enable2 C8112 @ C

1
SHORT_PIN R8102 R8103 1500PF/50V

2
150KOhm 45.3KOHM
2

TPS51225C JP8103
SHORT_PIN
tx_r0402
1%
tx_r0402
1%

2
EN1 EN2 LDO5 LDO3 10mil R8104 R8105
5V_FB_R 1 2 5V_FB 3V_FB 2 1 3V_FB_R
OFF OFF ON ON 15.4KOHM 1%
vx_r0402_small
6.98KOhm1%
vx_r0402_small
ON OFF ON ON

2
R8106 R8107
OFF ON ON ON 1
C8113 @ 5%
2
10KOhm 1%
vx_r0402_small
10KOhm 1%
vx_r0402_small
C8114 @ 5%
1 2
ON ON ON ON

1
39PF/50V 39PF/50V
vx_c0402_small vx_c0402_small

C8115 @ C8116 @
1 2 1 2

Enable1 0.1UF/10V 0.1UF/10V

X5R/+/-20% X5R/+/-20%
vx_c0402_small vx_c0402_small
Enable2 T8107
VSUS_ON_EN JP8106 TPC26T
2

1MM_OPEN_M1M2
2 1 U8100B
SR8102 +3VA 2 1

1
0.2705A +RTC_POWER
22
GND1
2

23
GND2
1

1
SR8103
G

C8117
1 6 0.1UF/10V TPS51225CRUKR

2
vx_c0402_small
1
S

Q8106A @ X5R/+/-20%
UM6K1NG1DTN R8108 1AT200000125
92 FORCE_OFF_PWR 560KOhm 5%
vx_r0402_small
2
5

B B
EE still need a charge pump circuit for control usage
G

4 3
D8102 +5VO T8108 T8109
T8110 T8111
TPC26T TPC26T
T8112 T8113
TPC26T TPC26T
S

1V/0.2A TPC26T TPC26T

Q8106B @ 1 +5VO_1_2 1 2 +3VSUS
R8110

1
UM6K1NG1DTN +5VO_1_1 3 20mil +5VO

1
1
1 2 VSUS_ON_EN 2 C8119 @
30,82,93 VSUS_ON
0.1UF/25V SR8104 T8114 T8115 T8116 T8117 T8118
tx_c0402 nb_r0603_short_32mil_small TPC26T TPC26T TPC26T TPC26T TPC26T
1KOhm

2
1

C8120 X7R/+/-10%
10T240000003 R8109 0.1UF/25V +5VA +5VSUS

1
1

560KOhm 5% T8119 tx_c0402 T8120

2
@

vx_r0402_small C8118 TPC26T X7R/+/-10% TPC26T

0.1UF/25V T8121 T8122 T8123 T8124 T8125
2

vx_c0402_small VCLK +10VO TPC26T TPC26T TPC26T TPC26T TPC26T

1

X5R/+/-10% 20mil
1
C8121 +3VA +3VO

1
0.1UF/25V
1

C8122 tx_c0402
2

0.1UF/25V X7R/+/-10%
tx_c0402
2

X7R/+/-10% T8126 T8127

1 TPC26T JP8107 TPC26T
+5VO_2_2 3 1MM_OPEN_M1M2
2 +12VO 1 2 +12VSUS
1 2
1 1

1
20mil
D8103
1V/0.2A
C8123
0.1UF/25V
11.47V-14.37V
tx_c0402
2

X7R/+/-10%

A A

SYSTEM
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
Custom Project Name G15G Rev
1.0
Thursday, June 28, 2018 81 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

1.05VO POWER SUPPLY

D D

（0.7A）
）
+AC_BAT_SYS

1
C8201 @ C8209 C8211 @
1500PF/50V 10UF/25V 10UF/25V

2
vx_c0402_small X5R/+/-10% X5R/+/-10%

2
R8203 X7R/+/-10% vx_c0805_h57_small vx_c0805_h57_small
+5VO 73.2KOhm 1%
vx_r0402_h15_small

1
T8205 T8204 T8201 T8202
TPC28T TPC28T TPC28T TPC28T
2

R8206 @

1
100KOhm 1.05VSUS_TON +1.05VSUS +1.05VO
vx_r0402_small U8200

10
7
8
1% APW8715EQBI-TRG
1

6 12

NC
VIN1

LX1
1.05VSUS_FB 5 TON PGND1 13
4 FB PGND2 14
C AGND PGND3 C
1.05VSUS_PFM 3 15
1.05VSUS_EN 2 PFM PGND4 16 JP8203

PGND5
EN LX2
1 17
（4.8132A）
）

BOOT
92 +1.05VSUS_PWRGD 063T/DCR=9mOHM 1MM_OPEN_M1M2

VIN2
POK LX3

VCC

LX4
2 1
SS
T8203 2 1
+1.05VO
2

TPC28TL8201 JP8201
23
22
21
20
19
18
R8205 1UH 3MM_OPEN_5MIL
1.05VSUS_LX 2 1 1 2
1 2 +1.05VSUS

1
Irat=11A
1

1
1.05VSUS_SS C8205 C8204 C8202 C8214 C8203 C8207
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

C8210 vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
0.01UF/16V 10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%
R8208 vx_c0402_small C8216 2 10.1UF/25V
2

2
2.2Ohm 5% R8201
+5VO tx_r0402 2
1.05VSUS_BST 1 2
1.05VSUS_BST_R 1
C8206 0.1UF/25V
2 1 1.05VSUS_VCC JP8202
SHORT_PIN
1

C8208 VRef=0.8V +/-1%

1
2.2uF/6.3V
B tx_c0201_t009_h15 C8212 @ B
2

X5R/+/-20% 100PF/50V 5%
vx_c0402_small
81,84,93 VSUS_ON 1 2 1.05VSUS_EN 2 1
1

1.05VSUS_FB_R
R8207 C8213
47KOhm 0.1UF/16V 10%
vx_r0402_small vx_c0402_small
2

1% R8204
6.2KOHM 1%
Vout=0.8*(1+(R1/R2)) tx_r0402
1.05VSUS_FB 2 1
0.8V +- 1%
2

1.008V:R1=5.10K, R2=19.6K R8202

1
19.6KOhm1% C8215
1.009V:R1=5.23K, R2=20K vx_r0402_small 0.01UF/16VX7R/+/-10%
1.359V:R1=13.7K, R2=19.6K tx_c0402
1

2
1.360V:R1=14K , R2=20K
1.512V:R1=17.8K, R2=20K
1.510V:R1=17.4K, R2=19.6K

A A

+1.0VSUS
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
A00
Thursday, June 28, 2018 82 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

D
DDR & VTT POWER SUPPLY D

0.7A
+VTT_DDR +0.6VO JP8300
SHORT_PIN
1 2
JP8301
1 2
1 2

1MM_OPEN_M1M2

1
C8300 C8301 @ C8302 @
10UF/6.3V 20% 10UF/6.3V 20% 0.1UF/10V
vx_c0603_small vx_c0603_small vx_c0402_small
+AC_BAT_SYS
2

2
X5R/+/-20%

1A
+AC_BAT_SYS
+V_SM_VREF_R

DDR_VTTSNS
1

1
C8303 + CE8300

1
0.033UF/16V C8304 @ C8305 C8306 @ C8307 15UF/25V
SR8300

DDR_VDDQ
vx_c0402_small 1500PF/50V 0.1UF/25V 10UF/25V 10UF/25V @

2
2 1 vx_c0402_small 1AT200000045 X5R/+/-10% X5R/+/-10%
+1.2VO_DDR

2
X7R/+/-10%

1
2
5
6
7
1
U8300A D Q8300
RT8231BGQW C8308 @ PMPB20EN
06T950000033 10UF/6.3V 20%

2
5
4
3
2
1
C vx_c0603_small 3 C
G S

VTTREF

VTTSNS
VTTGND
VDDQ

GND1
GND2
21 DCR=9 mOhm 5.892A 4.592A

8
R8300 DDR_FB 6 20 C8328 1 2 0.1UF/25V
T8300 499KOhm 1% S3 7 FB VTT 19 VLDOIN SR8301 T8301 L8300 +1.2VO_DDR +1P2V
TPC28T vx_r0402_small S5 8 S3 VLDOIN 18 DDR_BST 2 1 DDR_BST_R 1 2 TPC28T 1UH JP8302
+AC_BAT_SYS 1 2 9 S5 BOOT 17 DDR_HG C8309 0.1UF/25V Irat=11A 3MM_OPEN_5MIL
10 TON UGATE 16 DDR_LX 1 2 1 2
92 DDR_PWRGD PGOOD PHASE 1 2
1

1 1
LGATE
1

PGND
C8310

VDD
VID
0.1UF/25V F=500KHz Q8301 R8301 @ JP8305

CS

1
2
5
6
7

1
X7R/+/-10% PMPB20EN 2.2Ohm 5% C8311 C8312 C8313 3MM_OPEN_5MIL
2

@ vx_r0603_h28_small 22UF/6.3V 22UF/6.3V 22UF/6.3V 1 2

D 1 2

12
13
14
15
11
X5R/+/-10% X5R/+/-10% X5R/+/-10%

2
3

1DDR_RC
DDR_VDD
G S
DDR_VID

DDR_CS

DDR_LG

8
C8314 @

1
SR8302 1500PF/50V

1
1 2 10% C8315 C8316 C8317 C8324 C8323 C8325
+5VO

2
vx_c0603_small 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

JP8303 JP8304 X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%

2
C8318 1% SHORT_PIN SHORT_PIN
U8300B
0.1UF/10V tx_r0402
2

2
R8302 25
vx_c0402_small GND6
330KOHM 24
X5R/+/-20% 1 2 GND5 23
GND4 22
1AT200000125
GND3

DDR_VDDQ
RT8231BGQW
SR8303 06T950000033
1 2 1 2
B B
R8303 @
0Ohm DDR_FB_R
vx_r0402_0ohm_small
R1

1
1
D8300 @ C8320 @ R8306
1.2V/0.1A 0.01UF/50V 10% 10KOhm 1%
2 1 tx_c0402 tx_r0402

2
7 DDR_VTT_CNTRL

1
C8321 @
DDR_FB 0.01UF/50V 10%
tx_c0402

2
R8305 R2

1
1 2 1
0Ohm
2 S3
VID Reference Voltage (V)
84,91,93,94 SUSB#_PWR
VDDQ=VREF*(1+(R1/R2)) R8308
12.7KOhm
1

R8304 @ C8319 High 0.675 1%

0Ohm 0.01UF/16V

2
vx_r0402_0ohm_small 10%
2

@ Low 0.75
D8301
1.2V/0.1A T8302 T8303 T8304 T8305 T8306 T8307
2 1 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
1

+1.2V
+1.2VO_DDR
T8308 T8309 T8310 T8311 T8312 T8313
R8307 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
1 2 S5
91,93,95 SUSC#_PWR
1

1
1

620KOhm C8322 +0.6VS

1% 0.022UF/16V
+0.6VO
2

A A

SKU Load current (A) Low-side MOSFET (pcs) Output 22uF/6.3V MLCC (pcs)

UMA 0~5 1 4

DSC 0~8 2 5 Title : +1P2V

PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
Custom Project Name G15G Rev
1.0
Thursday, June 28, 2018 83 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

1.8VSUS POWER SUPPLY

D D

D8401
1.2V/0.1A
@ JP8401
1MM_OPEN_M1M2
1.55A
2 1 2 1
2 1 +3VO

22UF/6.3V

22UF/6.3V
1

1
C8401

C8406

C8408
87,91,92 VSUS_ON 1 2 1.8VSUS_EN 0.1UF/25V
X7R/+/-10%

2
R8402 @

1
0Ohm C8407
0.1UF/16V
vx_c0402_small
+1.8VO

2
10% @

TPC28T L8401
11
10 GND1 1
T8406 1uH
Irat=3A
2.4138A JP8402
1MM_OPEN_M1M2
9 PVIN2 NC1 2 1.8VSUS_LX 1 2 2 1
PVIN1 LX1 2 1 +1.8VSUS

1
8 3
C SVIN LX2 C
7
NC2 PG
4
0.5138A

2
1.8VSUS_FB 6 5 1.8VSUS_EN
FB EN R8403
1

U8401A 2.2Ohm

22UF/6.3V

22UF/6.3V
C8411 @ SY8063DBC @

1
Vref : 0.6V 1.5%

C8403

C8409
0.1UF/16V

11.8VSUS_RC
2

1
C8404 @
10%
0.1UF/16V

2
1

10%
R8401

1
147KOhm
1
tx_r0402 C8405 R8404 C8410
1% 22PF/50V 300KOhm 1500PF/50V
2

vx_c0402_small vx_r0402_small @
2

2
1%

2
JP8403
1.8VO_VGA_FB_R 2 1

+1.8VSUS_PWRGD SHORT_PIN
1

B B
C8402 @
0.1UF/16V
2

10% T8402 T8405 T8407 T8404 T8409 T8410

U8401B TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T
SY8063DBC
12 +1.8VO +1.8VSUS
GND2

1
13
GND3 14
GND4 15 T8403 T8412 T8413 T8411 T8408 T8401
GND5 TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T

1
GND GND

A A

+1V8SUS
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
A00
Thursday, June 28, 2018 84 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

1.5VS POWER SUPPLY

D D

（0.05A）
）
D8500 @ （0.05A）
）
1.2V/0.1A SR8500
2 1 1 2 +1.5VO
+3VO

1
NB_R0402_20MIL_SMALL R8500 C8503 @
88.7KOHM 56PF/50V NPO/+/-5%
1% tx_c0402 1 2
1 2 +1.5VS

2
1AT200000047
R8501 U8500

1
C8502 JP8500 @
82,83,84,91,104 SUSB#_PWR 1 2 3 4 1.5V_FB 4.7UF/6.3V 1MM_OPEN_M1M2
C SHDN# SET C
2 X5R/+/-10%
GND

2
47KOhm
1
IN OUT
5 tx_c0603
（0.05A）
）

2
C8500 R8504
G918T11U

1
0.1UF/16V C8501 100KOhm 1%

2
10% 4.7UF/6.3V 06T280000071 tx_r0402
X5R/+/-10% Vset=0.8V

1
vx_c0402_small tx_c0603

+1.5VO
TDC :0.0726A
T8500 T8502 T8504 T8505 T8503 T8501 PWR Cap. :4.7uF*1pcs
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T Total Cap. :4.7uF

1
+1.5VO +1.5VS

B B

A A

*****
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
1.0
Thursday, June 28, 2018 85 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+NVVDD POWER SUPPLY

D D

+1V8_AON
+AC_BAT_SYS

1 2
R8706
2.2KOhm Phase 1 VGA Input current=8A
@
DGPU_POWER 1 2
+NVVDD_PSI#_R
R8713 @

1
D8702 0Ohm
1.2V/0.1A R8707 C8702 C8703

1
@ 2.2KOhm 10UF/25V 10UF/25V

5
2 1 C8701
91,96 GPU_OVERT# @ MLCC/+/-10% MLCC/+/-10%
Q8701 1500PF/50V

D
2

2
AON7534

S
D8701 @
0.8V/0.2mA

4
3
2
1
1
DGPU_EN_PWR 3
2
+PEX_VDD_PWRGD
92,96,97
T8702
D8700 TPC28T
1.2V/0.1A T8703
TPC28T L8700

1
2 1 R8709 0.22uH
2 1 +NVVDD_BST1_R 1 2 1 2 +NVVDD
+NVVDD

1
2

1
C8707 C8706 0.1UF/25V
R8703 0.022UF/16V 1 2 Irat=45A

1
68KOhm 1 2 C8745 0.1UF/25V Rdc=0.642mohm
EDP=106A

1
R8711 C8744 C8743
R8710 2.2Ohm 2.2NF/50V 10PF/50V
OCP:138A

5
150KOhm X5R/+/-10% 5%

+NVVDD_VRON

2
+NVVDD_BST1
SR8700 Q8703 Q8707 vx_c0402_small vx_c0402_small
TDC=59A

+NVVDD_HG1

D
@

2
1 2 +NVVDD_PSI#_R AON7508 AON7508 @ @
74 NVVDD_PSI
SR8701

G
S

1
1 2
74 NVVDD_VID
+NVVDD_REFADJ C8708 @

4
3
2
1

4
3
2
1
R8741 1500PF/50V
PSI Voltage Setting Operation Phase Number

2
1
2.2Ohm
+AC_BAT_SYS 2 1 C8709 @
1phase with DEM 0V to 0.4V 1500PF/50V
U8701A

2
2

6
5
4
3
2
1
MLCC/+/-10% RT8813DGQW +NVVDD
1phase with CCM 0.8V to 1V

1
C8723 R8712

BOOT1
EN
VID
PSI
REFADJ

UGATE1
0.22uF/25V 768KOhm

2
2 or 3 phase with CCM 1.4V to 5.5V @ 1% C8710 C8711 C8712 C8713 C8714 C8715 C8716 C8717

2
2 1 10T220000291 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

1
C R8724 25 X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% C
GND_1

1
100Ohm +NVVDD_REFIN 7 24 +NVVDD_LX1
REFIN PHASE1
70 NVVDD_VSS_SENSE
+NVVDD_VREF 8
VREF LGATE1
23 +NVVDD_LG1 +AC_BAT_SYS
9
TON PWM3
22 +NVVDD_PWM R8714
+5VS Phase 2
1

C8705 10 21 +NVVDD_VDD1 2.2Ohm 2

1000PF/50V 11 RGND PVCC 20

TALERT#/ISEN2
X7R/+/-10% 12 VSNS LGATE2 19
SS PHASE2
2

TSNS/ISEN3
1AT200000018

VCC/ISEN1
1

2
C8724 C8725 C8726 10% +NVVDD
70 NVVDD_VDD_SENSE

1
UGATE2
PGOOD
R8708 47PF/50V 0.1UF/10V 330PF/50V R8716 R8717 C8727

BOOT2
C8729 C8704

1
+NVVDD 2 1 12KOhm @ 5% X5R/+/-20% @ 0Ohm 18KOhm 2.2UF/6.3V
10UF/25V 10UF/25V

2
R8715 @ 1% Q8702 C8728

D
2

1
100Ohm @ AON7534 1500PF/50V MLCC/+/-10% MLCC/+/-10%
+ + +
2

2
+3VS +3VSO_VGA CE8701 CE8702 CE8703

S
13
14
15
16
17
18
330UF/2V 330UF/2V 330UF/2V
@

4
3
2
1

2
1

R8731
1

R8722 10KOhm +NVVDD_LX3 R8720 1 2 1%

10KOhm 5% 10KOhm
5% @ +NVVDD_LX2 R8719 1 2 1%
10KOhm +NVVDD_HG2
2

+NVVDD_LX1 R8718 1 2 1% T8704

2

10KOhm TPC28T L8701

SR8702 R8721 0.22uH
1 2 +NVVDD_BST2 2 1 +NVVDD_BST2_R 1 2 +NVVDD_LX2 1 2
70,74,92 NVVDD_PWROK

1
C8733 0.1UF/25V
1 2 Irat=45A
C8746 0.1UF/25V Rdc=0.642mohm

1
Q8704 Q8708 R8723

D
AON7508 AON7508 2.2Ohm

G
S

S
U8701B
@

2
RT8813DGQW

4
3
2
1

4
3
2
1
26
GND_2

1
27
GND_3 28 C8735
GND_4 29
GND_5 1500PF/50V

2
30
GND_6 +NVVDD_LG2
@

+AC_BAT_SYS T8705 T8706 T8707

B Phase 3 TPC28T TPC28T TPC28T

B
+NVVDD_VREF

1
R8700 6.19K
1

+NVVDD
R8701 1%
20.5KOhm
R8701 20.5K T8708 T8709 T8710
C8730 C8731

1
C8700 R8702 4.32K 10UF/25V 10UF/25V
TPC28T TPC28T TPC28T

5
C8737
2

MLCC/+/-10% MLCC/+/-10%
1 2 2 1 +NVVDD_REFADJ
R8704 16.5K Q8705 1500PF/50V

1
R8700 1% AON7534
1

4700PF/50V 6.19KOhm
R8705 309 +NVVDD

S
X7R/+/-10% T8700 R8702 R8726 @
TPC28T 4.32KOhm
C8700 4.7nF 2 1 +NVVDD_BST3_R 1 2 T8711 T8712 T8713

4
3
2
1
1% C8736 0.1UF/25V TPC28T TPC28T TPC28T
Vmin 0.3V
+NVVDD_BST3

1 2
1

+NVVDD_REFIN C8747 0.1UF/25V

1
Vmax 1.3V R8725 U8702 T8714
2

R8704
Vboot 0.8V +NVVDD_PWM 1 2 5
RT9610BZQW
4
TPC28T
L8702
PWM BOOT
16.5KOhm
VSTB 6.25mV 6
GND1 UGATE
3 +NVVDD_HG3 0.22uH

1
7 2 +NVVDD_LX3 1 2
8 LGATE PHASE 1
VCC EN
2 1

9 Irat=45A
GND2 Rdc=0.642mohm

1
R8705

5
309Ohm C8741 R8727
10UF/6.3V Q8706 Q8709 2.2Ohm

D
1 2 +5VS AON7508 AON7508
1

G
S

S
@

2
R8728 1 2

4
3
2
1

4
3
2
1

1
C8742
1 2 R8729 1500PF/50V

2
+NVVDD_LG3 @

A A

+NVVDD
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
D Project Name G15G Rev
1.0
Thursday, June 28, 2018 87 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

BATTERY CHARGER
Q8801 Q8802 Q8800
SM4511NHKPC-TRG SM4511NHKPC-TRG SM4511NHKPC-TRG Io=6.2A
D S 1 +A/D_DOCK_IN_Q 1 S D D S 1 +BAT_R
2 2 R8800 1% 2 T8802 T8803
Io =6.154A Io=6.2A

2
3 3 5mOhm 3 C8802 TPC28T TPC28T
60 +A/D_DOCK_IN
Adapter 120w = 6.154A 5
G
4 4
G
5 +A/D_DOCK_IN_Q_Q 1 2 +AC_BAT_SYS 5
G
4 BATG 1500PF/50V
X7R/+/-10% +BAT_CON

1
+A/D_DOCK_IN 07T04M036N00 07T04M036N00 07T04M036N00 1AT200000095

2
Closer to Q8800

2
R8801 C8800 C8801 C8803 C8804 @

2
2.2ohm 5% 470PF/50V X7R/+/-10% 0.01UF/50V JP8801 JP8802 10UF/25V 1500PF/50V T8806 T8807
D X7R/+/-10% SHORT_PIN SHORT_PIN X5R/+/-10% X7R/+/-10% TPC28T TPC28T D

1
1

1
+AC_BAT_SYS

1
ACG

2
C8807
1

C8806
2.2UF/25V 1 2
Closer to Q8800 T8808 T8809
X7R/+/-10% +1.5VO CHG_LDO TPC28T TPC28T
2

2
C8808
R8803 R8804 0.1UF/25V 0.1UF/25V C8809 3.02A

1
2

4.02KOHM 4.02KOHM X5R/+/-10% +A/D_DOCK_IN

X5R/+/-10% 0.1UF/25V
+AC_BAT_SYS

CHG_ACN
1

1
CHG_ACP
2
R8805 1% 1% X5R/+/-10%

1
432KOhm R8806

1
1% D8804 10KOhm
1N4148WS 1% T8811 T8810
ACDET_R 1

D8805 CMSRC TPC28T TPC28T

1
SBR2U30P1-7 ACDRV
2

1
1 2 30 AC_IN_OC ACDET

1
SR8800 C8810 C8811 C8812 @

5
30 AD_IINP
1 2 T8800 1500PF/50V 10UF/25V 10UF/25V C8813 @
2

R8808 2 1 TPC28T Q8803 X7R/+/-10% X5R/+/-10% X5R/+/-10% 0.1UF/25V

2
2

R8807 C8814 12.4KOhm T8814 100PF/50V SR8808 AON7534

68KOhm 0.1UF/10V 1% TPC28T BAT_IINP C8815 1 2 X5R/+/-10%

S
1

1
1% X5R/+/-20% 2 1
1

1
100PF/50V
1

4
3
2
1
C8839
U8800A

7
6
5
4
3
2
1
CHG_PMON BQ24780SRUYR C8816

1
2 1 0.47UF/25V X5R/+/-10%

ACN
IADP
ACDET

CMSRC
ACOK
ACDRV

ACP
100PF/50V
C8840 L8800 R8809 48W

2
CHG_PROCHOT# 8
9 IDCHG GND_2
29
28 CHG_VCC
3.3uH
Irat=6A
10mOhm 1% Io=4.73A
SR8801 10 PMON VCC 27 CHG_LX 1 2 +BAT_R 1 2
30,60 SMB0_DAT
1 2 11 PROCHOT# PHASE 26 CHG_HG +BAT_CON
SDA HIDRV

1
C SR8802 1 2 12 25 CHG_BST CHG_BST_R 2 1 C
30,60 SMB0_CLK SCL BTST
CMPIN 13 24 CHG_LDO R8810 @ 10T520000001
CMPIN REGN

1
CMPOUT 14 23 C8817 2.2Ohm 5% C8818 C8819 C8820 @
CMPOUT LODRV

3
22 0.047UF/16V X7R/+/-10% JP8804 JP8805 10UF/25V 10UF/25V 10UF/25V
GND_1

BATPRES#

5
C8821 SHORT_PIN SHORT_PIN X5R/+/-10% X5R/+/-10% X5R/+/-10%

TB_STAT#

1CHG_RC2

2
BATSRC
BATDRV
D8801 1UF/25V D8800 Q8804

D
1AT200000048
BAT54CW X5R/+/-10% BAT54CW AON7534

SRN
SRP

2
ILIM
1 C8823

2
3 CHG_VCC_R 1 2 CHG_VCC 0.1UF/25V

2
+BAT_CON 2 C8822 @ X5R/+/-10%

15
16
17
18
19
20
21

4
3
2
1
R8812 1500PF/50V
07T030000001 22Ohm 5% 10% CHG_SRP_R 1 2 CHG_SRN_R

2
SR8809 T8801
2 06T370000043

2
1 CHG_ILIM CHG_LG TPC28T C8825

1
AC_IN_OC SR8803 C8826

1
T8813 CHG_BST 2 1 CHG_BST_R 0.1UF/25V 0.1UF/25V

1
TPC28T X5R/+/-10% SR8804 SR8805
1

R8802 nb_r0603_short_32mil_small X5R/+/-10%

1

10OHM 1%
R8815 +BAT_R 2 1 BATSRC

2
100KOhm 1% R8814
4.02KOHM 1%
BATG 2 1 BATDRV CGH_SRP
2

SR8807
1 2 CGH_SRN
BAT_LEARN 30 U8800B
33
GND_6 32
Q8805 GND_5 31 SR8806
GND_4
3

NX7002AK 30 2 1
GND_3
1

R8816 D C8827
2MOhm 5% 0.022UF/16V X7R/+/-10% nb_r0603_short_32mil_small
BQ24780SRUYR
2

ACDRV 2 1 1 G
Adapter OVP 06T370000043

S
B
OVP TYP : 24.32V ; Min : 23.68V ; Max : 24.97V B
2

+A/D_DOCK_IN
2

R8817 +A/D_DOCK_IN +A/D_DOCK_IN

1MOhm 5%
SR8810
CMPOUT

1
1 2
CMPIN

GPIO12_AC_BATT# 74
1

2
R8850 C8844 +3VSUS
1

1MOHM 0.1UF/25V

3
R8845 R8848 Q8809 1% X5R/+/-10%

1
274KOhm 1MOHM 2N7002DW Q8807B

2
1% 1% 5 UM6K1N
1 S1 D1 6
2

4
2 G1 N R8851
1

4 S2 D2 3 1 2 ACG
1

1
R8846 C8842 R8847 R8849 C8843
30KOHM 0.01UF/16V 0Ohm 330KOHM 0.1UF/25V 5 G2 N R8837 R8838
1% @ @ 1% X5R/+/-10% 100KOhm 1% 100KOhm 1%
2

07T040040N00
2

2
1

C8845 SR8811
0.22uF/25V 1 2
@ PROCHOT# 7,80
2

6
Charger Vendor TI

3
Q8807A
D Q8806 2 UM6K1N
Charger P/N BQ24780SRGRR NX7002AK

1
R8842
CHG_PMON 1 2 CHG_PROCHOT# 1 G
Support Hybrid Boost? YES +3VS
PSYS_CHG +3VA
3 S
A
Adapter capacity 150W R=1.2V/(1uA/W*Watts) C Q8808 A

2
2

R8841 1 @ 2 1KOhm 1 B LMBT3904LT1G

2

R8811 07T020000001
E
ADP 120W R8843 560KOhm 5%
2
@
10KOhm
Active/Release Point Active - 144.45W +3VSUS
1

(Hybrid Boost) Release - 126.9W PSYS 120W CHG_ILIM

U8801
1

Full Scale
2

AC_IN_OC R8839 1 @ 2 0Ohm 1 5

A VCC CHARGER
2

PSYS_CHG 1.2V R8813 @ C8824 @

7 THRO_COUNT
R8840 1 2 0Ohm 2
B Title :
R8844 150KOhm 0.01UF/50V @ 3 4
1% X7R/+/-10% GND Y PEGATRON PROPRIETARY AND CONFIDENTIAL
0Ohm Pegatron Corp. Steven Kuo
2

R8843 10K SN74LVC1G32DCKR Engineer:

1

Enable condition RSOC>40% Location

1

Disable condition RSOC<30% 06T030000020 Size

Custom Project Name G15G Rev
1.0
R8844 0 @
Thursday, June 28, 2018 88 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+FBVDDQ POWER SUPPLY

D D

+AC_BAT_SYS
+1V8_AON Input current=5A

R8902
12.7KOhm
1% C8901 C8902

1
PSI 2 1 C8900 @ 10UF/25V 10UF/25V
0.1UF/25V MLCC/+/-10% MLCC/+/-10%

1
vx_c0402_small vx_c0805_h57_small
vx_c0805_h57_small

2
R8903 X5R/+/-10%
10KOhm
1 2 1%
DGPU_POWER

2
R8918 @
0Ohm D8900 @
D8901 1.2V/0.1A

5
1 SR8900
GC6_FB_EN 3 1 2 2 1 Q8901

D
92,96,97
2 AON7534
+PEX_VDD_PWRGD

1
C8904

S
0.8V/0.2mA 0.01UF/16V X7R/+/-10%

1
1 2 tx_c0402

4
3
2
1
R8916
100KOhm R8906
75KOhm

2
EDP=20A

VGA_DDR_VRON
VID ：DC High(>=2V) 1.55V ，DC Low(<=1V) 1.35V C8903 T8900 L8900 T8901 T8902 OCP=26A

VGA_DDR_HG1
SR8902 R8908
0.22UF/25V
vx_c0603_small
TPC28T 0.47uH
Irat=18A
TPC28T TPC28T
TDC=11A

VGA_DDR_BST1
1 2 2 1 VGA_DDR_BST1_R 1 2 1 2
C 74 MEM_VDD_CTL +FBVDDQ C

1
Rdc=3.8535mohm

1
1 2
+

1
R8904 @ CE8901 C8911 @ C8916

5
R8913 @ R8907 499K N16X 2.2Ohm 470UF/2V 10UF/6.3V 10PF/50V
0Ohm Q8902 vx_r0603_h28_small X5R/+/-10% 5%

2
PSI Voltage Setting Operation Phase Number AON7508 vx_c0402_small

2
N17P R8907 300K VGA_DDR_RC1 @

S
2 1
1phase with DEM 0V to 0.4V +AC_BAT_SYS

1
C8906 @

4
3
2
1
R8912 1500PF/50V
1phase with CCM 0.7V to 0.88V
1

2.2Ohm C8915 U8900A vx_c0603_small

2
0.22uF/25V RT8816AGQW 10%
2phase with DEM 1.08V to 1.35V
2
@ 21
GND
2

R8907 1 20 VGA_DDR_LX1
2phase with CCM 1.6V to 5.5V 2 1 300KOhm 2 BOOT1 PHASE1 19 VGA_DDR_LG1
T8907 1% 3 UGATE1 LGATE1 18 VGA_DDR_VCCP 2 1 +5VS
TPC28T R8919 PSI 4 EN PVCC 17
PSI LGATE2
1

100Ohm VGA_DDR_VID 5 16 R8905

VGA_DDR_REFADJ 6 VID PHASE2 15 2.2Ohm
REFADJ BOOT2
1

VGA_DDR_REFIN 7 14
REFIN UGATE2
1

C8907 VGA_DDR_VREF 8 13
VREF PGOOD

1
100PF/50V VGA_DDR_TON 9 12 C8910
vx_c0402_small 10 TON OCSET/SS 11 2.2UF/6.3V
RGND VSNS
2

5%
75 FBVDDQ_SENSE

2
1

2
C8909 @

1
C8908 2700PF/50V C8912 @ R8911 1%
0.1UF/10V MLCC/+/-10% 390PF/50V 150KOhm
2

2
1

+FBVDDQ 2 1 X5R/+/-20% vx_c0402_small MLCC/+/-10% tx_r0402

2
R8910 @ vx_c0402_small

1
+3VS R8909 91KOhm 1%
100Ohm vx_r0402_small
2
1

R8917 U8900B
100KOhm RT8816AGQW
5% @ 22
23 GND_1

（1 Phase）
24 GND_2
B GND_3 B
2

SR8908 25
92 VGA_DDR_PG
1 2 VGA_DDR_PG_R 26 GND_4
GND_5
TDC :20A
Frequency :305KHz
PWR Cap. :940uF
EE Cap. :139.5uF
VGA_DDR_VREF
Total Cap. :1079.5uF
ESR :3mOHM
RREF1
1

T8904 T8905 T8906 CRFFADJ R8900

TPC28T TPC28T TPC28T 4.22KOhm RREFADJ
C8923 1%
2700PF/50V R8914
1

X7R/+/-10% 31.6KOHM
1 2 2 1 VGA_DDR_REFADJ

RBOOT
1

R8915
3.3KOHM
1%
RREF1=4.22k
2

RREF2=23.2k VGA_DDR_REFIN
RBOOT=3.3k
RREFADJ=31.6k RREF2 CRFFIN
2

CREFIN=1.8nF
2

R8901 C8924
CREFADJ=2.7nF 22.1KOhm 1800PF/50V
1% X7R/+/-10%
1

1.35V to 1.5V
1

R8900 = 4.22K
R8901 = 22.1K
A A

1.35V to 1.55V
R8900 = 5.36K
R8901 = 27.4K

+FBVDDQ
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
Custom Project Name
G15G Rev
1.0
Thursday, June 28, 2018 89 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

SUSB#_PWR POWER SUSC#_PWR POWER

+5VO +3VO
SUSB#_PWR 1 2
U9101 T9104

1
R9104
47KOhm
C9111
0.033UF/16V
SN10548
15
TPC26T
3.2022A
vx_r0402_small vx_c0402_small 1 GND2 14
VIN1_1 VOUT1_2 +3VS

1 1
1% 10% 2 13
3 VIN1_2 VOUT1_1 12 C9112
4 ON1 CT1 11 0.1UF/10V
VBIAS GND1
SUSC#_PWR 1 2 5
ON2 CT2
10 X5R/+/-20%
0A

2
6 9
VIN2_1 VOUT2_2

1
R9105 C9118 7 8
47KOhm 0.033UF/16V VIN2_2 VOUT2_1 +3V
vx_r0402_small vx_c0402_small 06T290000069 T9101
Q9100

1
1% 10% C9113 TPC28T
0.1UF/10V AP2334GN-HF
TDC=1.9A

1000PF/50V

1000PF/50V
D D

1
C9114 C9115 C9136 X5R/+/-20%

C9116

C9117

1
0.1UF/10V 1UF/6.3V 1UF/6.3V @ 3 2
+1V8_MAIN

2 S
D
X5R/+/-20% X5R/+/-20% X5R/+/-20% +1.8VO R9102

3
2

1
140KOhm 1%

G
VGS= 10V , Rdson = 24mOhm vx_r0402_small C9106

11
1 2 0.1UF/10V

2
SUSB#_PWR 1 2 X5R/+/-20%
+5VO

1
C9102 R9123 D9103 1N4148WS

1
R9106 C9120 0.1UF/16V 1 2 2 1
100KOhm 0.068UF/16V U9102 T9105 vx_c0402_small

2
vx_r0402_small vx_c0402_small SN10548 TPC26T
2.604A 10% 16.5KOhm T9103

2
1% 10% 15 10T220000027 TPC28T
1 GND2 14
VIN1_1 VOUT1_2 +5VS

1 1
2 13
+12VSUS

C
E
VIN1_2 VOUT1_1

1
3 12 C9119

4
3
4 ON1 CT1 11 T9106 0.1UF/10V

47K
VBIAS GND1

1
SUSC#_PWR 1 2 5
ON2 CT2
10 TPC26T X5R/+/-20%
1.61A 23,85,87,92 NVVDD_PWROK
1

B
6 9 3 R9101 1%
VIN2_1 VOUT2_2

1
R9109 C9128 7 8 DGPU_EN_PWR 2 D9101 10KOhm
+5V

B
47K
VIN2_2 VOUT2_1

10K
1
47KOhm 0.068UF/16V 0.8V/0.2mA

47K
vx_r0402_small

1000PF/50V

1000PF/50V
1

1
vx_r0402_small vx_c0402_small 06T290000069

C9123

C9124
2

2
1
1% 10% C9125

C
1

6
0.1UF/10V Q9101

2
1

1
C9138 C9121 C9122 C9137 X5R/+/-20% 68@-5mA/Vceo=+/-50V

2
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
X5R/+/-20% X5R/+/-20% X5R/+/-20% X5R/+/-20%
2

2
Q9104
AP2334GN-HF +3VSO_VGA
3 2

2 S
+3VO

D
Q9112 T9116 R9110

3
AP2334GN-HF TPC26T
0.091A 33KOHM 1%

G
VGS= 10V , Rdson = 24mOhm vx_r0402_small

11
3 2 1 2
+1V2_HDMI

2 S
D
+1.2VO_DDR

1 1
3

1
C9108 C9134

G
C 0.1UF/10V 0.033UF/16V C

11
1 2 X5R/+/-20% vx_c0402_small

2
10% T9113 T9125
R9127 TPC28T TPC28T
(0.2A)
1
C9109 47KOhm
0.01UF/16V vx_r0402_small +3VS_VGA
+12VSUS

C
E

1 1
vx_c0402_small 1%

4
3
2
10% @ C9133

47K

1
0.1UF/10V

B
R9103 1% X5R/+/-20%

2
11.3KOhm

B
47K

10K
47K
vx_r0402_small

2
E

C
1

6
Q9105
Q9106 T9102 68@-5mA/Vceo=+/-50V
AP2334GN-HF TPC26T
0.02A R9111
3 2 20KOhm 1%
+1.05VS
2 S

+1.05VO
D

1
1 tx_r0402
3

23,85,87,92 DGPU_EN_PWR 3 1 2
G

1
C9110 2 D9102
11

23,74 +PEX_VDD_PWRGD

1
1 2 0.1UF/10V 0.8V/0.2mA C9135
X5R/+/-20% 0.1UF/16V

2
1

C9103 R9112 vx_c0402_small vx_c0402_small

2
0.047UF/16V 47KOhm 10%
10% @ vx_r0402_small
2

1%
T9107
TPC26T Q9111 T9117
10mil 10mil AP2334GN-HF TPC28T
+12VSUS +12VS
C
E

3 2
+1V8_AON

2 S
D
+1.8VO
4
3

1 1
1

R9121

3
47K

R9107 20KOhm 1% (Max:0.3A)

G
B

SUSB#_PWR 560KOhm VGS= 10V , Rdson = 24mOhm vx_r0402_small C9107

11
vx_r0402_small 1 2 0.1UF/10V
2

B
47K

10K

2
47K

5%
X5R/+/-20%
2

1
C9105
0.1UF/16V
E

C
1

B B
Q9102 vx_c0402_small

2
10% T9118
TPC28T

+12VSUS

C
E

1
4
3
47K
Q9107

1
T9100

B
AP2334GN-HF TPC26T
0.075A VGA_AON_PWR_EN
R9122 1 2 R9118
140KOhm1%

B
47K

10K
3 2

47K
vx_r0402_small
+1.05V
2 S
D

+1.05VO
1 1
3

2
C9101 1 2

C
1
G

6
92,96,97 DGPU_POWER
0.1UF/10V Q9108
11

1 2 X5R/+/-20% R9119 @ 68@-5mA/Vceo=+/-50V

2

0Ohm
R9100
1

C9100 47KOhm
0.01UF/16V vx_r0402_small
vx_c0402_small 1%
2

10% @

T9110
TPC26T
10mil 10mil
+12V
C

+12VSUS
E

1
4
3
47K

vx_r0402_small
B

SUSC#_PWR
560KOhm 5%
2

B
47K

10K

R9108
SUSC#_PWR POWER Control
47K

2
E

C
1

Q9103

SR9103
1 2
30 SUSC_EC#
T9111
A TPC26T A

83,93,95 SUSC#_PWR

1
DSC_VGA_PWR POWER Control SUSB#_PWR POWER Control
LOAD SW
SR9102 SR9101 Title :
1 2 1 2 PEGATRON PROPRIETARY AND CONFIDENTIAL
57,74 VGA_PWRON 24,30,92 SUSB_EC# Pegatron Corp. Steven Kuo
T9109 T9108 Engineer:
TPC28T TPC26T
Size
Custom Project Name G15G Rev
1.0
87,96 DGPU_EN_PWR 83,84,93,94 SUSB#_PWR
1

1
Thursday, June 28, 2018 91 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+3VS

POWER GOOD DETECTER

1
R9200
100KOhm
1%

2
D D

T9202
TPC28T +3VSUS

R80153 1 2 1 A 5
83 DDR_PWRGD VCC

1
T9203
T9209 2 B TPC28T
TPC28T
3 4
GND ALL_SYSTEM_PWRGD 30

1
R9212 1 2 Y
94 +VCCIO_PWRGD

1
U9200 @
T9211 Vcc=2~5.5
TPC28T 2 1

R9208 1 @ 2 0Ohm SR9204

89 VGA_DDR_PG

1
T9204 +3V
TPC28T

1
R9206 1 @ 2 0Ohm
70,74,87 NVVDD_PWROK

1
C R9214 C
T9200 100KOhm T9213
TPC28T 1% TPC28T
D9203

2
R9209 1 @ 2 0Ohm 1 2
95 +PEX_VDD_PWRGD +2.5V_PWRGD 30,81
1

1
RB751V-40
07T030000013

+3VSUS

1
R9202
T9205 100KOhm
TPC28T 1%
D9200

2
T9210 2 1
30,81 SUS_PWRGD
1

TPC28T

R9213 1 2 RB751V-40
82 +1.05VSUS_PWRGD
1

B 07T030000013 B

R9217 1 2
82 +1.8VSUS_PWRGD

R9215 1 @ 2 0Ohm
50 CPU_THERM#
SUSB_EC#
24,30,91 SUSB_EC#
R9210 1 2

2
T9206
TPC28T
+3VS D9201 @
1.2V/0.1A
FORCE_OFF# 50

1
2 1
1

1
R9203 R9204
100KOhm R9205 @ 560KOhm

6
T9207 1% 0Ohm 5%
TPC28T +3VSUS tx_r0402_0ohm D Q9200A
2

2
2 UM6K1NG1DTN FORCE_OFF_PWR 81

1
1 A 5
24,44,80 VRM_PWRGD VCC S
1

D9202 G
3

A 1 2 ALL_SYSTEM_PWRGD 2 B A

1
D

1
Q9200B
RB751V-40 3 4 5 UM6K1NG1DTN C9200
GND
07T030000013
Y
S
2.2UF/6.3V
Title : DETECTER
2
U9201 @ G
X5R/+/-10% PEGATRON PROPRIETARY AND CONFIDENTIAL
Vcc=2~5.5 Pegatron Corp. Steven Kuo
4

Engineer:
Size
Custom Project Name G15G Rev
1.0
Thursday, June 28, 2018 92 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+A/D_DOCK_IN +A/D_DOCK_IN 60,88

+BAT_CON +BAT_CON 60,88

FOR POWER TEST
+AC_BAT_SYS +AC_BAT_SYS 60,88
T9300
D
+12VSUS +12VSUS 60,88 JP9300 @ TPC28T D
SGL_JUMP
1 2
+3VA 1 2 CPU_VRON_PWR 80

1
+3VO +3VO 60,88
T9301
+3VSUS +3VSUS 60,88 JP9301 @ TPC28T
SGL_JUMP
+3V +3V 60,88 1 2
1 2 SUSB#_PWR 83,84,91,94

1
+3VS +3VS 60,88 T9302
JP9302 @ TPC28T
+3VS_VGA +3VS_VGA 60,88 SGL_JUMP
1 2
1 2 SUSC#_PWR 83,91,95

1
+3VA +3VA 60,88
T9303
+5VO +5VO 60,88 JP9303 @ TPC28T
SGL_JUMP
+5VSUS +5VSUS 60,88 1 2
1 2 VSUS_ON 30,81,82

1
+5V +5V 60,88 T9304
JP9304 @ TPC28T
+5VS +5VS 60,88 SGL_JUMP
C 1 2 C
1 2 DGPU_POWER 30,81,82

1
+1.05VO +1.05VO 60,88

+1.05VSUS +1.05VSUS 60,88

+1.05V +1.05V 60,88

+1.05VS +1.05VS 60,88

+1.2VO_DDR +1.2VO_DDR 60,88

+1P2V +1P2V 60,88

+0.6VO +0.6VO 60,88

+VTT_DDR +VTT_DDR 60,88

+1.8VO +1.8VO 60,88

+1.8VSUS +1.8VSUS 60,88

B B
+1V8_MAIN +1V8_MAIN 60,88

+1V8_AON +1V8_AON 60,88

+0.95VO +0.95VO 60,88

+VCCIO +VCCIO 60,88

+2.5VO +2.5VO 60,88

+2P5VPP +2P5VPP 60,88

+PEX_VDD +PEX_VDD 60,88

+NVVDD +NVVDD 60,88

+FBVDDQ +FBVDDQ 60,88

+NVVDDS +NVVDDS 60,88

A A

+VCORE +VCORE 60,88

+VCCGT +VCCGT 60,88

Title : Signal
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
+VCCSA +VCCSA 60,88 Engineer:
Size
Custom Project Name G15G Rev
1.0
Thursday, June 28, 2018 93 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+VCCIO POWER SUPPLY

D D

（0.7A）
）
+AC_BAT_SYS

1
C9412 @ C9413 C9401 @
1500PF/50V 10UF/25V 10UF/25V

2
vx_c0402_small X5R/+/-10% X5R/+/-10%

2
R9406 X7R/+/-10% vx_c0805_h57_small vx_c0805_h57_small
+5VO 73.2KOhm 1%
vx_r0402_h15_small

1
T9405 T9404 T9402 T9403
TPC28T TPC28T TPC28T TPC28T

2
R9401 @

1
100KOhm VCCIO_TON U9400 +VCCIO +0.95VO
vx_r0402_small APW8715EQBI-TRG

10
7
8
1%
1

6 12

NC
VIN1

LX1
VCCIO_FB 5 TON PGND1 13
4 FB PGND2 14
VCCIO_PFM 3 AGND PGND3 15
C PFM PGND4 C
VCCIO_EN 2 16

PGND5
EN LX2

BOOT
92 +VCCIO_PWRGD 1 17 063T/DCR=9mOHM

VIN2
POK

VCC
LX3

LX4
SS
T9401
+0.95VO
2

TPC28TL9401 JP9402

23
22
21
20
19
18
R9404 1UH 3MM_OPEN_5MIL
VCCIO_LX 2 1 1 2
1 2 +VCCIO

1
Irat=11A
（4.48A）
）
1

09T030000290

1
VCCIO_SS C9403 C9408 C9407 C9409 C9410 C9411
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
1

C9414 vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small vx_c0603_h39_small

2
0.01UF/16V 10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10% X5R/+/-10%
R9402 vx_c0402_small C9416 2 1 0.1UF/25V
2

2
2.2Ohm 5% R9407
+5VO tx_r0402 VCCIO_BST 2 1 VCCIO_BST_R 2 1
C9406 0.1UF/25V
2 1 VCCIO_VCC JP9401
SHORT_PIN
1

C9404 VRef=0.6V +/-1%

1
2.2uF/6.3V
tx_c0201_t009_h15 C9405 @
2

B X5R/+/-20% 100PF/50V 5% B
D9400 vx_c0402_small
1.2V/0.1A 2 1
2 1

VCCIO_FB_R
R9403
81,84,93 SUSB#_PWR 1 2 VCCIO_EN 3.74KOHM 1%
Vout=0.8*(1+(R1/R2)) vx_r0402_small
1

R9408 C9402 VCCIO_FB 2 1

160KOhm 0.1UF/16V 10% 0.8V +- 1%
2
tx_r0402_h16 vx_c0402_small
2

1% 1.008V:R1=5.10K, R2=19.6K R9405

1
20KOhm 1% C9415
1.009V:R1=5.23K, R2=20K vx_r0402_small 0.01UF/16VX7R/+/-10%
1.359V:R1=13.7K, R2=19.6K tx_c0402
1

2
1.360V:R1=14K , R2=20K
1.512V:R1=17.8K, R2=20K
1.510V:R1=17.4K, R2=19.6K

A A

+VCCIO
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
1.0
Thursday, June 28, 2018 94 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

D D

+2.5V POWER SUPPLY

+2.5VO JP9500
（1.4A）
） 1
1MM_OPEN_M1M2
2
+5VO +3VO 1 2 +2P5VPP
（1.4A）
） 2.5V_FB_R 1 2
（1.4A）
）

1
JP9501

1
R9510 SHORT_PIN

1
4.7Ohm C9504 @ C9502
tx_r0402 R9503 1000PF/50V 10UF/6.3V

9
C
1% 100KOhm tx_c0402 tx_c0603_t02_h39 C

2
2.5V_VPP 4 5 tx_r0402 X7R/+/-10% X5R/+/-20%

GND2
VPP NC

2
3 6 1%
2 VIN VO 7 2.5V_FB
1 VEN ADJ 8
92 +2.5V_PWRGD POK GND1
1

1
C9503
2.2uF/6.3V
C9500
10UF/6.3V
U9500
G9661-25ADJF11U R9501
+2.5VO
tx_c0201_t009_h15 tx_c0603_t02_h39 Vref=0.8V +- 2% 47KOhm MAX current :1.4A
2

2
D9500 @
X5R/+/-20% X5R/+/-20% tx_r0402
1% PWR Cap. :22uF
Total Cap. :22uF

2
1.2V/0.1A
2 1

87,91,92 SUSC#_PWR 1 2 2.5V_EN

R9502
1

47KOhm T9508 T9501 T9507 T9513 T9512 T9503

vx_r0402_small C9507 TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T
1% 0.1UF/16V
2

10% +2.5VO +2P5VPP

1
B B
vx_c0402_small
T9509 T9505 T9510 T9504 T9511 T9506
TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T

1
GND GND

A A

+2P5VPP
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
1.0
Thursday, June 28, 2018 95 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

+PEX_VDD POWER SUPPLY

D D

+1.0V_VGA_VO
JP9600
（1.3A）
） 1
1MM_OPEN_M1M2
2
+3VS +5VO +1.2VO_DDR 1 2 +PEX_VDD
（1.3A）
） +1.0V_VGA_FB_R 1 2
）
（1.3A）

1
JP9601

1
R9616 R9602 SHORT_PIN

1
10KOhm 4.7Ohm C9600 @ C9603
tx_r0402 tx_r0402 R9600 1000PF/50V 10UF/6.3V

9
1% 1% 11.8KOHM tx_c0402 tx_c0603_t02_h39

2
+1.0V_VGA_VPP 4 5 tx_r0402 X7R/+/-10% X5R/+/-20%

GND2
C VPP NC C

2
3 6 1%
+1.0V_VGA_EN 2 VIN VO 7 +1.0V_VGA_FB
1 VEN ADJ 8
92 +PEX_VDD_PWRGD POK GND1

1
C9602
2.2uF/6.3V
C9601
10UF/6.3V
U9600
G9661-25ADJF11U R9601
+PEX_VDD
tx_c0201_t009_h15 tx_c0603_t02_h39 Vref=0.8V +- 2% 47KOhm MAX current :1.3A
2

2
X5R/+/-20% X5R/+/-20% tx_r0402
1% PWR Cap. :22uF
Total Cap. :22uF

2
R9610 @
0Ohm
1 2
DGPU_POWER
D9602
R9609 1.2V/0.1A
0Ohm @
DGPU_EN_PWR 2 1 2 1
B D9601 B
1.2V/0.1A R9615
@ R9607 47KOHM
2 1 +3VSUS 1 2 2 1 +1.0V_VGA_EN
GPU_OVERT#

1
C9616
1 A 5 0.01UF/16V
DGPU_EN_PWR VCC
10%

2
2 B
NVVDD_PWROK
3 4
GND
Y
U9601
Vcc=2~5.5
T9605 T9604 T9601 T9602
TPC28T TPC28T TPC28T TPC28T

1
+1.0V_VGA_VO +PEX_VDD

A A

+PEX_VDD
Title :
PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
Engineer:
Size
B Project Name G15G Rev
1.0
Thursday, June 28, 2018 96 108
Date: Sheet of
5 4 3 2 1
 Vinafix.com
5 4 3 2 1

Design rating
charge +12VSUS
+5VO pump(triple UMC4N +12VSUS (3.2mA)
VCLK volatger) SUSB#_PWR (SWITCH)

TDC 7.9998A
+3VO
+3VSUS (1.7376A)
D
SN10548 +3V (0A)
D

SUSC#_PWR

SN10548 +3VS (3.2022A)

SUSB#_PWR

TPS51225CRUKR
DGPU_EN_PWR AP2334GN-HF(SWITCH) +3VS_VGA (0.2A)
VSUS_ON
+PEX_VDD_PWRGD
+3VA (0.1A)
USB_CPW_EN
TDC 4.214A
+5VO
+5VSUS (0A)
SUS_PWRGD
SUSC#_PWR
SN10548 +5V (1.61A)

SN10548 +5VS (2.604A)

SUSB#_PWR

+5VO TDC 4.8132A

APW8715EQBI +1.05VO
+1.05VSUS (4.5461A)
VSUS_ON +1.05VSUS_PWRGD

SUSB#_PWR
AP2334GN-HF(SWITCH) +1.05V (0.075A)

C
SUSC#_PWR AP2334GN-HF(SWITCH) +1.05VS (0.02A) C

TDC 5.892A
+5VO
+AC_BAT_SYS +1.2VO_DDR
+1P2V (4.592A)
+A/D_DOCK_IN BQ24780SRGRR SUSC#_PWR
RT8231BGQW

Adapter 180W DDR_VTT_CNTRL HDM2_VDD12_ON AP2334GN-HF(SWITCH) +1.2HDMI2 (0.091A)

19.5V / 9.23A +0.6VO
+VTT_DDR (0.7A)
DDR_PWRGD

TDC 0.05A
+3VO +1.5VO
BATTERY G918T11U +1.5VS (0.05A)
SUSB#_PWR

TDC 2.4138A
+1.8VO
+3VO +1.8VSUS
SY8063DBC (0.5138A)
VSUS_ON 1.8VSUS_PWRGD
NVVDD_PWROK IRFML8244TRPBF (SWITCH) +1V8_MAIN
DGPU_PWROK (1.6A)

IRFML8244TRPBF (SWITCH) +1V8_AON

TDC 4.48A VGA_AON_PWR_EN (0.3A)
+5VO
B
+0.95VO B

APW8715EQBI +VCCIO (4.48A)

SUSB#_PWR +VCCIO_PWRGD

TDC 1.4A
+3VO +2.5VO
G9661-25ADJF11U +2P5VPP (1.4A)
SUSC#_PWR +2.5V_PWRGD

TDC 1.3A
+1.2VO_DDR +1.0V_VGA_VO
DGPU_EN_PWR
G9661-25ADJF11U +PEX_VDD (1.3A)
+PEX_VDD_PWRGD
NVVDDS_PWROK

+5VS TDC 59A

RT8813DGQW +NVVDD (59A)
DGPU_EN_PWR +NVVDD_PWROK
+PEX_VDD_PWRGD

+5VS TDC 11A

+1.35VO_VGA
GC6_FB_EN
RT8816AGQW +FBVDDQ (11A)
+VGA_DDR_PG
+PEX_VDD_PWRGD

TDC 80A
A A

+VCORE (80A)
+5VS
TDC 25A
ISL95855C
+VCCGT (25A)
VIDSOUT
VIDALERT#
VIDSCLK TDC 10A
PROCHOT#
CPU_VRON_PWR +VCCSA Title : POWER_TREE
(10A) PEGATRON PROPRIETARY AND CONFIDENTIAL
Pegatron Corp. Steven Kuo
CPU_VRON VRM_PWRGD Engineer:
Size
D Project Name G15G Rev
1.0
Thursday, June 28, 2018 98 108
Date: Sheet of
5 4 3 2 1