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Computer Organization

This document provides information about the Computer Organization course for the 1st year, 1st semester of an MCA program. The course is a core course worth 3 credits and will be assessed through continuous internal exams worth 50 marks and an end of semester exam worth 50 marks for a total of 100 marks. The course objectives are to demonstrate computer instructions, pipelining, data transfer modes, and memory and multiprocessor organization. The course outcomes are to differentiate instruction formats, analyze pipelining and parallel processing, distinguish data transfer modes, elaborate memory hierarchy, and examine multiprocessor interconnection structures. The course is divided into 5 units covering basic computer design, pipelining and vector processing, input/output organization, memory organization,

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59 views

Computer Organization

This document provides information about the Computer Organization course for the 1st year, 1st semester of an MCA program. The course is a core course worth 3 credits and will be assessed through continuous internal exams worth 50 marks and an end of semester exam worth 50 marks for a total of 100 marks. The course objectives are to demonstrate computer instructions, pipelining, data transfer modes, and memory and multiprocessor organization. The course outcomes are to differentiate instruction formats, analyze pipelining and parallel processing, distinguish data transfer modes, elaborate memory hierarchy, and examine multiprocessor interconnection structures. The course is divided into 5 units covering basic computer design, pipelining and vector processing, input/output organization, memory organization,

Uploaded by

Uma maheswari V
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Organization MCA 1st year 1st semester

Code Category Hours / Week Credits Marks


A212403 Program L T P C CIE SEE Total
Core 3 0 0 3 50 50 100

Course Objectives
Course Objectives of Computer Organization are to:
1. Demonstrate different types of Instructions and addressing modes.
2. Describe the concepts of pipelining techniques.
3. Compare different Modes of Transfer.
4. Summarize the concepts of Memory organization.
5. Outline Multiprocessor systems and buses.
Course Outcomes
At the end of this Computer Organization course, students will be able to:
1. Differentiate Instruction formats and addressing modes.
2. Analyze the concept of pipelining and parallel processing.
3. Distinguish various modes of data transfer between CPU and I/O devices.
4. Elaborate the organization of Memory hierarchy.
5. Examine various interconnection structures of the Multiprocessor system.

UNIT I
Basic Computer Organization and Design: Instruction Code Definition, Instruction
cycle, types of instruction formats (Zero, one, two and three address). Addressing modes:
mode field, implied, immediate register, register direct, register indirect, auto increment,
decrement, indexed, relative, base address mode, Numerical examples and problems.

UNIT II
Pipeline and Vector Processing: Parallel Processing, Pipelining, Arithmetic
Pipeline, Instruction Pipeline, RISC Pipeline Vector Processing, Array Processors.

MCA Course Structure and Syllabus (R22), Nov. 2022 8


UNIT III
Input – Output Organization: I/O interface: I/O Bus and Interface modules, I/O versus Memory
Bus, isolated vs Memory-mapped I/O. Asynchronous data transfer-strobe control, Hand shaking;
Modes of Transfer: Example of programmed I/O, interrupt-initiated I/O, software considerations.
Daisy- Chaining priority. DMA: DMA Controller, DMA Transfer, Intel 8089 IOP.

UNIT IV
Memory Organization: Memory Hierarchy, Main memory, memory address map, memory connection to CPU;

auxiliary memory, Magnetic disks, magnetic tapes; cache memory, hit and miss ratio, direct, associative and set

associative mapping; Micro-programmed control: Control memory, address sequencing.

UNIT V
Multi Processors: Characteristics of Multiprocessor; Interconnection structures: Time
shared common bus, multiport memory, crossbar switch, multi-stage switching network;
Inter processor Arbitration; Inter processor Communication and Synchronization.

Text Book
1. M. Morris Mano, Computer System Architecture, Third Edition, Pearson/PHI, 2011.

Reference Books
1. Carl Hamacher, Zvonks Vranesic, SafeaZaky, Computer Organization, Fifth
Edition, McGraw Hill, 2002.
2. William Stallings, Computer Organization and Architecture, Sixth Edition, Pearson/PHI, 2007.

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