Lab02labsheetiosystemdevicebej40401 1 PDF
Lab02labsheetiosystemdevicebej40401 1 PDF
BEJ40401
Faculty of Electric and Electronic Engineering
Instruction Sheet
Lab No. 02
Lab Title Input Output System Devices
Semester 01
Session 2022/2023
Lab Duration 4 hours (2 weeks)
Electronic Engineering Laboratory IV (BEJ40401) ii
Lab 2: Input Output System Devices
Table of Content
Table of Content ii
1.0 Outcomes 1
2.0 Guidelines 1
3.0 Pre-Lab 2
4.0 Procedures 2
7.0 Observations 6
8.0 Questions 6
9.0 References 6
10.0 Appendix 6
1.0 Outcomes
2.0 Guidelines
1. Lab group: should consist of two to five team members (number of team members will
be decided by the instructor).
2. Pre-Lab: pre-lab questions should be answered before the lab session and should be
attached with the lab report.
3. Lab Activities: all lab activities such as sample code, examples and lab assignments
should be completed within the given times.
4. Demonstration: students should demonstrate the successful sample code, examples, and
lab assignments to the respective instructor.
5. Report Organization: report must be organized according to the given report template.
6. Report Submission: report must be submitted not later than one week upon completion
of the lab session.
2. Briefly explain four types of I/O commands that an I/O module may receive when it is
addressed by a processor as follows:
i. Control
ii. Test
iii. Read
iv. Write
(2 marks)
4.0 Procedures
Overview
Computer systems use the interrupt mechanism as a means of responding to external events such
as input and output operations. The CPU is momentarily interrupted just before executing the
next instruction and is forced to execute the instructions of an interrupt handler. Once the interrupt
handling is completed, the CPU is returned to executing the instruction it was about to execute
before it was interrupted. The stack is used to store the CPU state such as the contents of registers
and the return address when interrupted. These are then restored once the interrupt handler is
exited.
An I/O module may be required to read or write directly to memory, without sending data to the
CPU. Because at one point is just a unit that will successfully transmit data through the bus, then
take a few methods of arbitration. The goal is to assign a device, the CPU or I/O module, acting as
master. Then the master can initiate data transfer (e.g., read or write) by using other devices, which
work as a slave for this particular data exchange.
1. In the compiler window, check only the boxes Generate code, Enable optimizer and
Redundant Code. Enter the following source code and compile it:
program Vectors
sub IntVect1 intr 1
writeln ("This is intr 1")
end sub
sub IntVect2 intr 2
writeln ("This is intr 2")
end sub
sub IntVect5 intr 5
writeln ("This is intr 5")
end sub
while true
wend
end
2. In the compiled code window locate the subroutines IntVect1, IntVect2 and IntVect5. Make a
note of the starting addresses of these subroutines below:
Table 1
Subroutine Starting address
IntVect1
IntVect2
IntVect5
Note: The INTERRUPT VECTORS window in the simulator represents part of the CPU
hardware that stores the various interrupt routine addresses.
1. Enter the following source code in a new source editor and compile it.
program PolledInt
var v integer
v=0
writeln("Program Starting")
while true
read(nowait, v)
for i = 1 to 100
if v > 0 then
break *
end if
write(".")
next
wend
writeln("Program Ending")
end
Notes:
The nowait keyword in the read statement makes sure the program is not suspended
while waiting for input.
If there is no input, the value of the variable v will remain unchanged.
The break * statement takes the program out of the outermost loop which in this case is
the while loop
3. Next, enter the following source code in a new source editor and compile it.
program VectoredInt
var v integer
sub InputInt intr 1
read(nowait, v)
end
subv
=0
writeln("Program
Starting")while true
for i = 1 to 100
if v > 0 then
brea
k * end if
write(".")
n
ext
wend
writeln("Program Ending")
end
1. From Lab activity 1, comment on your observations by referring to Table 2 and the messages
displayed on the console after clicking the TRIGGER button (include the displayed contents of
the program stack).
(9 marks)
2. From Lab activity 2, briefly explain what the two programs are doing (note where the read
statement is in this case).
(6 marks)
1. Based on your observation in the previous exercise, briefly explain the difference in the
behaviours of the two programs, PolledInt and VectoredInt, with respect to the speed of
response to input. Explain why this difference.
(10 marks)
2. Suggest and very briefly describe five reasons where you would use the Polled Interrupt
method in preference to the Vectored Interrupt method.
(5marks)
9.0 References
1. Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Nraig Manjikian (2012) Computer
Organization and Embedded Systems, 6th Edition. The McGraw-Hill Companies.
2. W. Stallings (2010), Computer Organization & Architecture: Designing for Performance, 8th
Edition, Pearson Prentice Hall.
10.0 Appendix
Nil