Embedded Systems with ARM Cortex-M Microcontrollers in Assembly Language and C

Chapter 3
ARM Instruction Set Architecture

CE-475
Real-Time Embedded Systems

Spring 2023

Special thanks to Dr. Yifeng Zhu

History

STM32F4

2
ARM Processors
 ARM Cortex-A family:
 Applications processors
 Support OS and high-performance applications
 Such as Smartphones, Smart TV
 ARM Cortex-R family:
 Real-time processors with high performance and
high reliability
 Support real-time processing and mission-critical
control
 ARM Cortex-M family:
 Microcontroller
 Cost-sensitive, support SoC

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 ARM Processors
Cortex-A57
Cortex-A53

Cortex-A15
Cortex-A9 Cortex-A
Cortex-A8
Cortex-A7
Cortex-A5

Cortex-R7
Cortex-R5
Cortex-R4
Cortex-R
STM32F4 Discovery Board Cortex-M4
Cortex-M3
Cortex-M1
Cortex-M0+
Cortex-M
Cortex-M0

SC000
SC100
SC300
SecurCore
ARM11
ARM9
ARM7
Classic

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Instruction Sets
 Instructions:
 Encoded to binary machine code by
assembler
 Executed at runtime by hardware
 Early 32-bit ARM vs Thumb/Thumb-2
 Early ARM has larger power consumption and
larger program size
 16-bit Thumb, first used in ARM7TDMI
processors in 1995
 Thumb-2: a mix of 16-bit (high code density)
and 32-bit (high performance) instructions
 ARM Cortex-M:
 Subset of Thumb-2

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Instruction Sets
 Instructions:
 Encoded to binary machine code by
assembler
 Executed at runtime by hardware
 Early 32-bit ARM vs Thumb/Thumb-2
 Early ARM has larger power consumption and
larger program size
 16-bit Thumb, first used in ARM7TDMI
processors in 1995
 Thumb-2: a mix of 16-bit (high code density)
and 32-bit (high performance) instructions
 ARM Cortex-M:
 Subset of Thumb-2

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 Instruction Sets

16-bit
32-bit

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from arm.com
 Processor Registers
32 bits

R0  Fastest way to read and write

R1
R2
 Registers are within the processor chip
Low
Registers
R3  Each register has 32 bits
R4
R5  ARM Cortex-M4 has
Register Bank: R0 – R15
General
R6 Purpose 
Register
 R0-R12: 13 general-purpose registers
R7
R8
R9  R13: Stack pointer (Shadow of MSP or
32 bits
High
Registers R10 PSP)
R11 xPSR  R14: Link register (LR)
R12 BASEPRI
Special
 R15: Program counter (PC)
R13 (SP) R13 (MSP) R13 (PSP) PRIMASK Purpose

Special registers
Register
R14 (LR) FAULTMASK 
R15 (PC) CONTROL
 xPSR, BASEPRI, PRIMASK, etc

Register Bank Special Registers

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 Processor Registers
32 bits

R0
 Low Registers (R0 – R7)
R1
R2  Can be accessed by any instruction
Low
Registers
R3  High Register (R8 – R12)
R4
R5  Can only be accessed by some instructions
Stack Pointer (R13)
General
R6 Purpose
Register

R7
R8
 Cortex-M4 supports two stacks
R9
32 bits
 Main SP (MSP) for privileged access (e.g.
High
Registers R10 exception handler)
R11 xPSR
 Process SP (PSP) for application access
R12 BASEPRI
R13 (SP) R13 (MSP) R13 (PSP) PRIMASK
Special
Purpose
Register
 Program Counter (R15)
R14 (LR) FAULTMASK  Memory address of the current instruction
R15 (PC) CONTROL

Register Bank Special Registers

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Processor Registers vs Peripheral Registers

ARM Cortex-M Core

ALU
Registers Registers

Control Unit
Registers GPIO A GPIO B

UART1 SPI ADC

Registers Registers Registers

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Processor Registers vs Peripheral Registers
 Processor can directly access processor registers
 ADD r3,r1,r0 ; r3 = r1 + r0

 Processor access peripheral registers via memory mapped I/O

 Each peripheral register is assigned a fixed memory address at the chip design stage
 Processor treats peripherals registers the same as data memory
 Processor uses load/store instructions to read from/write to memory (to be covered
in future lectures)

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Interfacing Peripherals
 Memory-mapped I/O

ARM Cortex-M microprocessors use memory-mapped I/O.

0x48000024
0x48000020
0x4800001C
Core Pin output
STR 0x48000018
0x48000014 GPIO Data Output Register GPIO
Output
0x48000010

Memory Space

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Memory
Map

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C vs Assembly

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Load-Modify-Store

Translating C to assembly
• Load values from memory into registers
• Modify value by applying arithmetic operations
• Store result from register to memory

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Load-Modify-Store

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 ARM Cortex-M3 Organization (STM32L1)
SW/JTAG LCD SPI2
TIM2 I2C1
TIM4 I2C2
Cortex-M3 Processor Core Instructions TIM6 USB 2.0 FS
Flash TIM7 DAC1
Instruction Bus Memory USART2

Instruction Fetch Unit

DAC2

Instruction Decoder
Interrupt Controller

Processor Control USART3 USB RAM

Interface
Data
Trace & Debug

Memory
Memory SRAM WWDG

AHB Bus Matrix

`
Interface

Protection
(NVIC)

ALU
Unit

Interrupts Unit (MPU) Advanced High-

performance Bus
APB1 Advanced
Data Bus (AHB) AHB to APB Bridge 1
Peripheral Bus
AHB to APB Bridge 2 (APB)
ABP2
System Bus
GPIO Port A
GPIO Port B
EXT ADC
GPIO Port C
Direction Memory WKUP TIM9
GPIO Port D
Access (DMA) GPIO Port E SPI1 TIM10
Controller GPIO Port H USART1 TIM11

System-on-a-chip
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 ARM Cortex-M4 Organization (STM32L4)
LCD SPI2
TIM2 SPI3
TIM3 I2C1/SMBUS
SW/JTAG
TIM4 I2C2/SMBUS
TIM6 I2C3/SMBUS
TIM7 USB 2.0 FS
Cortex-M4 Processor Core Instructions USART2 bxCAN
Flash
USART3 SWPMI1
Instruction Bus Memory

Instruction Fetch Unit

USART4 LPTIM1

Instruction Decoder
Multiple Data (DSP)
Interrupt Controller

Processor Control

Single Instruction
USART5 LPTIM2

Interface
Data

Memory
Trace & Debug

FPU (optional)
Memory SRAM OpAmp

AHB Bus Matrix

LPUART1
Interface

` Protection
(NVIC)

ALU
Unit

Interrupts Unit (MPU) Advanced High-

performance Bus
APB1 Advanced
Data Bus (AHB) AHB to APB Bridge 1
Peripheral Bus
AHB to APB Bridge 2 (APB)
ABP2
System Bus
GPIO Port A
GPIO Port B
EXTI SPI1
GPIO Port C
Direction Memory GPIO Port D WKUP SAI1
Access (DMA) GPIO Port E TIM1/PWM SAI2
Controllers GPIO Port F TIM8/PWM DFSDM
GPIO Port G TIM15 COMP1
GPIO Port H TIM16 COMP2
Von Neumann or Harvard ? TIM17 Firewall
USART1
System-on-a-chip
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Assembly Instructions

 Arithmetic and logic

 Add, Subtract, Multiply, Divide, Shift, Rotate
 Data movement
 Load, Store, Move
 Compare and branch
 Compare, Test, If-then, Branch, compare and branch on zero
 Miscellaneous
 Breakpoints, wait for events, interrupt enable/disable, data memory barrier, data
synchronization barrier

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Instruction Format: Labels

label mnemonic operand1, operand2, operand3 ; comments

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Instruction Format: Labels

label mnemonic operand1, operand2, operand3 ; comments

 Place marker, marking the memory address of the current instruction

 Used by branch instructions to implement if-then or goto
 Must be unique

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Instruction Format: Mnemonic

label mnemonic operand1, operand2, operand3 ; comments

 The name of the instruction

 Operation to be performed by processor core

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Instruction Format: Operands
label mnemonic operand1, operand2, operand3 ; comments

 Operands
 Registers
 Constants (called immediate values)
 Number of operands varies
 No operands: DSB
 One operand: BX LR
 Two operands: CMP R1, R2
 Three operands: ADD R1, R2, R3
 Four operands: MLA R1, R2, R3, R4
 Normally
 operand1 is the destination register, and operand2 and operand3 are source operands.
 operand2 is usually a register, and the first source operand
 operand3 may be a register, an immediate number, a register shifted to a constant number of bits, or a register
plus an offset (used for memory access).

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Instruction Format: Comments

label mnemonic operand1, operand2, operand3 ; comments

 Everything after the semicolon (;) is a comment

 Explain programmers’ intentions or assumptions

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ARM Instruction Format

label mnemonic operand1, operand2, operand3 ; comments

target ADD r0, r2, r3 ; r0 = r2 + r3

label mnemonic destination 1st source 2nd source comment

operand operand operand

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ARM Instruction Format

label mnemonic operand1, operand2, operand3 ; comments

target ADD r0, r2, r3 ; r0 = r2 + r3

Bad comment!

A better example:

; Increment angle r2 by step size r3

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ARM Instruction Format

label mnemonic operand1, operand2, operand3 ; comments

Examples: Variants of the ADD instruction

ADD r1, r2, r3 ; r1 = r2 + r3
ADD r1, r3 ; r1 = r1 + r3
ADD r1, r2, #4 ; r1 = r2 + 4
ADD r1, #15 ; r1 = r1 + 15

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Example Assembly Program:
Copying a String

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Assembly Directives
 Directives are NOT instructions. Instead, they are used to provide key information for assembly.

AREA Make a new block of data or code

ENTRY Declare an entry point where the program execution starts
ALIGN Align data or code to a particular memory boundary
DCB Allocate one or more bytes (8 bits) of data
DCW Allocate one or more half-words (16 bits) of data
DCD Allocate one or more words (32 bits) of data
SPACE Allocate a zeroed block of memory with a particular size
FILL Allocate a block of memory and fill with a given value.
EQU Give a symbol name to a numeric constant
RN Give a symbol name to a register
EXPORT Declare a symbol and make it referable by other source files
IMPORT Provide a symbol defined outside the current source file
INCLUDE/GET Include a separate source file within the current source file
PROC Declare the start of a procedure
ENDP Designate the end of a procedure
END Designate the end of a source file

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Directive: AREA
AREA myData, DATA, READWRITE ; Define a data section
Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section

EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The AREA directive indicates to the assembler the start of a new data or code section.
 Areas are the basic independent and indivisible unit processed by the linker.
 Each area is identified by a name and areas within the same source file cannot share the same name.
 An assembly program must have at least one code area.
 By default, a code area can only be read (READONLY) and a data area may be read from and written to (READWRITE).

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Directive: ENTRY

AREA myData, DATA, READWRITE ; Define a data section

Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section

EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The ENTRY directive marks the start point to execute a program.

 There must be exactly one ENTRY directive in an application, no matter how many source files the application has.

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Directive: END

AREA myData, DATA, READWRITE ; Define a data section

Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section

EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The END directive indicates the end of a source file.

 Each assembly program must end with this directive.

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Directive: PROC and ENDP (Procedure and EndProcedure

AREA myData, DATA, READWRITE ; Define a data section

Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section

EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 PROC and ENDP are to mark the start and end of a function (also called subroutine or procedure).
 A single source file can contain multiple subroutines, with each of them defined by a pair of PROC and ENDP.
 PROC and ENDP cannot be nested. We cannot define a function within another function.

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Directive: EXPORT and IMPORT

AREA myData, DATA, READWRITE ; Define a data section

Array DCD 1, 2, 3, 4, 5 ; Define an array with five integers

AREA myCode, CODE, READONLY ; Define a code section

EXPORT __main ; Make __main visible to the linker
ENTRY ; Mark the entrance to the entire program
__main PROC ; PROC marks the begin of a subroutine
... ; Assembly program starts here.
ENDP ; Mark the end of a subroutine
END ; Mark the end of a program

 The EXPORT declares a symbol and makes this symbol visible to the linker.
 The IMPORT gives the assembler a symbol that is not defined locally in the current
assembly file. The symbol must be defined in another file.
 The IMPORT is similar to the “extern” keyword in C.

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Directive: Defining Data

Directive Description Memory Space

DCB Define Constant Byte Reserve 8-bit values
DCW Define Constant Half-word Reserve 16-bit values
DCD Define Constant Word Reserve 32-bit values
DCQ Define Constant Reserve 64-bit values
DCFS Define single-precision Reserve 32-bit values
floating-point numbers
DCFD Define double-precision Reserve 64-bit values
floating-point numbers
SPACE Defined Zeroed Bytes Reserve a number of zeroed bytes
FILL Defined Initialized Bytes Reserve and fill each byte with a value

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Directive: Defining Data
AREA myData, DATA, READWRITE
hello DCB "Hello World!",0 ; Allocate a string that is null-terminated
dollar DCB 2,10,0,200 ; Allocate integers ranging from -128 to 255
scores DCD 2,3.5,-0.8,4.0 ; Allocate 4 words containing decimal values
miles DCW 100,200,50,0 ; Allocate integers between –32768 and 65535
Pi_S DCFS 3.14 ; Allocate a single-precision floating number
Pi_D DCFD 3.14 ; Allocate a double-precision floating number
p SPACE 255 ; Allocate 255 bytes of zeroed memory space

f FILL 20,0xFF,1 ; Allocate 20 bytes and set each byte to 0xFF

binary DCB 2_01010101 ; Allocate a byte in binary

octal DCB 8_73 ; Allocate a byte in octal
char DCB ‘A’ ; Allocate a byte initialized to ASCII of ‘A’

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Directive: EQU and RN (Equate, RegisterName)

; Interrupt Number Definition (IRQn)

BusFault_IRQn EQU -11 ; Cortex-M3 Bus Fault Interrupt
SVCall_IRQn EQU -5 ; Cortex-M3 SV Call Interrupt
PendSV_IRQn EQU -2 ; Cortex-M3 Pend SV Interrupt
SysTick_IRQn EQU -1 ; Cortex-M3 System Tick Interrupt

Dividend RN 6 ; Defines dividend for register 6

Divisor RN 5 ; Defines divisor for register 5

 The EQU directive associates a symbolic name to a numeric constant.

 Similar to the use of #define in a C program, the EQU can be used to define a constant in an assembly code.
 The RN directive gives a symbolic name to a specific register.

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