l3 - Part1 - Analog Front End Sampling - v22

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FYS3240- 4240

Data acquisition & control

Analog front-end electronics &


sampling
Spring 2022– Lecture #3 – part 1

Bekkeng, 27.12.2021
Learning outcome
• This is fundamental electronics and signal processing that we
need to know.

• Much should be know from other courses!


– Make sure that you know/understand this! Relevant for Exam!

• What happens if your DAQ input impedance is to low?


• Single-ended vs. Differential signals.
• Typical signal conditioning required before A/D-conversion.
• Sampling and anti-aliasing
– Nyquist
– Oversampling
• ADC errors.
• Analog filter types – when to use which filter ?
Considerations for analog signals

• Signal source - grounded or floating


• Source impedance
– The DAQ device must have a much higher input impedance
than the signal source
– This is usually not a problem as the DAQ devices are designed to
have a very high input impedance (MΩ – GΩ range)
• Single-ended & differential signals

signal source DAQ card front-end

Vin (voltage divider)

I = V / Z, where (Z is the impedance)


Single-ended (SE) signals

• One signal wire for each input signal

• Can be used for the following conditions:


– High-level input signals (greater than 1 V)
– Short cables
– Properly-shielded cables or cables traveling through a noise-free
environment
– All input signals can share a common reference point (ground)
Differential (DIFF) signals
• Two signal wires for each input signal (input and return signals)
• The measurement is the voltage difference between the two wires
• Recommended for the following conditions:
– Low-level signals (less than 1 V)
– Long cables
– The input signal requires a separate ground-reference point or return signal
– The signal leads go through a noisy environment
• DAQ devices with instrumentation amplifiers can be configured as differential
measurement systems
• Any voltage present at the instrumentation amplifier inputs with respect to the
amplifier ground is called a common-mode voltage
• The instrumentation amplifier rejects common-mode voltage and common-mode
noise
Signal conditioning
• Signal conversion
– E.g. current-voltage converter
• Amplification
• Attenuation
– Voltage divider
• Filtering
– Anti-aliasing

Typically at least two of these are required before analog-to-digital


conversion …
Amplification
– Used on low-level signals (less than around 100 mV ).
– Maximizes use of Analog-to-Digital Converter (ADC) range and
increases accuracy.
– Increases Signal to Noise Ratio (SNR).
E.g. -5 V to +5 V
Noise
Amplifier
1 mV

10 mV
+ 10V
_ 1000 ADC
Lead Wires

Low-Level Signal External


Amplifier DAQ Device

SNR = Vsignal/Vnoise = (10 mV * 1000) /1 mV = 10 000


Sampling Considerations
– An analog signal is continuous

– A sampled signal is a series of


discrete samples acquired at a
specified sampling rate

– The faster we sample the more


our sampled signal will look like
our actual signal
Actual Signal
– If not sampled fast enough a
problem known as aliasing will
occur

Sampled Signal
Aliasing

Adequately
Sampled
Signal
Signal

Aliased
Signal

Aliasing refers to a misrepresentation of the signal frequency due


to undersampling of the signal.
Sampling & Nyquist’s Theorem
• Nyquist’s sampling theorem:
– The sample frequency should be at least
twice the highest frequency contained in the
signal
• Or, more correctly: The sample frequency fs should Δf
be at least twice the bandwidth Δf of your signal 0

• In mathematical terms: fs ≥ 2 *Δf, where f


Δf = fhigh – flow

• However, to accurately represent the shape of the ECG signal


signal, or to determine peak maximum and peak
locations, a higher sampling rate is required
– Typically a sample rate of 10 times the bandwidth of
the signal is required.

Illustration from wikipedia


Aliasing shown in the frequency domain

A system that has a sampling frequency fs (a) will digitize signals with
frequencies below fs/2 as well as above. Input signals below fs/2 will be
reliably digitized while signals above fs/2 will be folded back (b) and appear
as lower frequencies in the digital output according to faliased = |fin – N*fs |

Need to remove all signal frequencies above fs/2 using an


analog low-pass filter before the sampling in the ADC
Filter parameters

A filter will affect the phase of a signal, as well as the amplitude!


Filtering example

In post-processing (non-real
time) a zero-phase digital
filter can be used, by
processing the input data in
both the forward and reverse
directions

Example from MathWorks Matlab


Bessel

Analog filters
• Some common filter characteristics
– Butterworth (no rippel)
– Chebyshev
– Bessel (constant group delay = linear
phase in pass band)
– Elliptic

– Select filter characteristics according to DAQ


system specification/requirements

– Analog filters can be made using a Sallen-Key


architecture (see next slide)
– Multiple 2. order elements can be
connected together to create a
n. order filter.
Extra

2. order Sallen-Key - Active analog filter


Structure

WEBENCH

LP HP
Extra

Switched-Capacitor Filter
• Can be suitable as an ADC anti-aliasing filter if you build your
own electronics
• Be aware of possible clock noise (add RC-filters before and after)
• The corner frequency (cut-off) fc is “programmable” using an
external clock
• Example:
– MAX7400 8th-order,lowpass, elliptic filter
– MAX7400 has a transition ratio (fs/fc) of 1.5 and a typical stop band
rejection of 82dB
ADC architectures

• Multiplexed sampling
– Gives a time delay
between channel sampling

• Simultaneous
sampling
– One ADC, multiple
Sample-and-Hold registers
– Multiple ADCs
– Important for phase
measurements
ADC resolution
• The number of bits used to represent an analog signal determines the
resolution of the ADC
• Larger resolution = more precise representation of your signal
• The resolution determine the smallest detectable change in the input
signal, referred to as code width or LSB (least significant bit)

16-Bit Versus 3-Bit Resolution


(5kHz Sine Wave)
10.00
111
8.75
110 16-bit resolution
7.50
101
6.25
Amplitude 100 3-bit resolution
5.00
Example: (volts) 011
3.75
010
2.50
001
1.25
000
0| | | | |
0 50 100 150 200
Time (ms)
ADC accuracy
• Common ADC errors:
– Noise
– Linearity error
– Gain error
– Offset error
– Quantization (resolution error)
• Less than LSB/2
Digital signals: Bits, dynamic range,
and SNR
• SNR = signal to noise ratio
• The number of bits used
determines the maximum
possible signal-to-noise ratio
• Using the entire ADC range
(using an amplifier) increases
the SNR
• The minimum possible noise
level is the error caused by
the quantization of the signal,
referred to as quantization
noise.
ADC oversampling

• Oversampling means to sample faster than the Nyquist rate fnyquist,


which is given by fnyquist = 2 *Δf, where Δf = fmax - fmin

• The SNR of an ideal N-bit ADC (due to quantization effects) is:

SNR(dB) = 6.02*N + 1.76


ADC oversampling II
• If the sampling rate fs is increased above fnyquist, we get the following
SNR: SNR(dB) = 6.02*N + 1.76 + 10* log (OSR),
10
where OSR = fs/fnyquist

• Oversampling makes it possible to use a simple RC anti-aliasing


filter before the ADC.
• After A/D conversion, perform digital low-pass filtering and then
down sampling to fnyquist
• Effective resolution with oversampling Neff = N + 1/2 *log2 (fs/fnyquist),
where N is the resolution of an ideal N-bit ADC at the Nyquist rate
– If OSR = fs/fnyquist = 1024, an 8-bit ADC gets and effective resolution
equal to that of a 13-bit ADC at the Nyquist rate
Extra

Examples:

Advanced Analog-Front-End (AFE) for data acquisition

If you need to build your own DAQ electronics ….


Extra

Generic AFE (analog front end)


Amplifier with LPF = Low-pass filter
automatic gain FDA = Fully differential amplifier
control (AGC) /
Programmable
gain amplifier
e.g. an FDA Anti aliasing,
noise limiting

DIFF ADC

Buffer, to give a low impedance


output
e.g. VCOM = Vref/2
Voltage reference (e.g. 4.096 V)
Extra

Advanced AFE based on FDA


• Low-noise design
• 24-bit Sigma-Delta differential ADC
– Oversampling, low-pass filtring (FIR) and down-sampling (to Nyquist) in one circuit.
• Fully differential amplifier
– Can attenuate or amplify the signal, offset the signal and convert from SE to
DIFF.
• Minimize the number of components (and board space required)
– AGC / Programmable gain amplifier «replaced» by max range (e.g. +/- 20 V) and high
resolution (24 bit).

Buffer FDA LP-filter (RC) DIFF ADC FPGA / MCU

+ +
G=1

- -
Gain of 0.1 SPI
VOCM
(attenuation) to 1,
or > 1
Extra

FDA example for DAQ


Extra

FDA use example

VCOM is offset voltage from ADC

27
Extra

FDA ADC
Buffer (G = 1)
LP-filter

24V input

Note: AFE powered from


Low-dropout (LDO)
linear regulator to reduce
noise. DC-DC regulators used
first to reduce heat generation

Optimized Analog Front-End DAQ System Ref Design for 18-Bit SAR Data Converters (Rev. A)
Extra

Isolated DAQ
Extra

Isolated DAQ

• DAQ systems can use isolation in the signal chain because it


breaks ground loops, thereby improving measurement accuracy
and safety.

• But digital isolation can give design challenges for high


resolution (>16 bits), high speed (>1 MSPS) DAQ.

18-Bit, 2-MSPS Isolated Data Acquisition Reference Design for Maximum SNR and Sampling Rate (Rev. A)
Extra

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