EC8095 Syllabus
EC8095 Syllabus
EC8095 Syllabus
3003
OBJECTIVES:
MOS Transistor, CMOS logic, Inverter, Pass Transistor, Transmission gate, Layout Design
Rules, Gate Layouts, Stick Diagrams, Long-Channel I-V Charters tics, C-V Charters tics,
Non ideal I-V Effects, DC Transfer characteristics, RC Delay Model, Elmore Delay, Linear
Delay Model, Logical effort, Parasitic Delay, Delay in Logic Gate, Scaling.
Circuit Families: Static CMOS, Ratioed Circuits, Cascode Voltage Switch Logic, Dynamic
Circuits, Pass Transistor Logic, Transmission Gates, Domino, Dual Rail Domino, CPL,
DCVSPG, DPL, Circuit Pitfalls.
Static latches and Registers, Dynamic latches and Registers, Pulse Registers, Sense Amplifier
Based Register, Pipelining, Schmitt Trigger, Monostable Sequential Circuits, Astable
Sequential Circuits.
Arithmetic Building Blocks: Data Paths, Adders, Multipliers, Shifters, ALUs, power and
speed tradeoffs, Case Study: Design as a tradeoff.
Designing Memory and Array structures: Memory Architectures and Building Blocks,
Memory Core, Memory Peripheral Circuitry.
FPGA Building Block Architectures, FPGA Interconnect Routing Procedures. Design for
Testability: Ad Hoc Testing, Scan Design, BIST, IDDQ Testing, Design for
Manufacturability, Boundary Scan.
TOTAL : 45 PERIODS
OUTCOMES:
TEXT BOOKS:
1. Neil H.E. Weste, David Money Harris ―CMOS VLSI Design: A Circuits and
Systems Perspective‖, 4th Edition, Pearson , 2017 (UNIT I,II,V)
2. Jan M. Rabaey ,Anantha Chandrakasan, Borivoje. Nikolic, ‖Digital Integrated
Circuits:A Design perspective‖, Second Edition , Pearson , 2016.(UNIT III,IV)
REFERENCES