Scribd
Upload
75 views4 pages

B.Tech Digital Electronics (ELPC-401)

This document appears to be an exam paper for a Digital Electronics course. It contains: 1) Instructions for the exam, which is divided into two parts - Part A with short answer questions, and Part B with longer answer questions. 2) Part A contains 10 short answer questions worth 1.5 marks each, covering topics like clock function in sequential circuits, race around condition, counter types, logic families, ASCII code, ROM types, edge vs level triggering, DAC resolution, 2's complement, and error correcting codes. 3) Part B contains 7 longer answer questions worth up to 8 marks each, involving topics like modulo-5 counter design, logic minimization, binary-decimal conversions,

Uploaded by

Parag Rao
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
75 views4 pages

B.Tech Digital Electronics (ELPC-401)

This document appears to be an exam paper for a Digital Electronics course. It contains: 1) Instructions for the exam, which is divided into two parts - Part A with short answer questions, and Part B with longer answer questions. 2) Part A contains 10 short answer questions worth 1.5 marks each, covering topics like clock function in sequential circuits, race around condition, counter types, logic families, ASCII code, ROM types, edge vs level triggering, DAC resolution, 2's complement, and error correcting codes. 3) Part B contains 7 longer answer questions worth up to 8 marks each, involving topics like modulo-5 counter design, logic minimization, binary-decimal conversions,

Uploaded by

Parag Rao
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

Roll No Total Pages 4

307401
May, 2019
B.Tech. IV SEMESTER
Digital Electronics (ELPC-401)

Time 3 Hours Max. Marks 75

Instructions
1. It is compulsory to answer all the questions (1.5 marks
each) of Part-A in short.
Answer any four questions from Part-B in detail.

3 Different sub-parts of a question are to be attempted


adjacent to each other

PART-A
1. (a) What is the function of clock in sequential circuits?
(1.5)
(b) What is race around condition? (1.5)
(C) Differentiate between ripple and synchronous counter.
(1.5)
d) Which logic family has highest speed of operation?
(1.5)
(e) What is the significance of ASCIl code? (1.5)

307401/220/111/158 (PTO
165
What are the various types of Read only memories?
(1.5)
Differentiate between edge triggering and level
triggering. (1.5)
(h) What is the resolution in volts of a 10-bit D/A
Converter whose full scale output is 5V ? (1.5)
) Perform (20-42) using 2's complement method. (1.5)
) What are various types of error correcting codes?
(1.5)

PART-B
2. (a) Design and implement a Mod-5 up/down counter
using JK-Flip Flop. (7)
(b) Simplify the logic function using Quine-McCluskey
method.
F(A. B. C. D) = Em(1, 2, 3, 8, 9) (5)
(C) Convert the following:
(2A6)1= ()10
(10011.101), = (?)16

22110 () (3)

3. (a) Write short notes on PLA and PAL. (8)


(b) Simplify the logic expression using K-map
F(A, B, C, D) Em (0. 1, 5, 7. 10, 14) d(2, 4).
=
+

(4)
7) using 3 8
(c) Implement Y(A, B, C) =Em(0, 4, 5,
line decoder. (3)

307401/220/111/158 2
4. (a) Diseuss in detail the different types of shift
egisters. (5)
(b) Convert S-R to T Flip Flop. (5)
(C)Implement (A + CXA + DXA + B C) using
NOR gates only. (5)

5. (a) Design a combinational circuit for a common anode


display BCD to 7 segment code converter (8)
(b) With a neat circuit diagram explain the operation of a
Successive Approximation type A/D converter. (7)

6. (a) Explain the following terms:

() Fan in.
(i) Fan out.

(ii) Propagation delay.


(iv) Tristate logic.

(V) Hold time. 5)


(b) With the help of truth table, explain the working of
J-K Master-slave flip flop. (5)
(c) Simplify the following expression
) Z = A[B + C(AB + AC)]

() Z= 5)

307441/20/111/158 3 P.TO.
7. (a) Explain the working of a basic TTL NAND gate with

a neat diagram. Explain the following output

configurations
)) Open collector output.
(i) Totem pole output. (8)
(b) Implement following Boolean function using 8:T
multiplexer
FA, B, C, D) =
Zm(0, 1, 3, 4, 5, 8, 9, 15) (7)

307401/220/111/158 4

You might also like