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Soluciones 4

This document lists errata for problems in the textbook "Design of Analog CMOS Integrated Circuits" by Behzad Razavi. It provides over 30 corrections to equations, figures, parameters, and wording in various example problems throughout 13 chapters of the textbook. The corrections cover a wide range of issues to improve the accuracy and clarity of the practice problems.

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34 views13 pages

Soluciones 4

This document lists errata for problems in the textbook "Design of Analog CMOS Integrated Circuits" by Behzad Razavi. It provides over 30 corrections to equations, figures, parameters, and wording in various example problems throughout 13 chapters of the textbook. The corrections cover a wide range of issues to improve the accuracy and clarity of the practice problems.

Uploaded by

manu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Design of Analog CMOS Integrated Circuits

Behzad Razavi

Errata in Problem Sets

Chapter 2  In Problem 7.20, change ID1 and ID2 to 0.05 mA.


 In Eq. (2.44), n must be in the numerator.  In Problem 7.24, change the bias current to 0.1 mA.
Chapter 3 Chapter 8
 Call the third problem 3.2’.  In Problem 8.10, change the tolerable gain error to 5%.
 In Problem 3.2, Fig. 3.68(d), change the gate voltage of M2  In Problem 8.15, Fig. 8.55(b), call label the top Gm block
to Vb2 . Gm2. The output is at the output nodes of Gm2 .
 In Problem 3.4, Fig. 3.71(a), change the gate voltage of Chapter 10
M= 1 to Vb1 .  In Problem 10.11, change ISS to 0.25 mA and (W=L)5;6 to
 In Fig. 3.72(e), Vb1 must be changed to Vin . 60/0.5.
 In Fig. 3.73(h), the output is at the source of M2 .  In Problem 10.12, add: Maximize VGS 14 = VGS 15 while
 In Problem 3.10(c), the question must be phrased as: Which leaving at least 0.5 V across I1 . Also, in part (b), change M2
device enters the triode region first as Vout falls? to M1 .
 In Problem 3.13, first sentence should read: ... with W=L =  Problem 10.17 should read: ... between the gate and the
50=0:5 ... drain of M2 or M3 .
 In Problem 3.16(a), do not neglect channel-length modula-  In Fig. 10.42, change the gate voltage of M3;4 to Vb1 .
tion in the triode region.  In Problem 10.19(c), change A0 in the numerator to A.
Chapter 4 Chapter 11
 In Problem 4.2, assume ISS = 1 mA and change part (a) to:  In Problem 11.13, ... such that the circuit operates with
Determine the voltage gain. VDD = 3 V.
 In Problem 4.6, assume  = 0.  In Problems 11.17 and 11.18, the top terminal of R2 should
 In Problem 4.9, assume  = = 0. be connected to the top terminal of R1 .
 In Problem 4.11, assume ID5 = 20 A.  In Problem 11.22, assume K = 4.
 In Problem 4.13, change the figure number to 4.8(a). Chapter 12
Chapter 5  In Problem 12.8, assume CH = 1 pF.
 In Problem 5.16(d), assume VTH does not vary with tem-  In Problem 12.12, assume all switches are NMOS devices.
perature.  In Problem 12.14, assume Cin = 0:2 pF and calculate C1
Chapter 6 and C2 .
 In Problem 6.4(b) and (d), assume  = 6 0.  In Problem 12.16, the output is sensed at the drains of M1
Chapter 7 and M2 .
 The second sentence of Problem 7.2 should read: Assume Chapter 13
(W=L)1 = 50=0:5; ID 1 = ID 2 = 0:1 mA ...  In Problem 13.5, change the figure number to 13.6(a).

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