3340 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO.

3, MARCH 2023

Decomposed Nearest Level PWM Method With

Reduced Switching Frequency for MMC
Zhen Wang , Graduate Student Member, IEEE, Li Peng , Senior Member, IEEE, and Jiawei Zhang

Abstract—For modular multilevel converters in medium-voltage proven feasible in actual projects [4], [5], [6], [7], [8], [9],
applications, the nearest level pulse width modulation (NL-PWM), [10], [11], [12], [13], [14]. These methods can offer low har-
which combines the nearest level modulation (NLM) with pulse monic distortion if SM capacitor voltages are well-balanced,
width modulation (PWM), has the advantage of better harmonic
characteristics over conventional NLM. However, the introduction but still have limitations in some aspects. In the conventional
of high-frequency PWM also results in a significant increase in CPS-PWM [4], hierarchical control is adopted and the relatively
switching frequency. To solve this issue, a decomposed NL-PWM low weight of individual balancing control loop results in a
method is proposed in this article. By properly allocating the slow response of voltage balancing. In [6], the driving pulses
rising edge and falling edge of PWM to two different SMs, the generated by CPS-PWM were reassigned to SMs based on
capacitor voltage differences can be decreased more efficiently. On
this basis, the allocation priority of different switching transitions is their contributions to capacitor charge transfer in each carrier
quantitatively analyzed, and then a new voltage-balancing strategy period. Since the change of modulation signals during a carrier
involving five switching modes is proposed. Moreover, to achieve a period is ignored, the pulse reallocation may be inappropriate.
good tradeoff between voltage-balancing effect and switching loss, Besides, the average switching frequency is increased due to
the relationship between voltage threshold and switching frequency the step change of driving signals at the moment of pulse
under the proposed method is also derived. Finally, the comparative
simulation and experimental results demonstrate the superiority of reallocation. The pulse reallocation methods have also been
the proposed method in different aspects of performance. adopted in PD-PWM [8], [9], and similarly the requirements for
voltage balancing and switching frequency are hard to satisfy
Index Terms—Decomposed nearest level pulse width modulation
(NL-PWM), modular multilevel converter (MMC), reduced
simultaneously. In addition, for multicarrier PWM, once any
switching frequency, voltage balancing. SM is in failure and isolated, the periods, phase-shifted angles,
or amplitudes of carriers need to be regulated accordingly [12],
I. INTRODUCTION [13], [14], which increases the complexity of implementation.
Meanwhile, in order to expand the applicability of NLM in
ECENTLY, the modular multilevel converter (MMC) is
R developing rapidly and gaining popularity in medium-
or high-voltage applications due to its advantages of high ef-
MMC, several improvements were put forward in [15], [16],
[17], [18], [19], [20], [21], [22], [23], [24]. These researches pro-
vide more choices of modulation for MMC with a small number
ficiency, superior output waveforms, and fault-tolerant capabil-
of SMs, especially considering the limitations of multicarrier
ity [1], [2], [3], etc. To fully exert these advantages, the control
PWM. By defining a new rounding function and staggering
strategy of MMC is especially crucial in which the modulation
switching actions in upper and lower arms, the level number of
method is the key to determining final performance. When the
output voltage under NLM can be increased from N + 1 (where
number of submodules (SMs) in MMC is relatively small, the
N is the number of SMs per arm) to 2 N + 1 without increasing
non-negligible staircase approximation error of conventional
switching frequency [15]. On this basis, small offsets were
nearest level modulation (NLM) will result in poor quality of
added to the voltage references in [16], thus reducing the output
output waveforms; thus, the multicarrier pulse width modulation
harmonics as well as restraining capacitor voltage fluctuations.
(PWM) is more preferable.
Focusing on the optimization of circulating current, the small
Among various configurations of multicarrier PWM, carrier
offset was replaced by a small second-order harmonic control
phase-shifted PWM (CPS-PWM) and phase disposition PWM
term in [17]. When selecting proper sampling frequency and
(PD-PWM) are most commonly discussed in the literature and
inserted term, the second-order harmonic of circulating current
can almost be eliminated.
Manuscript received 18 May 2022; revised 22 September 2022; accepted 23 By adopting the aforementioned level-increased NLM meth-
October 2022. Date of publication 14 November 2022; date of current version
26 December 2022. This work was supported by the National Natural Science ods, control performance of MMC can be obviously enhanced,
Foundation of China under Grant 51577078. Recommended for publication by especially when the number of SMs is small. However, com-
Associate Editor F. Dijkhuizen. (Corresponding author: Li Peng.) pared to CPS-PWM, the deficiency of NLM in waveform quality
The authors are with the State Key Laboratory of Advanced Electromagnetic
Engineering and Technology, School of Electrical and Electronic Engineering, is still non-negligible due to the limitation of modulation accu-
Huazhong University of Science and Technology, Wuhan 430074, China (e-mail: racy. Thus, the nearest level PWM (NL-PWM), which combines
[email protected]; [email protected]; [email protected]). NLM with PWM, is presented and discussed in [19], [20], [21],
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TPEL.2022.3219470. [22]. To some extent, the NL-PWM is equivalent to PD-PWM
Digital Object Identifier 10.1109/TPEL.2022.3219470 with specific carrier frequency (equal to control frequency) and

0885-8993 © 2022 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3341

flexible reallocation of switching pulses. After introducing high-

frequency PWM, the low-order harmonics of output waveforms
are almost eliminated, but meanwhile the switching frequency
and switching losses are greatly increased. To avoid unnecessary
switching actions, a five-segment switching sequence was de-
signed in [21], but the control performance relies highly on the
parameter accuracy. In [22], by replacing the triangle carrier with
rising or falling sawtooth, the switching frequency of NL-PWM
can be obviously decreased, but more harmonics are inevitably
caused by irregular sawtooth.
Therefore, although NL-PWM can achieve even lower output
harmonics than that under CPS-PWM [20], the unresolved issue
of high switching frequency restricts its application to a great ex-
tent. Referring to NLM [25], [26], [27], [28], [29], the switching
frequency of NL-PWM can also be reduced by modifying the
voltage-balancing strategy. One typical way is to set a voltage Fig. 1. (a) One phase of MMC. (b) Principle of conventional NL-PWM.
threshold that determines the additional switching transitions.
Taking [27] as an example, if the maximum voltage difference
among SM capacitors exceeds the threshold, the switching times
are equal to the variation of inserted SM number; otherwise, all
the SMs should be inserted or bypassed in the order of voltage
sorting. However, except the SMs with the highest and lowest
voltages, the voltage differences among the other SMs may be
small and the associated switching transitions are unnecessary
for voltage balancing. Another way is to arrange fixed or ad-
justable number of SMs to switch in different control cycles.
However, it is primarily suited to high-voltage applications.
Besides, since there exist at least three switching modes in
NL-PWM, the NLM-based strategies cannot be simply used for
NL-PWM.
In this article, a decomposed NL-PWM method is proposed
for MMC. Unlike the conventional NL-PWM, the rising edge
and falling edge of PWM can be assigned to two SMs, and
totally five switching modes are involved. Through such fully
utilization of PWM, the voltage differences of SM capacitors
can be decreased more efficiently. Furthermore, an improved Fig. 2. Comprehensive control strategy of MMC.
NL-PWM-based voltage-balancing strategy is proposed. In each
control period, SMs are paired up according to the voltage buffer inductor. For any arm, the required insertion index narm
relationship and previous switching states. Except for essential is equal to the required arm voltage (uxp or uxn , x = a, b, c)
switching transitions, the paired SMs exchange the switching divided by the average capacitor voltage. The acquisition of
states only if the corresponding voltage difference exceeds the uxp or uxn is shown in Fig. 2. In most cases, narm is not an
preset threshold. The allocation priority of essential PWM- integer, and therefore low-frequency staircase modulation and
up and PWM-down, essential insertion/bypass, and additional high-frequency PWM are combined to achieve the equivalent
state exchange is based on quantitative analysis of the voltage- insertion in the conventional NL-PWM. As shown in Fig. 1(b),
balancing effect contributed by different types of switching nnlm SMs operate in inserted mode and one SM operates in PWM
transitions. Consequently, the switching frequency can be signif- mode with duty cycle of dpwm , where nnlm and dpwm are obtained
icantly reduced under the prerequisite of guaranteeing effective by
voltage balancing. Besides, the relationship between voltage 
threshold and switching frequency under the proposed method is nnlm = floor(narm )
derived to provide a guideline for determining voltage threshold. (1)
dpwm = narm − floor(narm )
Both the simulation and experimental results demonstrate the
validity and superiority of the proposed method. where the function floor(x) returns the largest integer less than
or equal to x.
II. CONVENTIONAL NL-PWM Similar to NLM-based methods, voltage balancing of SM
capacitors can be easily implemented in the conventional NL-
A. Basic Principle
PWM. The N SMs in each arm are first sorted in ascending
Fig. 1(a) shows one phase of MMC in which the upper and (if the arm current iarm ≥ 0) or descending order (if iarm < 0)
lower arms are both formed by N series-connected SMs and a of their capacitor voltages. Then, the first nnlm SMs will be

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 3342 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 3, MARCH 2023

is close to zero, the capacitor voltage variations caused

by switching transitions can be neglected (see Fig. 3).
Similar to conventional NLM, this results in the increased
switching frequency and subsequently undesirable losses.
Therefore, the switching frequency and voltage-balancing
effect under the conventional NL-PWM are not satisfactory. If
the sorted list is updated more frequently, the voltage imbalance
can be avoided to some extent while higher switching frequency
is required. To reveal the essence of the problem, the switching
transitions are divided into three types in this article: 1) essential
Fig. 3. Typical issues of conventional NL-PWM. NLM part; 2) essential PWM part; and 3) additional part. The
essential NLM part is caused by the variation of nnlm , and the
number of this part in a control period is equal to |nnlm − nnlm1 |.
inserted, the (nnlm + 1)th SM will operate in PWM mode, and The essential PWM part is caused by the rising edge and falling
the other SMs will be bypassed. The frequent reallocation of edge of PWM, and the number of this part in a control period is
three switching modes ensures small voltage difference, but always equal to 2, unless dpwm = 0. Except for these two parts,
results in high switching frequency and subsequently switching all the other switching transitions are classified as the additional
losses that are undesirable. Thus, to mitigate the increase of part. Obviously, the key of modifying NL-PWM is to reduce the
switching frequency, the voltage sorting is activated only when additional part with no or little sacrifice of voltage-balancing
nnlm = nnlm1 (where nnlm1 is equal to nnlm of last control period) effect. To achieve this target, all the switching transitions need
in [20]. to be better utilized for voltage balancing.

B. Characteristic Analysis III. DECOMPOSED NL-PWM

For the convenience of quantitative analysis, the power factor A. Acquisition of New Switching Modes
cos ϕ, modulation index m, and the ripple ratio of capacitor
voltages ε are set as 0.9, 0.8, and 0.1, respectively, here. Then, Combining with Fig. 1(b), the number of essential NLM part
referring to [30], the expression of SM capacitance can be and essential PWM part in a fundamental period (denoted by
obtained as T1 ) can be expressed as
     
S  m cos ϕ 2 1.5 1+m 1−m
C= 1− Nnlm = 2 floor N − floor N (3)
3ωmN εUc2 2 2 2
Idc Npwm = 2 T1 /Ts (4)
= (2)
92.85Uc
where m and Ts denote the modulation index and sampling
where S, Uc , and Idc denote the capacity, rated SM voltage, and period, respectively. If N = 20, m = 0.8, T1 = 20ms, and Ts =
dc-side rated current of MMC, respectively, and ω is the angular 0.2ms, Nnlm and Npwm can be calculated as 32 and 200. When
frequency, which is equal to 100π assuming the grid standard N is smaller, the ratio of Npwm and Nnlm will be larger. This
frequency is 50 Hz. indicates the PWM part should play a crucial role in voltage
Using the abovementioned parameter configuration, the balancing if pursuing reduced switching frequency in medium-
voltage-balancing strategy in the conventional NL-PWM leads voltage applications.
to the following two different consequences. For conventional NL-PWM, one SM is selected to operate in
1) When nnlm = nnlm1 : All the SMs maintain the previous PWM mode if dpwm = 0. As shown in Fig. 4(a), the capacitor
switching modes (i.e., inserted mode, bypassed mode, or voltage variation caused by PWM, Δupwm , is dpwm iarm Ts /C
PWM mode). If N is relatively small (e.g., N = 10), this (where iarm and C denote the arm current and SM capacitance,
situation may last for several milliseconds during which respectively). That is, if considering only the role of PWM, the
the capacitors of inserted SMs are charged/discharged maximum decrease of ΔUmax (denoting the maximum voltage
too much, and thus resulting in the major imbalance of difference of SM capacitors) is |dpwm iarm Ts /C|.
capacitor voltages. As shown in Fig. 3, when N = 10, nnlm Actually, the realization of PWM can be more flexible, and
remains unchanged during t1 ∼ t2 . Combining with (2), thus a decomposed NL-PWM method is proposed in this article.
the maximum capacitor voltage variation of inserted SMs As shown in Fig. 4(b), the rising edge and falling edge of PWM
during this period is approximately 0.5Uc . Such significant are assigned to a bypassed SM and an inserted SM; thus, two
voltage imbalance threatens the stable operation of MMC new switching modes are generated: 1) PWM-up mode; and
seriously. 2) PWM-down mode. Compared with the original states (i.e.,
2) When nnlm = nnlm1 : All the SMs participate in the allo- no switching transitions), charging time of the two SMs is, re-
cation of three switching modes. Even if the voltage dif- spectively, increased and decreased if iarm > 0. Specifically, the
ferences among some SMs are very small, their switching voltage variations caused by PWM-up and PWM-down (denoted
modes may also change. Especially when the arm current by Δuup and Δudn , respectively) are (dpwm + 1)iarm Ts /2 C

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3343

Fig. 5. Correspondence among the initial switching states, switching modes,

and types of switching transitions under decomposed NL-PWM.

Fig. 4. Different ways to generate PWM signal. (a) Conventional NL-PWM.

(b) Decomposed NL-PWM.

and (dpwm − 1)iarm Ts /2 C, respectively. Thus, the maximum

decrease of ΔUmax is |Δudn − Δuup |, i.e., |iarm Ts /C|. This
indicates that the decomposition of PWM helps to balance ca-
pacitor voltages more efficiently. Furthermore, lower switching Fig. 6. Principle of SM sorting and pairing.
frequency can be achieved, which will be elaborated in the
following section.
with the same initial switching state, they are always sorted
in ascending order of capacitor voltages. Then, based on the
B. Improved Voltage-Balancing Strategy for Decomposed
sorted list R[1] ∼ R[N ], SMs with different initial switch-
NL-PWM ing states (inserted/bypassed) are paired off, i.e., SMR[1] and
According to the abovementioned analysis, the introduction of SMR[N ] , SMR[2] and SMR[N −1] , . . .. Apparently, the number
PWM-up mode and PWM-down mode can greatly enhance the of SM pairs is equal to min{nnlm1 , N − nnlm1 } and the volt-
voltage-balancing effect contributed by the essential PWM part. age differences satisfy a relation uR[N ] − uR[1] > uR[N −1] −
But, this conclusion is based on the assumption that the switch- uR[2] > · · · (where ui denotes the capacitor voltage of SMi ,
ing modes are properly allocated to SMs. Therefore, to maximize i = 1, 2, . . . , N ). Thanks to the parallel computing capability
the advantages of decomposed NL-PWM, an improved voltage- of field programmable gate array (FPGA) and bitonic sorting
balancing strategy involving new switching modes is proposed algorithm [31], the sorting and pairing process in each control
in this section. period can be implemented within hundreds or even tens of
For the MMC in medium-voltage applications, the perfor- nanoseconds [log2 N ·(log2 N +1)/2 clock cycles], which indi-
mance degradation caused by control delay is not evident in cates the computational burden of this stage is light.
general. If considering the control delay in the analysis, the initial 2) Priority Evaluation of Switching Transitions: For each
switching states described during the control period Tk ∼ Tk+1 SM pair, if the switching states remain unchanged in this control
may correspond to the actual switching states at Tk+1 . This re- period, the relative voltage variation |iarm Ts /C| over this period
sults in poor readability and possible ambiguity when describing may enlarge the voltage difference. Consequently, the voltage
some variables. Therefore, similar to most of the literature, the difference may exceed the allowable limit Uth . Such case can
control delay is ignored here for simplicity and clarity. be avoided if one or more switching transitions are allocated to
The proposed strategy will be elaborated according to the the corresponding SM pair. For the SM pair selected to operate
specific procedure, which is given as follows. in PWM-up and PWM-down modes, the voltage difference can
1) SM Sorting and Pairing: As mentioned in Section II, be reduced by |iarm Ts /C| at most, which has been analyzed
the additional part of switching transitions never changes the in Section III-A. For the other types of switching transitions,
total number of inserted SMs. Therefore, the additional part the similar conclusion can be obtained, as shown in Fig. 7.
is always characterized by exchanging switching states (in- Thus, when the additional switching transitions are required,
serted/bypassed) of SMs, whether the state exchange is active they should be allocated to the SM pairs with relatively large
or passive. Combining this with the previous description, the voltage difference (i.e., the SM pair SMR[1] and SMR[N ] has the
correspondence among the initial switching states, switching highest priority).
modes, and types of switching transitions under decomposed The voltage-balancing effects contributed by essential in-
NL-PWM can be summarized, as shown in Fig. 5. sertion/bypass and essential PWM-up and PWM-down seem
To match the paired transitions in essential PWM part or the same (|iarm Ts /C|) in the current period, but actually there
additional part, SMs are first sorted and paired off, as shown exists distinct difference. Assuming that no switching transitions
in Fig. 6. When iarm ≥ 0, the sorting priority of previously occur on the relevant SMs afterward, voltage difference of the
bypassed SMs is higher, otherwise the opposite. For SMs SM pair selected for PWM-up and PWM-down can be further

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 3344 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 3, MARCH 2023

is probably SMR[4] and SMR[N −2] (where R[4] and R[N − 2]

correspond to the sorting list at Tk ). Therefore, the following two
cases should be considered for determining additional switching
transitions.
a) Step 1: Determine the minimum k satisfying
uR[N −k] − uR[k+1] ≤ Uth − |iarm Ts /C| (0 ≤ k < Np ,
where Np denotes the number of SM pair, equal to
min{nnlm , nnlm1 , N − nnlm , N − nnlm1 }). If there is no
analytical solution, k will be taken as Np . To avoid
excessive computation overhead, the binary search
method can be adopted here. Then, calculate the number
of essential insertion/bypass (denoted by a), the number
of essential PWM-up and PWM-down (denoted by b) and
the sum of the two, which can be expressed as

λ=a+b
= |nnlm − nnlm1 | + ceil(dpwm ) (6)

where the function ceil(x) returns the smallest integer

Fig. 7. Voltage-balancing effect contributed by the following terms. (a) Ad- more than x.
ditional state exchange. (b) Essential PWM-up and PWM-down. (c) Essential b) Step 2: If a = 0, the number of additional state exchange
insertion. (d) Essential PWM (in conventional NL-PWM) when iarm ≥ 0.
c is equal to k − λ (k > λ) or 0 (k ≤ λ); otherwise, c is
given by
decreased, while the essential insertion/bypass results in the 
identical switching state of the SM pair [see Fig. 7(b) and (c)]. max{k − λ, 0}, if uR[N −k+a] −uR[k+1] ≤ Uth
Thus, the allocation priority of essential NLM and PWM parts c=
max{k − λ + 1, 0}, if uR[N −k+a] −uR[k+1] > Uth
can be obtained.
(7)
3) Specific Implementation of Switching Transitions: Since
where Uth = Uth − |iarm Ts /C| and iarm · (nnlm − nnlm1 ) is
the essential NLM and PWM parts can be easily obtained by
assumed as a positive value.
nnlm , dpwm , and nnlm1 , the next key step is to determine the
After obtaining a, b, and c, the three types of switching
number of additional state exchange. Assuming the maximum
transitions will be allocated to SMs according to the priority.
voltage difference ΔUmax is restricted within the preset threshold
For example, assuming that N = 20, nnlm = 9, dpwm = 0.2,
Uth and the switching states of all SMs during Tk ∼ Tk+1 remain
nnlm1 = 8, iarm > 0, k = 3, and uR[N −2] − uR[4] > Uth , two
unchanged, ΔUmax at Tk+1 should satisfy
additional state exchanges are required, which are allocated
ΔUmax ≤ Uth + |iarm Ts /C| (5) to SMR[1] and SMR[N ] and SMR[2] and SMR[N −1] . Besides,
SMR[3] and SMR[N −2] operate in PWM-up and PWM-down
where the variation of iarm within several consecutive control modes, respectively; one essential insertion is allocated to
periods is ignored. Generally, Uth is chosen around 0.5εUc and SMR[4] . In this way, the voltage difference between any two SMs
always larger than |iarm Ts /C| [27]. Combining with Fig. 7, the in pair is effectively restricted within Uth . The whole procedure
voltage difference of each SM pair at Tk+1 can be restricted of the proposed strategy is shown in Fig. 8.
within Uth by any type of switching transitions under decom- 4) Consideration of Special Cases: Since the decomposition
posed NL-PWM. In contrast, if adopting the conventional PWM of PWM requires at least one bypassed SM and one inserted SM,
mode, the voltage difference may still exceed Uth (ΔUmax − there exist some special cases. When nnlm1 = 0, N or nnlm = 0,
|dpwm iarm Ts /C| > Uth ) and additional switching transitions are the rising edge and falling edge of PWM cannot be assigned to
necessary for voltage balancing. For such cases, two additional two SMs [see Fig. 4(b)]. Instead, the conventional PWM mode
switching transitions can be avoided by the decomposition of [see Fig. 4(a)], as the fifth switching mode in the proposed
PWM. This is one of the reasons that switching frequency can strategy, will be assigned to one selected SM. In such cases,
be reduced with the proposed method (the paired operation of since there is no SM pair, the additional state exchange is also
additional switching transitions is another major reason). unavailable. Thus, the allocation of switching modes is much
Besides, due to the nonpaired operation of essential inser- simpler, as shown in Fig. 8.
tion/bypass, the voltage difference between two SMs not in It should also be noted that capacitor voltage of a previously
pair also needs to be considered. For example, if one ad- inserted SM may be lower than that of a previously bypassed SM
ditional state exchange, one essential PWM-up and PWM- when iarm > 0. If the similar situation occurs, the decomposition
down, and one essential insertion are, respectively, allocated of essential PWM is not conducive to voltage balancing. Instead,
to SMR[1] and SMR[N ] , SMR[2] and SMR[N −1] , and SMR[3] at the conventional PWM mode will be adopted (special case II
Tk , the SM pair with the largest voltage difference at Tk+1 shown in Fig. 8).

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3345

Fig. 8. Improved voltage-balancing strategy for decomposed NL-PWM (when the arm current is positive).

According to the abovementioned description, voltage differ- have been inserted. To obtain the earliest moment corresponding
ences can be restricted more efficiently by the paired operations to ΔUmax,k , two counters are adopted based on the following
(essential PWM-up and PWM-down and additional state ex- principles.
change). Thus, under the same ΔUmax , the number of additional 1) The initial values of counts 1 and 2 are equal to the number
switching transitions can be effectively reduced, resulting in of inserted SMs and bypassed SMs at Tk , respectively.
lower average switching frequency. Besides, the consideration 2) Count 1 is decremented by 1 if the switching states of an
of two special cases guarantees the completeness of the proposed SM pair are exchanged (only the essential PWM is consid-
strategy. ered here) or nnlm − nnlm1 = −1; count 2 is incremented
by 1 if the switching states of an SM pair are exchanged
or nnlm − nnlm1 = 1.
C. Relationship Between Voltage Threshold and Switching 3) When count 1 reaches 0 or count 2 reaches N , both
Frequency counters are stopped and the corresponding moment is
Under the proposed method, the average switching frequency TkE .
increases with the decrease of voltage threshold. To achieve a Then, ΔUmax,k can be calculated as
good tradeoff between these two aspects under different condi-
TkE
tions, the quantitative relationship is analyzed in this section. iarm
ΔUmax,k ≈ dt. (8)
Assuming all the capacitor voltages remain identical at Tk , Tk C
SMs inserted (bypassed) at Tk should take priority to be by-
passed (inserted) to benefit voltage balancing. The local maxi- By calculating and comparing ΔUmax,k under different Tk ,
mum voltage difference ΔUmax,k will appear when all the SMs the global maximum voltage difference ΔUmax can be roughly
inserted at Tk have been bypassed or all the SMs bypassed at Tk obtained. When the preset voltage threshold Uth is no lower than

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 3346 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 3, MARCH 2023

TABLE I
SIMULATION AND EXPERIMENTAL PARAMETERS

ΔUmax , no additional switching transitions are required and the

average switching frequency can be calculated as
fsw = (Nnlm + Npwm ) /2N T1
= mf1 + fs /N. (9)
For lower Uth , additional switching transitions have to be
generated. After adding one additional state exchange, ΔUmax,k
will decrease by about 2Ts iarm /C. If ΔUmax,k still exceeds
Uth , more additional switching transitions are required until the
comparison result changes. In this way, the number of additional
switching transitions corresponding to different Tk is roughly
obtained. Thus, the relationship between Uth and fsw under
the proposed method can be outlined without simulation and
experiment.

IV. SIMULATION STUDIES

In order to compare the proposed decomposed NL-PWM
with several typical NLM-based, NL-PWM-based, and CPS-
PWM-based methods, a three-phase MMC system is simulated
in MATLAB/Simulink. All the simulation studies are based on Fig. 9. Simulation waveforms of MMC under the following terms. (a) Re-
the same control architecture shown in Fig. 2 and the main duced switching frequency NLM (Uth = 4%Uc ). (b) Conventional NL-PWM
with optimization of switching frequency. (c) Conventional NL-PWM with-
simulation parameters are listed in Table I. out optimization of switching frequency. (d) Proposed decomposed NL-PWM
(Uth = 4%Uc ).
A. Comparison With NLM-Based and NL-PWM-Based
Methods
Fig. 9 shows the steady-state performance of MMC un- 250 Hz for essential PWM part (Npwm /2N T1 ), and 20 Hz
der three different methods: 1) reduced switching frequency for additional exchange of switching states. Substituting the
NLM [27]; 2) conventional NL-PWM [20]; and 3) proposed simulation parameters into (8), the additional switching times
decomposed NL-PWM. Especially, the conventional NL-PWM during a fundamental period are about 27, which is close to the
with two different voltage-balancing strategies are both simu- actual value. In addition to the total harmonic distortion (THD),
lated. By incrementing the counter variable when changes occur the harmonic spectrums of output current and circulating current
in switching states in programs, the average switching frequen- are also provided to reflect the low-frequency characteristics, as
cies fsw corresponding to Fig. 9(a)–(d) can be obtained, which shown in Fig. 10. Compared with reduced switching frequency
are about 300, 610, 1400, and 310 Hz, respectively. Referring NLM, voltage-balancing effect or switching frequency under
to the loss characteristics presented in [32], the proportions the proposed method is similar, but the much better harmonic
of switching loss under these methods are about 0.2%, 0.4%, characteristics of output current and circulating current indicate
1.0%, and 0.2%, respectively. Combining with (3) and (4), the the significance of replacing NLM by decomposed NL-PWM.
switching frequency of 310 Hz under the proposed method can Besides, since the capacitor voltage variation during the current
be divided into 40 Hz for essential NLM part (Nnlm /2N T1 ), control period was not considered in [27], the maximum voltage

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3347

Fig. 11. Simulation waveforms of MMC under proposed decomposed NL-

PWM with different parameters. (a) m = 0.8, cos ϕ = 1.0, and Uth = 6%Uc .
(b) m = 0.9, cos ϕ = 0.9 (inductance), and Uth = 4%Uc .
Fig. 10. (a)–(d) Harmonic spectrums of output current and circulating current
corresponding to Fig. 9.
For the other NLM-based methods that are not simulated here,
the switching frequency in medium-voltage MMC is not further
optimized in essence. That is, if ΔUmax remains identical,
difference ΔUmax is larger than the preset Uth , as shown in
the converter efficiency cannot be evidently promoted (even
Fig. 9(a).
possibly demoted) on the basis of that under the proposed
As for the conventional NL-PWM method, if switching fre-
method. However, the harmonic characteristics under decom-
quency is optimized as in [20], the simulation result coincides
posed NL-PWM are significantly better. Therefore, among the
with the theoretical analysis in Section II-B. On the one hand,
NLM-based and NL-PWM-based methods, the proposed de-
since voltage sorting is unactivated when nnlm = nnlm1 , the con-
composed NL-PWM method possesses the distinct advantages
tinuous charging or discharging results in the major imbalance of
in comprehensive performance.
capacitor voltages (ΔUmax = 23%Uc ). On the other hand, since
some unnecessary switching transitions are generated when
nnlm = nnlm1 , the average switching frequency is still unsat- B. Comparison With CPS-PWM-Based Method
isfactory (about 320 Hz for additional exchange of switching The harmonic analysis of MMC under CPS-PWM and NL-
states). To avoid such significant voltage imbalance, the case PWM was carried out in [5] and [20]. Since the decomposi-
of no switching optimization is also considered, as shown in tion of PWM does not change the total output voltage, the
Fig. 9(c). Although the current harmonics and voltage-balancing harmonic characteristics of the basic NL-PWM also apply to
effect seem quite excellent, the switching frequency of up to the decomposed NL-PWM. According to the existing analyt-
1400 Hz indicates that it is inapplicable for actual system. ical conclusions, the phase voltages under NL-PWM contain
In contrast, the proposed voltage-balancing strategy involving odd carrier frequency harmonics and sideband harmonics near
five switching modes can accurately restrict ΔUmax within the carrier frequency where the harmonic of ωc (denoting the an-
preset Uth and the small voltage difference is beneficial for gular frequency of carriers) is the most prominent harmonic
precise modulation, which results in low current harmonics. component. Since all the odd carrier frequency harmonics are
Based on the decomposition of PWM and paired operation, the cancelled in line voltages, the THD is very low even for MMC
proposed method cannot be simply regarded as a new tradeoff with very few SMs. However, for CPS-PWM, there exist larger
among harmonic, switching frequency, and voltage-balancing sideband harmonics caused by the multicarrier modulation in
effect. To further validate the effectiveness of the proposed line voltages.
method and correctness of theoretical analysis, another two The abovementioned conclusions are based on the assumption
case studies are carried out, as shown in Fig. 11. The result that all the capacitor voltages remain balanced and constant.
indicates that higher voltage threshold, higher modulation in- Actually, influenced by large voltage difference, the output
dex, or lower power factor has little impact on the control current and circulating current in [20] contain more harmonics
performance of MMC. Besides, the switching frequency un- compared to the proposed method. Similarly, since voltage
der the voltage threshold of 6%Uc is about 290 Hz, which balancing in conventional CPS-PWM depends on the individual
is even lower than that under reduced switching frequency balancing control loop, the synthesis of phase-shifted PWM with
NLM. different pulse width is not as ideal as the theoretical calculation.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 3348 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 3, MARCH 2023

To verify the approximate correctness of harmonic analysis,

the steady-state and dynamic performance under conventional
CPS-PWM [4] and proposed decomposed NL-PWM are sim-
ulated, as shown in Figs. 12 and 13. The voltage reference of
SM1 is artificially set as 0.7Uc before 0.2 s and regulated to Uc at
0.2 s. It can be seen that the dynamic balancing process is much
shorter under decomposed NL-PWM (4.62  84.1 ms) and more
current harmonics are produced in the conventional CPS-PWM
(0.43% > 0.24%). The carrier frequency of CPS-PWM is set as
312.5 Hz, but the actual switching frequency is around 380 Hz
due to the step change of modulation signals at the beginning
of each control period. Besides, once any SM is in failure and
isolated, the periods, phase-shifted angles, or amplitudes of all
the carriers in CPS-PWM need to be regulated accordingly [12],
[13], [14], while the carrier in decomposed NL-PWM is con-
stant in all cases. This leads to a distinct difference in the
complexity of implementation. Although the dynamic perfor-
mance of voltage balancing under CPS-PWM has been improved
a lot in the existing literature, the abovementioned inherent
limitations cannot be well-addressed. When these factors are
considered, the proposed method has obvious superiority to
CPS-PWM.

V. EXPERIMENTAL VERIFICATION
A scaled-down laboratory prototype of a single-phase MMC
with six SMs per arm is developed to confirm the proposed
scheme. The photograph of the experimental setup is shown in
Fig. 14, with the key parameters listed in Table I. All the data
Fig. 12. Simulation waveforms of MMC during dynamic process under the
acquisition, data processing, and signal generation are imple-
following terms. (a) Conventional CPS-PWM. (b) Proposed decomposed NL- mented in a digital signal processor (DSP) (TMS320F28335)
PWM. and an FPGA (EP4CE10E22C8). In this section, several com-
parative experiments are carried out to validate the salient per-
formance of the proposed method from different aspects. The
main difference from simulation lies in the nonideality of control
implementation (including control delay, dead time of driving
signals, measurement errors, etc.) and number of SMs per arm.

A. Comparison With NLM-Based and NLPWM-Based

Methods
Fig. 13. (a) and (b) Harmonic spectrums of output current and circulating Fig. 15 shows the experimental waveforms of MMC un-
current under conventional CPS-PWM.
der three different methods, where ucap1 ∼ucap6 , uap , gap1 , isa ,
and ica denote the SM capacitor voltages, upper arm voltage,
SM switching state, output current, and circulating current,
respectively. Due to fewer SMs in experiment, the arm voltage
under NLM has to suffer from greater staircase approxima-
tion error, resulting in worse output waveforms. As shown in
Fig. 15(a), the THD of output current is so high and cannot
satisfy the application requirement. Since the probability of
nnlm = nnlm1 increases with the decrease of N , the voltage
imbalance under conventional NL-PWM is more serious in ex-
periment. The maximum voltage difference is around 27 V, equal
to 33.75%Uc . If the basic sort-plus-select strategy is adopted
in conventional NL-PWM [23], the average switching fre-
quency will reach 1800 Hz and the subsequent switching loss is
Fig. 14. Photograph of the laboratory prototype. unacceptable.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3349

Fig. 15. Experimental waveforms of MMC under the following terms. (a) Reduced switching frequency NLM (Uth = 2V). (b) Conventional NL-PWM with
optimization of switching frequency. (c) Conventional NL-PWM without optimization of switching frequency. (d) Proposed decomposed NL-PWM (Uth = 2V).

TABLE II of average switching frequency (980 to 880 Hz) is not as much

COMPREHENSIVE COMPARISON OF MODULATION METHODS
as that in simulation (610 to 310 Hz). But, due to the remarkable
superiority in control performance, the control frequency under
the proposed method can be properly reduced to further lower
the switching frequency.

B. Comparison With CPS-PWM-Based Method

As shown in Fig. 16, the voltage reference of SM1 is initially
100 V and regulated to the rated value 80 V after a while.
Similar to Fig. 12, the difference of voltage-balancing control
under conventional CPS-PWM and decomposed NL-PWM
leads to the different dynamic process. During the dynamic
process under decomposed NL-PWM, the SM with higher
capacitor voltage (SM1 ) is always inserted when iarm < 0 and
bypassed when iarm ≥ 0. However, the individual balancing
control loop in CPS-PWM can only regulate the modulation
In contrast, the proposed decomposed NL-PWM method signal a bit, thus, it requires a longer time to restore to the steady
can achieve a better tradeoff among harmonic characteristics, state. Besides, the THD of output current under decomposed
voltage-balancing effect, and switching frequency. The max- NL-PWM is lower than that under CPS-PWM, which coincides
imum voltage difference ΔUmax is within 2 V, which coin- with the theoretical analysis and simulation results. However, it
cides with the analytical result 1.8 V in MATLAB [by dis- should be pointed out that fsw under CPS-PWM can be further
crete calculation of (8)]. The switching frequency of 880 Hz decreased by regulating carrier frequency, while fsw under
under the proposed method mainly contains 40 Hz for essential decomposed NL-PWM cannot be further optimized here due to
NLM part (Nnlm /2N T1 ) and 833.3 Hz for essential PWM part no additional switching transitions. Unlike simulation, ΔUmax
(Npwm /2N T1 ). Since the essential NLM and PWM parts ac- is only about 2.5%Uc , therefore the voltage-balancing effect
count for a higher portion with the decrease of N , the reduction under properly reduced carrier frequency is still acceptable.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 3350 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 38, NO. 3, MARCH 2023

voltage differences of SM pairs cannot be restricted within the

preset threshold by the essential NLM and PWM parts. Besides,
to provide a guideline for determining voltage threshold, the
quantitative relationship between voltage threshold and switch-
ing frequency is analyzed. With such a complete method, the
switching frequency and losses in NL-PWM-based MMC can be
significantly reduced without sacrificing the voltage-balancing
effect, which is confirmed by simulation and experimental re-
sults. Due to the competitive advantages, the proposed method
provides an alternative for modulation in MMC. Moreover, for
high-voltage applications where the NLM-based methods may
be preferable, the proposed paired operation for determining
additional switching transitions can also be utilized.

REFERENCES
[1] A. Lesnicar and R. Marquardt, “An innovative modular multilevel con-
verter topology suitable for a wide power range,” in Proc. IEEE Bologna
Power Tech Conf., vol. 3, 2003, pp. 1–6.
[2] R. Marquardt, “Modular multilevel converters: State of the art and future
progress,” IEEE Power Electron. Mag., vol. 5, no. 4, pp. 24–31, Dec. 2018.
[3] A. Dekka, B. Wu, R. L. Fuentes, M. Perez, and N. R. Zargari, “Evolution
of topologies, modeling, control schemes, and applications of modular
multilevel converters,” IEEE Trans Emerg. Sel. Topics Power Electron.,
vol. 5, no. 4, pp. 1631–1656, Dec. 2017.
[4] M. Hagiwara, R. Maeda, and H. Akagi, “Control and analysis of the
modular multilevel cascade converter based on double-star chopper-
cells (MMCC-DSCC),” IEEE Trans. Power Electron., vol. 26, no. 6,
pp. 1649–1658, Jun. 2011.
[5] B. Li, R. Yang, D. Xu, G. Wang, W. Wang, and D. Xu, “Analysis of the
phase-shifted carrier modulation for modular multilevel converters,” IEEE
Trans. Power Electron., vol. 30, no. 1, pp. 297–310, Jan. 2015.
[6] F. Deng and Z. Chen, “Voltage-balancing method for modular multi-
level converters under phase-shifted carrier-based pulsewidth modulation,”
IEEE Trans. Ind. Electron., vol. 62, no. 7, pp. 4158–4169, Jul. 2015.
Fig. 16. Experimental waveforms of MMC under the following terms. [7] K. Wang, Y. Deng, H. Peng, G. Chen, G. Li, and X. He, “An improved
(a) Conventional CPS-PWM. (b) Proposed decomposed NL-PWM. CPS-PWM scheme-based voltage balancing strategy for MMC with fun-
damental frequency sorting algorithm,” IEEE Trans. Ind. Electron., vol. 66,
no. 3, pp. 2387–2397, Mar. 2019.
[8] J. Mei, K. Shen, B. Xiao, L. M. Tolbert, and J. Zheng, “A new selective
From this perspective, CPS-PWM is irreplaceable in some loop bias mapping phase disposition PWM with dynamic voltage balance
circumstances. capability for modular multilevel converter,” IEEE Trans. Ind. Electron.,
vol. 61, no. 2, pp. 798–807, Feb. 2014.
[9] S. Fan, K. Zhang, J. Xiong, and Y. Xue, “An improved control system
C. Comprehensive Evaluation of Different Modulation for modular multilevel converters with new modulation strategy and
Methods voltage balancing control,” IEEE Trans. Power Electron., vol. 30, no. 1,
pp. 358–371, Jan. 2015.
For the MMC in medium-voltage applications, a comparison [10] R. Darus, G. Konstantinou, J. Pou, S. Ceballos, and V. G. Agelidis, “Com-
of some typical modulation methods and the proposed method, parison of phase-shifted and level-shifted PWM in the modular multilevel
converter,” in Proc. Int. Power Electron. Conf., 2014, pp. 3764–3770.
which encompasses a broad range of features, is given in Table II. [11] G. Konstantinou, J. Pou, S. Ceballos, R. Darus, and V. G. Agelidis,
There are some limitations in the existing methods, while the “Switching frequency analysis of staircase-modulated modular multilevel
various aspects of performance under the proposed method are converters and equivalent PWM techniques,” IEEE Trans. Power Del.,
vol. 31, no. 1, pp. 28–36, Feb. 2016.
found to be satisfactory. [12] J. Choi, B. Han, and H. Kim, “New scheme of phase-shifted carrier PWM
for modular multilevel converter with redundancy submodules,” IEEE
VI. CONCLUSION Trans. Power Del., vol. 31, no. 1, pp. 407–409, Feb. 2016.
[13] K. Li, L. Yuan, Z. Zhao, S. Lu, and Y. Zhang, “Fault-tolerant control
This article proposed a decomposed NL-PWM method to- of MMC with hot reserved submodules based on carrier phase shift
modulation,” IEEE Trans. Power Electron., vol. 32, no. 9, pp. 6778–6791,
gether with an improved voltage-balancing strategy for MMC Sep. 2017.
in medium-voltage applications. By decomposing the PWM [14] J. Wang and Y. Tang, “A fault-tolerant operation method for medium volt-
part and introducing two new switching modes, the essential age modular multilevel converters with phase-shifted carrier modulation,”
IEEE Trans. Power Electron., vol. 34, no. 10, pp. 9459–9470, Oct. 2019.
switching transitions under NL-PWM can be more fully utilized [15] P. Hu and D. Jiang, “A level-increased nearest level modulation method
to restrict the voltage difference of SM capacitors. On this for modular multilevel converters,” IEEE Trans. Power Electron., vol. 30,
basis, totally five switching modes and three types of switching no. 4, pp. 1836–1842, Apr. 2015.
[16] L. Lin, Y. Lin, Z. He, Y. Chen, J. Hu, and W. Li, “Improved nearest-level
transitions are considered in the proposed voltage-balancing modulation for a modular multilevel converter with a lower submodule
strategy. In each control period, SMs are sorted and paired off, number,” IEEE Trans. Power Electron., vol. 31, no. 8, pp. 5369–5377,
and the additional switching transitions are generated only if Aug. 2016.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.
 WANG et al.: DECOMPOSED NEAREST LEVEL PWM METHOD WITH REDUCED SWITCHING FREQUENCY FOR MMC 3351

[17] D. Wu and L. Peng, “Characteristics of nearest level modulation method [30] G. Ding, G. Tang, Z. He, and M. Ding, “New technologies of voltage
with circulating current control for modular multilevel converter,” IET source converter (VSC) for HVDC transmission system based on VSC,”
Power Electron., vol. 9, no. 2, pp. 155–164, 2016. in Proc. IEEE Power Eng. Soc. Gen. Meeting- Convers. Del. Elect. Energy
[18] X. Chen, J. Liu, S. Song, and S. Ouyang, “Circulating harmonic currents 21st Century, 2008, pp. 1–8.
suppression of level-increased NLM based modular multilevel converter [31] K. Batcher, “Sorting networks and their applications,” in Proc. AFIPS
with deadbeat control,” IEEE Trans. Power Electron., vol. 35, no. 11, Sprint Joint Comput. Conf., 1968, pp. 307–314.
pp. 11418–11429, Nov. 2020. [32] J. Li, X. Zhao, Q. Song, H. Rao, S. Xu, and M. Chen, “Loss calcula-
[19] Z. Li, P. Wang, H. Zhu, Z. Chu, and Y. Li, “An improved pulse tion method and loss characteristic analysis of MMC based VSC-HVDC
width modulation method for chopper-cell-based modular multilevel con- system,” in Proc. IEEE Int. Symp. Ind. Electron., 2013, pp. 1–6.
verters,” IEEE Trans. Power Electron., vol. 27, no. 8, pp. 3472–3481,
Aug. 2012. Zhen Wang (Graduate Student Member, IEEE) was
[20] Y. Wang, C. Hu, R. Ding, L. Xu, C. Fu, and E. Yang, “A nearest level born in Liaoning, China, in 1996. He received
PWM method for the MMC in DC distribution grids,” IEEE Trans. Power the B.S. degree from Tianjin University, Tianjin,
Electron., vol. 33, no. 11, pp. 9209–9218, Nov. 2018. China, in 2018. He is currently working toward
[21] K. Shen, S. Wang, D. Zhao, and G. Zhao, “A discrete-time low- the Ph.D. degree with the School of Electrical and
frequency-ratio nearest level modulation strategy for modular multilevel Electronic Engineering, Huazhong University of Sci-
converters with small number of power modules,” IEEE Access, vol. 7, ence and Technology, Wuhan, China, all in electrical
pp. 25792–25803, 2019. engineering.
[22] D. Samajdar, T. Bhattacharya, and S. Dey, “A reduced switching frequency His research interests include modular multilevel
sorting algorithm for modular multilevel converter with circulating cur- converters and grid-connected converters.
rent suppression feature,” IEEE Trans. Power Electron., vol. 34, no. 11,
pp. 10480–10491, Nov. 2019.
[23] T. Yin, C. Xu, L. Lin, and K. Jing, “A Si MOSFET and Si IGBT hy- Li Peng (Senior Member, IEEE) received the B.S.,
brid modular multilevel converter with specialized modulation scheme,” M.S., and Ph.D. degrees in electrical engineering
IEEE Trans. Power Electron., vol. 35, no. 12, pp. 12623–12628, from the Huazhong University of Science and Tech-
Dec. 2020. nology (HUST), Wuhan, China, in 1989, 1992, and
[24] M. H. Nguyen and S. Kwak, “Nearest-level control method with improved 2004, respectively.
output quality for modular multilevel converters,” IEEE Access, vol. 8, In 1992, she joined the HUST, where she is cur-
pp. 110237–110250, 2020. rently a Full Professor with the School of Electrical
[25] Q. Tu, Z. Xu, and L. Xu, “Reduced switching-frequency modulation and and Electronic Engineering. Her research interests
circulating current suppression for modular multilevel converters,” IEEE include power electronic conversion and its control
Trans. Power Del., vol. 26, no. 3, pp. 2009–2017, Jul. 2011. and applications, modular power supply, parallel con-
[26] J. Qin and M. Saeedifard, “Reduced switching-frequency voltage- trol technique, renewable energy generation, power
balancing strategies for modular multilevel HVDC converters,” IEEE quality control, and MMC for HVdc applications.
Trans. Power Del., vol. 28, no. 4, pp. 2403–2410, Oct. 2013.
[27] S. Huang, W. Liao, P. Liu, W. Tang, and S. Huang, “Analysis and calcu-
lation on switching frequency and switching losses of modular multilevel Jiawei Zhang was born in Huanggang, China, in
converter with maximum sub-module capacitor voltage deviation,” IET 1997. He received the B.S. degree from Hunan Uni-
Power Electron., vol. 9, no. 2, pp. 188–197, 2016. versity, Hunan, China, in 2020. He is currently work-
[28] Y. Luo, Z. Li, L. Xu, X. Xiong, Y. Li, and C. Zhao, “An adaptive voltage- ing toward the M.S. degree with the School of Electri-
balancing method for high-power modular multilevel converters,” IEEE cal and Electronic Engineering, Huazhong University
Trans. Power Electron., vol. 33, no. 4, pp. 2901–2912, Apr. 2018. of Science and Technology, Wuhan, China, all in
[29] Z. Geng, M. Han, C. Xia, and L. Kou, “A switching times reassignment- electrical engineering.
based voltage balancing strategy for submodule capacitors in modular His research interests include modular multilevel
multilevel HVDC converters,” IEEE Trans. Power Del., vol. 37, no. 2, converter and its grid-side faults.
pp. 1215–1225, Apr. 2022.

Authorized licensed use limited to: National Institute of Technology - Puducherry. Downloaded on January 05,2023 at 08:38:59 UTC from IEEE Xplore. Restrictions apply.