0% found this document useful (0 votes)
193 views3 pages

DSE 20.2F Computer Architecture and Networks

The document provides instructions for a 3-hour exam on Computer Architecture and Networks. It contains 5 questions testing knowledge of microprocessor structure, assembly language, memory, control units, and input/output. An attachment provides the instruction set for a sample machine with 16 instructions including load, store, arithmetic, logical, jump, input, output, subroutine calls and stack operations.

Uploaded by

pakaya tama
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
193 views3 pages

DSE 20.2F Computer Architecture and Networks

The document provides instructions for a 3-hour exam on Computer Architecture and Networks. It contains 5 questions testing knowledge of microprocessor structure, assembly language, memory, control units, and input/output. An attachment provides the instruction set for a sample machine with 16 instructions including load, store, arithmetic, logical, jump, input, output, subroutine calls and stack operations.

Uploaded by

pakaya tama
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

National Institute of Business Management

School of Computing and Engineering

BSc (Hons) Computing|ITB -Year 1


Diploma in Software Engineering–20.2F
Computer Architecture and Networks
Time allowed: Three hours 16th November 2021| 12 PM TO 15 PM
INSTRUCTIONS TO CANDIDATES

• This paper contains five questions.


• Answer ALL Questions
• All calculators are allowed.
ADDITIONAL MATERIALS

• Instruction Set

Question 01 (20 Marks)


1. Draw the internal structure of a typical microprocessor. (04 Marks)
2. Briefly explain 3 registers in the above structure. (04 Marks)
3. Discuss the indirect addressing modes used by the microprocessor by using suitable
diagrams. (04 Marks)
4. Explain the terms OPCODE and OPERAND. (04 Marks)
5. Explain the two operations of sub program implementation? (04 Marks)

Question 02 (20 Marks)


1. What is an Instruction Cycle? (04 Marks)
2. Explain the operation of the following assembly language program segment. (04Marks)
a. LDA 2001
b. ADD 1001
3. Write an assembly program for the following high-level statement where P, Q, R
variables are stored in 10, 11 and 12 memory locations. (04 Marks)
R = (P2Q + 2Q)/(P – Q)
4. Write the equivalent machine program and assembly program for the above (part 4).
Use the attachment 01 given. (04 Marks)
5. Write micro-operations and corresponding control signals for the execution cycle of
the ADD XX operation. (4 Marks)
Page 1 of 3
Question 03 (20 Marks)

1. Discuss the difference between EEPROM and Flash Memory. (04 Marks)
2. Write short notes on the following. (04 Marks)
a) SRAM
b) Memory Expansions
3. Calculate the address bus width (ABW) in memory with 32GB capacity and 4Bytes
data bus width (DBW). (04 Marks)
4. Explain the two memory expansion methods briefly. (04 Marks)
5. Construct 256 x 128KB memory Module using 128 x 64KB Chips. (04 Marks)

Question 04 (20 Marks)


1. Draw the Hard-wired control unit components. (05 Marks)
2. Discuss the advantages and disadvantages of Hard – wired control unit. (05 Marks)
3. Compare and contrast the advantages and disadvantages of horizontal
microprogramming and vertical microprogramming. (05 Marks)
4. Draw the AND gate band diagram for the fetch and execution cycles of LDA (XX)
instruction. (05 Marks)

Question 05 (20 Marks)


1. Discuss the functions performed by the IO interface. (05 Marks)
2. What are the two types of input-output addressing methods used in input-output
interfaces? Compare and contrast these two methods. (05 Marks)
3. What is the use of DMA unit when CPU accessing IO devices? (05 Marks)
4. What are the three-interrupts possible in a computer system? (05 Marks)

Page 2 of 3
Attachment 01: Instruction Set

Machine Instruction Assembly Instruction Operation


0000 ------ HLT End
0001 xxxxx LDA (XX) Acc(XX)
0010 xxxxx STA (XX) (XX)  Acc
0011 xxxxx ADA (XX) AccAcc+(XX)
0100 xxxxx SUB (XX) AccAcc-(XX)
0101 xxxxx MUL (XX) AccAcc*(XX)
0110 xxxxx DIV (XX) AccAcc/(XX)
0111 xxxxx JMP (XX) Jump to XX
1000 xxxxx JM0 (XX) Jump to XX if Acc=0 else skip
1001 xxxxx JMN (XX) Jump to XX if Acc<0 else skip
1010 xxxxx J() (XX) Indirect jump first 6 LSB are considered
1011 ------ INP -- Input to Acc
1100 ------ OUT -- Output from Acc
1101 xxxxx CALL (XX) Start subprogram staring from XX
1110 ------- RETURN -- Return to previous subprogram
1111 0------ PUSH -- ToSAcc
1111 1------ POP -- AccToS+1

Page 3 of 3

You might also like