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DSE 18.1F Computer Architecture and Networking

The document contains 5 questions regarding computer architecture and networking for a diploma exam. It covers topics such as computer subsystems, microprocessors, memory, I/O interfaces, data communication, and computer networks. An attachment provides an instruction set with machine and assembly level instructions.

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0% found this document useful (0 votes)
69 views3 pages

DSE 18.1F Computer Architecture and Networking

The document contains 5 questions regarding computer architecture and networking for a diploma exam. It covers topics such as computer subsystems, microprocessors, memory, I/O interfaces, data communication, and computer networks. An attachment provides an instruction set with machine and assembly level instructions.

Uploaded by

pakaya tama
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

NATIONAL INSTITUTE OF BUSINESS MANAGEMENT

Diploma in Software Engineering 18.1F


Computer Architecture and Networking - DSE-3-4-09
Date: 18.02.2019 Time Allowed:3hrs
Answer All questions

 Additional material: Attachment 01

Question 01 (20 Marks)


1. There are three main subsystems in a computer. Briefly explain the key function
associated with each subsystem. (03 Marks)
2. Briefly explain the Bus system of a computer. (03 Marks)
3. Draw the schematic diagram of typical microprocessor and explain the function of the
PC and IR registers. (06 Marks)
4. Write short notes on the followings (04 Marks)
a. OPCODE b. Micro-operation

5. Explain the software approach used to implement the Control Unit. (04 Marks)

Question 02 (20 Marks)

1. What is a computer program? (03 Marks)


2. Write the micro operations and corresponding control signals for the execution cycle of
LDA (XX) instruction (04 Marks)
3. Assume that the initial values of memory locations 20, 21 and 22 are X, Y and Z
respectively. Write an Assembly program and Machine program for the following high-
level statement. (06 Marks)
Z = (2X+Y3) / (X2-Y2)
4. Explain sub program implementation with an example. (03 Marks)
5. Draw the AND gate band diagram for the execution cycle of MUL (XX) instruction. (04
Marks)

Page 1 of 3
Question 03 (20 Marks)

1. Draw the memory hierarchy associated with a computer system. (03 Marks)
2. Both ‘Static’ and ‘Dynamic’ random access memories are used to form Random Access
Memories (RAMs). State the differences between SRAM and DRAM. (04 Marks)
3. Write short notes on the following: (04 Marks)
a. PROM
b. EEPROM
4. In a given memory with 1GB capacity, Block Size is given as 2bytes. What should be the
Address Bus Width (ABW) of the system? (04 Marks)
5. Construct a memory module of 32X128MB using memory chips of 16X64MB by clearly
showing the Address Bus Width(ABW) and Data Bus Width(DBW) (05 Marks)

Question 04 (20 Marks)

1. Draw a general block diagram of a typical input-output interface. Briefly explain the
function of each block in your diagram. (04 Marks)
2. What are the two types of input-output addressing methods used in input-output
interfaces? Compare and contrast these two methods. (04 Marks)
3. List three types of DMA data transfer methods. (03 Marks)
4. Explain the read-write operation of the magnetic head used in magnetic storage devices
by using suitable diagrams. (03 Marks)
5. Represent 10110011001110 data block using the following encoding techniques. (06
Marks)
a. Non-return to Zero-Level (NRZ-L)
b. Manchester

Question 05 (20 Marks)

1. Draw a general block diagram of a data communication system. (03 Marks)


2. State three transmission impairments and explain one of them in detail. (04 Marks)
3. Input power to a 10km distance long – haul telecommunication link is 10W. Receiver
power at the output of the link is 10mW. Calculate the attenuation of the link in dB/km.
(05 Marks)
4. Computer networks can be configured using several topologies. Explain two network
topologies of your choice. (04 Marks)
5. Explain the OSI reference model stating individual functions of each layer. (04 Marks)

Page 2 of 3
Attachment 01: Instruction Set

Machine Instruction Assembly Instruction Operation


0000 ------ HLT End
0001 xxxxxx LDA XX Acc(XX)
0010 xxxxxx STA XX (XX)  Acc
0011 xxxxxx ADA XX AccAcc+(XX)
0100 xxxxxx SUB XX AccAcc-(XX)
0101 xxxxxx MUL XX AccAcc*(XX)
0110 xxxxxx DIV XX AccAcc/(XX)
0111 xxxxxx JMP XX Jump to XX
1000 xxxxxx JM0 XX Jump to XX if Acc=0 else skip
1001 xxxxxx JMN XX Jump to XX if Acc<0 else skip
1010 xxxxxx J() XX Indirect jump first 6 LSB are considered
1011 ------ INP -- Input to Acc
1100 ------ OUT -- Output from Acc
1101 xxxxxx CALL XX Start subprogram staring from XX
1110 ------- RETURN -- Return to previous subprogram
1111 0------ PUSH -- ToSAcc
1111 1------ POP -- AccToS+1

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