S 01 C Psac-Sample
S 01 C Psac-Sample
for the
<Program Name>
__________________________________________________ ___________
<Name>, Program Manager Date
__________________________________________________ ___________
<Name>, Technical Project Lead Date
__________________________________________________ ___________
<Name>, Engineer Date
__________________________________________________ ___________
<Name>, Quality Engineer Date
Notice
This document and the information contained herein are the property of <company
name>. Any reproduction, disclosure or use thereof is prohibited except as
authorized in writing by <company name>. Recipient accepts the responsibility for
maintaining the confidentiality of the contents of this document.
Plan for Software Aspects of Certification
REVISIONS
Requested/
Rev. Reason/Description Changed By Date
Table of Contents
Section Page
List of Figures
List of Tables
1.0 INTRODUCTION
1.1 Purpose
This Plan for Software Aspects of Certification (PSAC) defines the processes, procedures,
methods and standards to be used and the lifecycle data to be produced in order to satisfy
the objectives of DO-178C and any additional objectives required to satisfy the certification
basis of the aircraft. Once approved, this PSAC represents an agreement between the
applicant and the customer and/or certification authority.
1.2 Scope
This plan will be used by the customer and/or certification authority to determine if the
Software Lifecycle Process is commensurate with the rigor required for the level of software
being developed. Once approved, it is implemented during the software lifecycle
development. This Plan for Software Aspects of Certification complies with the
documentation requirements of RTCA/DO-178C, Section 11.1.
1.3 Definitions
Definition Meaning
COTS IC Any COTS digital or hybrid electronic device which does not
execute software in a specific core. COTS ICs may be bus
controllers, flip-flop, multiplexers, converters, memories… The
hardware functions implemented within these components
may be simple or complex. (See also definition of SEH below).
COTS Graphical Processor Any COTS microcontroller specifically designed for graphical
applications. COTS graphical processors for airborne systems
are required to have built in mitigation against Hazardous and
Misleading information(HMI).
COTS Microcontroller Any IC which executes software in a specific core area (Central
Processing Unit) and implements peripheral hardware
elements such as, for example, input/output (I/O), bus
controllers… Such a peripheral element may be considered
simple (e.g. a UART, A/D, D/A) or complex (e.g. a bus
controller). (See also definition of SEH below).
Highly complex COTS Any microcontroller where at least one of the statements
microcontroller below is true:
- more than one Central Processing Unit (CPU) is embedded
and they use the same bus (which is not strictly separated or
which uses the same single port memory)
- several complex interfaces are dependent on each other and
exchange data
- several internal busses are integrated and are used in a
dynamic way (for example, a dynamic bus switch matrix)
Definition Meaning
Integrated Circuit A circuit (also IC, microcircuit, microchip, silicon chip, or chip)
consisting of elements inseparably associated and formed in-
situ on or within a single substrate to perform an electronic
circuit function. Among the most advanced integrated circuits
are the microprocessors or "cores", digital memory chips,
ASICS and bus controllers. Integrated circuits can be classified
into analog, digital and hybrid signal:
- Digital integrated circuits are typically microprocessors,
DSPs, an micro controllers and work using binary mathematics
to process "one" and "zero" signals.
- Analog ICs, such as sensors, power management circuits,
and operational amplifiers, work by processing continuous
signals. They perform functions like amplification, active
filtering, demodulation, mixing, etc.
- Hybrid ICs can combine analog and digital circuits on a single
chip to create functions such as A/D converters and D/A
converters.
Digital and Hybrids ICs include ASIC, COTS ICs, highly
complex, COTS Microcontroller, Microprocessor, COTS
Microcontroller, COTS Graphical Processor, PLD, CEH, SEH.
Microprocessor A single Central Processing Unit which executes software and
does not contain any additional integrated peripheral hardware
element such as a UART, A/D, D/A, bus controller, Time
Processing Unit, Memory Management Unit, watchdog, etc.
Table 1-1 Definitions
Name Title
Team Members:
John Smith Systems Engineer
John Smith Safety Engineer
John Smith Software Design Engineer
John Smith Configuration Management Specialist
John Smith FAA Software Designated Engineering Representative
The following chart shows that the Quality Assurance Organization is independent from
Engineering. It also demonstrates that the verification and test activities are performed
independently by someone other than the development engineer.
John A. Smith
CEO
Software Lead
Independent Verification Engineer
Software Quality Engineer
Other team members may be required to sign specific documents in addition to this core
group, depending on the content of the document. For example, a Configuration
Management Specialist is required to sign the Software Configuration Management Plan to
acknowledge acceptance of the CM processes defined therein.
The following documents are listed for reference only. Each document is applicable to this
plan only to the extent specified herein.
<Ref Doc> Plan for Software Aspects of Certification (Ref. DO-178C, 11.1)
<Ref Doc> Software Development Plan (Ref. DO-178C, 11.2)
<Ref Doc> Software Verification Plan (Ref. DO-178C, 11.3)
<Ref Doc> Software Configuration Management Plan (Ref. DO-178C, 11.4)
<Ref Doc> Software Quality Assurance Plan (Ref. DO-178C, 11.5)
<Ref Doc> Software Requirements Standards (Ref. DO-178C, 11.6)
<Ref Doc> Software Design Standards (Ref. DO-178C, 11.7)
<Ref Doc> Software Code Standards (Ref. DO-178C, 11.8)
<Ref Doc> Software Requirements Document (Ref. DO-178C, 11.9)
<Ref Doc> Software Design Description (Ref. DO-178C, 11.10)
<Ref Doc> Build Procedure for Source Code (Ref. DO-178C, 11.11)
<Ref Doc> Load Control for Executable Object Code (Ref. DO-178C, 11.12)
<Ref Doc> Software Verification Cases and Procedures (Ref. DO-178C, 11.13)
<Ref Doc> Software Verification Results (Ref. DO-178C, 11.14)
<Ref Doc> Software Environment Configuration Index (Ref. DO-178C, 11.15)
<Ref Doc> Software Configuration Index (Ref. DO-178C, 11.16)
<Ref Doc> Software Accomplishment Summary (Ref. DO-178C, 11.20)
<Example Text>
The Avionics Passenger Counter is a module that will keep track of how many passengers
are currently in the aircraft/cabin. The current number of passengers in the cabin will be
displayed on a display panel in real-time. The system will have a keypad entry so that the
flight attendant can enter a passenger headcount correction/adjustment. The passenger
headcount and any fault status information collected will be transmitted via ARINC 429 via
the PIC processor and ARINC 429 I/O FPGA.
The Data Acquisition PCB has four primary functions. They include…
<Example Text>
The passenger headcount function is performed by counting the number of entries and
exits. The module uses an Entry/Exit-Sensor to detect passengers’ movements in and out of
the cabin. The number of passengers in the cabin is tracked by an up/down counter in an
FPGA. The passenger load is displayed in real-time on the display panel. The keypad entry
can asynchronously load the counter thereby adjusting/correcting the passenger load on the
display/system.
Entry/Exit
Sensor
DISPLAY
F0 F1
Complex
IC - Reset
FPGA
Controller
F2
Keypad
7 8 9
4 5 6
1 2 3
0 RTN
F5
F3 F4
Power supply
F0
Hardware Faults
F1 Transmitter
Line Driver
ARINC 429
F2
PIC ARINC 429
Microcontroller FPGA
F3
F4
F5
The system is composed of diagnostics and other fail-safe mechanisms used to ensure that
failures of the system are detected and that the system goes to a safe state if it's unable to
perform a safety function.
3.2 Processor #1
3.2.2 Tasks
3.3 Processor #2
3.3.2 Tasks
How is the operational software protected from the activation of this code?
The Boot Load Code is partitioned from the operational software and, if activated during
flight, the crew will see a fault indication. Anomalous behavior of the Boot Load software,
as shown by the system safety assessment, would cause or contribute to a failure of system
function with no effect on aircraft operational capability or pilot workload. Software whose
anomalous behavior would cause or contribute to a failure of the system function with no
effect on aircraft operational capability or pilot workload is identified as Level E.
The system is composed of diagnostics and other fail-safe mechanisms used to ensure that
failures of the system are detected and that the system goes to a safe state if it's unable to
perform a safety function.
Safety monitoring software will be assigned the software level associated with the most
severe failure condition category for the monitored function.
Assessment of the system fault coverage of a monitor will be used to ensure that the
monitor's design and implementation are such that the faults which it is intended to
detect will be detected under all necessary conditions.
The monitor and protective mechanism will not be rendered inoperative by the same
failure that causes the failure condition.
3.8 Redundancy
<Information Here If Applicable>
The software will be designed so that it will continue to operate, possibly at a reduced level,
rather than failing completely, when some part of the system fails. During this condition, a
visible fault indication will be present.
The development team understands that numerous types of problems can arise when the
software misses its timing constraints. Two types of constraints are recognized: hard timing
requirements and soft timing requirements. A hard timing requirement denotes that if a
constraint is missed, the program is in error; a late result is just as bad as a wrong result. A
soft timing requirement indicates a constraint that the program should obtain on average,
or one in which the value of the result degrades with time; occasionally missing a deadline
is not considered an error.
The following timing-related problems that will be addressed in the system architecture:
Priority inversion
It is recognized that such problems may go undetected by verification testing alone, since
they only occur under specific timing conditions. As such, code review analysis is combined
with testing to aid in uncovering these problems.
The certification basis for the software is Title 14 CFR 2x.1301 and 14 CFR 2x.1309.
RTCA/DO-178C has been selected as the means of compliance. The objectives will be
satisfied during the lifecycle development and integral processes. The Quality Assurance
Engineer will compile applicable artifacts and submit them to the Certification Authority.
Verification objectives are satisfied through a combination of reviews and analysis, the
development of test cases and procedures, and the subsequent execution of those test
procedures. Reviews and analysis provide an assessment of the accuracy, completeness,
and verifiability of the requirements, architecture, and design implementation.
The product will be developed in compliance with the following:
Issue Paper SE-3.5 Use of Commercial Off The Shelf Software in Aircraft Avionics
Systems