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P410G8TS81 TimeSync Server Adapter STS2 PDF

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101 views4 pages

P410G8TS81 TimeSync Server Adapter STS2 PDF

Uploaded by

gameOver
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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P410G8TS81 TimeSync Server Adapter

8 Ports 10 Gigabit Ethernet Grand Master, Boundary Clock, Slave Clock, PCIe
GEN4 TimeSync card

Product Description

Silicom’s Time Sync (STS2) P410G8TS81 is a 1/10 Gigabit


Ethernet PCI Express Gen4 TimeSync server adapter, designed
for X86 Servers and high-end appliances.
The 1/10 Gigabit Ethernet TimeSync PCIe server adapter is
based on Intel E810 chipset and best in the industry timing
solution targeting 5G Class C wireless base station and carrier-
grade systems.
Silicom’s STS2 Support 8 port of 1G/10G capabilities to synchronize host system with external clock source using 1PPS and
10MHz. The STS2 TimeSync server adapter support both 1588v2/PTP and SyncE for high clock accuracy in Master and Slave
mode. STS1 design is meeting O-RAN requirements for LLS- C1, LLS-C2 and LLS-C3, modes of operations with both Boundary
and Transparent clocks.

Silicom STS line card for 4G and 5G NIC enable real-time data
transmission with high timing accuracy at the lowest cost to power
5G DRAN and CRAN edge deployments:

• Support 1588/PTP over IPv4 / IPV6, IEEE1588v2

• Support SyncE /ITU-T G.8262

• T-BC/T-TSC Boundary Clock and TSC Slave Clock /G.8273.2

• T-GM Grand Master /G.8273.1 per G.8275.1 PTP Profile

• PRTC Primary Reference Time Clock Class B/G.8272

• T-TC Transparent Clock /G.8273.3

• 1588 Software Stack and Servo Software in x86

Page 1 Silicom Ltd. Connectivity Solutions


Key Features

TimeSync:
• Supports PTP Transparent Clock (TC) Boundary Clock (BC) OC (Master / Slave)
• Supports Grand Master clock per G.8275.1 Class-A PRTC/T-GM
• PTP over IPv4 / IPV6 (IEEE-1588v2) / SyncE
• One step and two step clock modes operation for PTP Master
• 10Mhz and 1PPS programmable output
• Full HW and SW TimeSync solution based on industry leading DPLL, Servo stack and PTP1588
• Incorporated accurate OCXO
• Global Navigation Satellite System (GNSS) receiver include Indians NAVIC (IRNSS) satellites support
• Packet and physical-layer frequency, phase and time synchronization
• Enable 5G/Class C wireless application

LAN and Virtualization Features:


• SR-IOV (Single Root I/O Virtualization): up to 256 Virtual Functions
• Partially Programmable Pipeline and Advanced Traffic Steering
• Intel® Ethernet Flow Director – 8000 On-Die perfect match filters
• 1536 queues/Physical Function (PF), >64 RSS/PF and 256 VMDq/PF

Technical Information

Silicom Time Sync

Profile: IEEE-1588 ( 2008) ( Annex-J.3 Ordinary Clock – Server


Delay Request-Respond Default Ordinary Clock- Client ( including slave only OC)
Profile Boundary Clock

Ordinary Clock – Server


Profile: IEEE-1588 ( 2008) ( Annex-J.4
Ordinary Clock- Client ( including slave only OC)
Peer-to-Peer
Boundary Clock

Profile: ITU-T G.8265.1 Telecom


Telecom Grandmaster
Profile for Frequency
Telecom Slave
Synchronization

Profile: ITU-T G.8275.1 PTP Telecom Telecom Grandmaster ( T-GM)


Profile for Phase with Full timing Telecom Boundary Clock ( T-BC)
Support Telecom Time Slave Clock ( T-TSC)

Profile: ITU-T G.8275.2 PTP Telecom Telecom Grandmaster ( T-GM)


Profile for Phase with Partial timing Assisted / Partial Telecom Boundary Clock ( T-BC)
Support Assisted / Partial Telecom Time Slave Clock ( T-TSC)

Ordinary Clock
Device Types: Boundary Clock
Transparent Clock (peer-delay-message exchange)

Page 2 Silicom Ltd. Connectivity Solutions


Default BMCA (Best Master Clock Algorithm)
References Selection: Alternate BMCA based on ITU G.781 – Synchronization layer functions for frequency
synchronization based on the physical layer

PTP/UDP/IPv4 Annex D
Transport Mappings: PTP/UDP/IPv6 Annex E
PTP/Ethernet Annex F

NIC TS (Time Stamp) granularity: 1ns

General Technical Specifications: 8 Ports P410G8TS81-XR

Interface Standard: PCI-Express Base Specification Revision 4.0 (16 GTs)

Single slot Standard height add-in card:


Board Size:
167.64mm X 111,15 mm(6.6”X 4.376”) single slot

PCI Express Card Type: x16 Lane, bifurcation

+12V +/-8%
Voltage: +3.3+/- 8%
+3V3VAUX/ +12VAUX

PCI Connector: Gold Finger: x16 Lane

Controllers: Intel E810-CAM2

1588/ SyncE PHY: (8x10G/1G)

DPLL: 1588 / SyncE

Network ports: 1xQSFP+, 4xSFP+

Management port: RJ45 on daughter card

Holder: Metal Bracket

Power Consumption: 25[w]

Operating Temperature: 0°C – 45°C (32°F – 113°F)

Storage: -40°C–65°C (-40°F–149°F)

Regulation: CE, FCC Class B, ROHS requirements.

QSFP+ 10Gigabit Ethernet Technical Specifications Adapters:

QSFP (Small Form Factor Pluggable) (x4) SFI interfaces supports 10GBase-R PCS and 10 Gigabit PMA in order to connect
supports: with QSFP to 10GBase-SR/ LR (MPO)

10GBase-SR QSFP:
Fiber 10Gigabit Ethernet
IEEE Standard / Network topology:

10GBase-LR QSFP:
Fiber 10Gigabit Ethernet, 10GBASE-LR (1310nM LAN PHY)
IEEE Standard / Network topology:

Page 3 Silicom Ltd. Connectivity Solutions


10GBase-LR QSFP:
Single-Mode: 10000m at 9um
Cables and Operating distance Up to:

Order Information

P/N Description Notes

8 Port QSFP 10 Gigabit Ethernet PCI x8 Gen 4, x16 mechanical form factor, FHHL Single
P410G8TS81-XR
Express Server Adapter Slot

8 Port 10 Gigabit (SR) Ethernet GM/ STS2, x16 Gen4, Electrical x8G4, x8 G4, FHHL single
P410G8TS81-SR
TimeSync PCI Express Server Adapter slot

TimeSync SMA MB Kit, Full


TS-MB-F5-200X5
height,5xSMA,5x200mm cables

TimeSync SMA MB Kit, LP,5xSMA,


TS-MB-L5-200X5
200mm cables

Page 4 Silicom Ltd. Connectivity Solutions

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