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Lecture 1.1.3 (Overview of Memory and IO Addressing)

This document discusses three approaches to connecting memory and input/output (I/O) devices to the system bus: 1) separate address/control/data buses for memory and I/O, 2) common address/data buses but separate control lines, and 3) a fully common bus. It focuses on isolated I/O, where the address spaces are separate but address/data buses are shared, and memory-mapped I/O, where the address spaces are combined. Memory-mapped I/O simplifies logic but reduces available memory addresses, while isolated I/O has separate control but requires more buses.

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0% found this document useful (0 votes)
249 views3 pages

Lecture 1.1.3 (Overview of Memory and IO Addressing)

This document discusses three approaches to connecting memory and input/output (I/O) devices to the system bus: 1) separate address/control/data buses for memory and I/O, 2) common address/data buses but separate control lines, and 3) a fully common bus. It focuses on isolated I/O, where the address spaces are separate but address/data buses are shared, and memory-mapped I/O, where the address spaces are combined. Memory-mapped I/O simplifies logic but reduces available memory addresses, while isolated I/O has separate control but requires more buses.

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Lecture 1.1.

3 (Overview of memory and I/O addressing)


Overview of memory and I/O addressing:
As a CPU needs to communicate with the various memory and input-output devices (I/O) as we
know data between the processor and these devices flow with the help of the system bus. There are
three ways in which system bus can be allotted to them:
1. Separate set of address, control and data bus to I/O and memory.
2. Have common bus (data and address) for I/O and memory but separate control lines.
3. Have common bus (data, address, and control) for I/O and memory.
In first case it is simple because both have different set of address space and instruction but require
more buses.
Isolated I/O –
Then we have Isolated I/O in which we Have common bus (data and address) for I/O and memory
but separate read and write control lines for I/O. So, when CPU decode instruction then if data is for
I/O then it places the address on the address line and set I/O read or write control line on due to
which data transfer occurs between CPU and I/O. As the address space of memory and I/O is
isolated and the name is so. The address for I/O here is called ports. Here we have different read-
write instruction for both I/O and memory.

Memory Mapped I/O


In this case every bus in common due to which the same set of instructions work for memory and
I/O. Hence, we manipulate I/O same as memory and both have same address space, due to which
addressing capability of memory become less because some part is occupied by the
I/O. 

Differences between memory mapped I/O and isolated I/O –

Isolated I/O Memory Mapped I/O

Memory and I/O have separate address space Both have same address space

Due to addition of I/O addressable memory


All address can be used by the memory become less for memory

Separate instruction control read and write Same instructions can control both I/O and
operation in I/O and Memory Memory

In this I/O address are called ports. Normal memory address are for both

More efficient due to separate buses Lesser efficient

Larger in size due to more buses Smaller in size

It is complex due to separate logic is used to Simpler logic is used as I/O is also treated as
control both. memory only.

References
Reference Books:

 J.P. Hayes, “Computer Architecture and Organization”, Third Edition.

 Mano, M., “Computer System Architecture”, Third Edition, Prentice Hall.

 Stallings, W., “Computer Organization and Architecture”, Eighth Edition, Pearson Education.
Text Books:
 Carpinelli J.D,” Computer systems organization &Architecture”, Fourth Edition, Addison
Wesley.

 Patterson and Hennessy, “Computer Architecture” , Fifth Edition Morgaon Kauffman.


Reference Website

 Memory mapped I/O and Isolated I/O - GeeksforGeeks


 Memory Maps and I/O Addressing | Basics of Programmable Logic Controllers (PLCs) |
Automation Textbook
 Memory and I/O Interfacing - javatpoint

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