Mes Redo
Mes Redo
Mes Redo
Module 1
1. Briefly describe 8051 assembler directives.
Solution:
1. ORG (origin)
➢ The ORG directive is used to indicate the beginning of the address
➢ The number that comes after ORG can be either in hex and decimal
➢ If the number is not followed by H, it is decimal and the assembler will convert it
to hex
2. END
➢ This indicates to the assembler the end of the source (asm) file
➢ The END directive is the last line of an 8051 program
➢ Mean that in the code anything after the END directive is ignored by the
assembler
• EQU (equate)
➢ This is used to define a constant without occupying a memory location
➢ The EQU directive does not set aside storage for a data item but associates a
constant value with a data label
➢ When the label appears in the program, its constant value will be substituted for
the label
2. With a neat diagram explain the program status word (PSW) register.
Solution:
1. The program status word (PSW) register, also referred to as the flag register, is an 8 bit register
1. Only 6 bits are used
1. These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow)
1. They are called conditional flags, meaning that they indicate some
conditions that resulted after an instruction was executed
2. The PSW3 and PSW4 are designed as RS0 and RS1, and are used to change the
bank
2. The two unused bits are user-definable
3. Give a suitable diagram depicting 8051 register banks and their RAM addresses.
Solution:
General-purpose microprocessors
1. Must add RAM, ROMI/O ports, and timers externally to make them functional
2. Make the system bulkier and much more expensive
3. Have the advantage of versatility on the amount of RAM, ROM, and I/O ports
Microcontroller
1. The fixed amount of on-chip ROM, RAM, and number of I/O ports makes them ideal for
many applications in which cost and space are critical
2. In many applications, the space it takes, the power it consumes, and the price per unit are
much more critical considerations than the computing power
Key points
1. 128 bytes of RAM
2. 4K bytes of on-chip ROM
3. Two timers
4. One serial port
5. Four I/O ports, each 8 bits wide
6. 6 interrupt source
Module 2
1. With suitable examples, describe various addressing modes supported by 8051
microcontroller.
Solution:
Solution:
#include <reg51.h>
sbit SW = P1^7;
sbit IND = P1^0;
sbit WAVE = P2^5;
void timer0(void) interrupt 1
{
WAVE = ~WAVE;
SW = WAVE;
}
void main ()
{
SW = 1;
TMOD = 0X02;
TH0 = 0XA4;
IE = 0X82;
TR0 = 1;
while (1)
{
IND = SW;
}
}
Solution:
4. explain serial data transfer. Emphasize the role of start and stop bits in serial
communication.
Solution:
1. At the transmitting end, the byte of data must be converted to serial bits using parallel-
in-serial-out shift register
2. At the receiving end, there is a serial-in-parallel-out shift register to receive the serial data
and pack them into byte
3. When the distance is short, the digital signal can be transferred as it is on a simple wire
and requires no modulation
4. If data is to be transferred on the telephone line, it must be converted from 0s and 1s to
audio tones
1. This conversion is performed by a device called a modem,
“Modulator/demodulator”
1. Asynchronous serial data communication is widely used for character-oriented
transmissions
1. Each character is placed in between start and stop bits, this is called framing
2. Block-oriented data transfers use the synchronous method
2. The start bit is always one bit, but the stop bit can be one or two bits
Module 3
Solution:
1. There are two activation levels for the external hardware interrupts
1. Level trigged
2. Edge trigged
2. In the level-triggered mode, INT0 and INT1 pins are normally high
1. If a low-level signal is applied to them, it triggers the interrupt
2. Then the microcontroller stops whatever it is doing and jumps to the interrupt
vector table to service that interrupt
3. The low-level signal at the INT pin must be removed before the execution of the
last instruction of the ISR, RETI; otherwise, another interrupt will be generated
3. This is called a level-triggered or level activated interrupt and is the default mode upon
reset of the 8051
4. Pins P3.2 and P3.3 are used for normal I/O unless the INT0 and INT1 bits in the IE
register are enabled
5. After the hardware interrupts in the IE register are enabled, the controller keeps sampling
the INTn pin for a low-level signal once each machine cycle
6. To ensure the activation of the hardware interrupt at the INTn pin, make sure that the
duration of the low-level signal is around 4 machine cycles, but no more
2. Illustrate interfacing of 4x4 matrix keyboard with 8051 microcontroller with a neat
diagram.
Solution:
Solution:
#include<reg51.h>
sbit rs=P1^0;
sbit rw=P1^1;
sbit en=P1^2;
void lcdcmd(unsigned char);
void lcddat(unsigned char);
void delay();
void main()
{
P2=0x00;
while(1)
{
lcdcmd(0x38);
delay();
lcdcmd(0x01);
delay();
lcdcmd(0x0c);
delay();
lcddat('C');
delay();
lcddat('S');
delay();
lcddat('E');
delay();
lcddat(' ');
delay();
lcddat('D');
delay();
lcddat('E');
delay();
lcddat('P');
delay();
lcddat('T');
delay();
}
}
void lcdcmd(unsigned char val)
{
P2=val;
rs=0;
rw=0;
en=1;
delay();
en=0;
}
void lcddat(unsigned char val)
{
P2=val;
rs=1;
rw=0;
en=1;
delay();
en=0;
}
void delay()
{
unsigned int i;
for(i=0;i<12000;i++);
}
Solution:
1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on
the stack
2. It also saves the current status of all the interrupts internally (i.e: not on the stack)
3. It jumps to a fixed location in memory, called the interrupt vector table, that holds the address
of the ISR
4. The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it
1. It starts to execute the interrupt service subroutine until it reaches the last
instruction of the subroutine which is RETI (return from interrupt)
5. Upon executing the RETI instruction, the microcontroller returns to the place where it was
interrupted
1. First, it gets the program counter (PC) address from the stack by popping the top
two bytes of the stack into the PC
2. Then it starts to execute from that address
Solution:
#include <reg51.h>
void main()
{
unsigned char WAVEVALUE[] = { 128,192,238,255, 238,192,128,64, 17, 0,17,64} ;
unsigned char x;
while(1)
{
for(x=0;x<12;x++)
{
P1 = WAVEVALUE[x];
}
}
}
6. Briefly discuss about RI and TI flags.
Solution:
1. TI (transfer interrupt) is raised when the last bit of the framed data, the stop bit, is
transferred, indicating that the SBUF register is ready to transfer the next byte
2. RI (received interrupt) is raised when the entire frame of data, including the stop bit, is
received
1.In other words, when the SBUF register has a byte, RI is raised to indicate that
the received byte needs to be picked up before it is lost (overrun) by new incoming serial data
1. In the 8051 there is only one interrupt set aside for serial communication
2. This interrupt is used to both send and receive data
3. If the interrupt bit in the IE register (IE.4) is enabled, when RI or TI is raised the 8051
gets interrupted and jumps to memory location 0023H to execute the ISR
4. In that ISR we must examine the TI and RI flags to see which one caused the interrupt
and respond accordingly
7. With a neat block diagram, explain the steps to generate the time delay in mode 2 of
the timer (8 – bit auto reload).
Solution:
1. Load the TMOD value register indicating which timer (timer 0 or timer 1) is to be used,
and the timer mode (mode 2) is selected
2. Load the TH registers with the initial count value
3. Start timer
4. Keep monitoring the timer flag (TF) with the JNB TFx,target instruction to see whether it
is raised
5. Get out of the loop when TF goes high
6. Clear the TF flag
7. Go back to Step4, since mode 2 is auto-reload
Solution:
Module 4
1. Define embedded system and explain the special features of embedded system
Solution:
Embedded System can be defined as a computing device that does a specific focused job.
Solution:
Processor Power
➢ The growing importance of embedded systems can be gauged by the availability of
processors
➢ Around 150 variety processors – around 50 semiconductor vendors
➢ 8, 16, 32, 64 bit microcontrollers and microprocessors
Memory
• Cost of memory chips reducing day by day
• Embedded systems can be made functionally rich by incorporating additional features
such as networking protocol and even graphical UI
• Porting an OS is no longer an issue.
• Wrist watches – embedded linux OS
Operating Systems
• Desktop – limited OS options
• Variety of operating systems are available
• Software development is very fast and maintaining the code is very easy
• High level language can be used for software development. So time to market is reduced
• Programmable Logic Devices (PLDs) and Field Programmable Gate Arrays (FPGAs)
pave the way for reducing the components on an embedded system
• After developing the prototype of an embedded system, for mass production an FPGA
can be developed which will have all the functionalities
• SoC – a single chip is the embedded system
Solution:
Based on functionality and performance requirements,
a. Stand-alone embedded systems
b. Real-time systems
c. Networked information appliances
d. Mobile devices
a. Embedded systems that are provided with network interfaces and accessed by
networks such as local area network or the internet are called networked information
appliances.
b. A networked process control system consists of a number of embedded systems
connected as a local are network. Each embedded system can send real-time data to a
central location from where the entire process control system can be monitored.
Mobile Devices
u. Limitations of mobile devices – memory constraints, small size, lack of good user
interfaces such as full fledged keyboard, display are the same found in the embedded
systems
Solution:
Consumer Appliances
• Digital camera, DVD player, electronic toys, microwave oven, remote controls, VCD
player, video game consoles, video recorders etc.
• Embedded System in cars, Wrist watches
Office Automation
• Copying machine, fax machine, telephone, modem, printer, scanner etc
Industrial Automation
• Industries use embedded systems for process control
• Pharma, cement, sugar, oil exploration, nuclear energy, electricity generation and
transmission.
• Embedded systems are designed to carryout specific tasks such as monitoring the
temperature, pressure, humidity, voltage, current etc then take appropriate action based
on the monitored levels
• Robots
Medical Electronics
• ECG, EEG, blood pressure measuring devices, X-ray scanners, blood analysis equipment,
radiation, colonoscopy, endoscopy etc.
Computer Networking
• Networking products such as bridges, routers, Integrated services digital networks, frame
relay switches are embedded systems which implement data communication protocol
Telecommunications
• Subscriber terminal: Telephone, ISDN phones, terminal adapters, web cameras
• Network equipment: multiplexers, multiple access systems, packet assemblers
disassemblers, satellite modems etc.
Wireless Technologies
• Mobile phones, PDAs, Palmtops, base station controllers, mobile switching centers
Instrumentation
• Measuring instruments: weight, temperature, pressure, humidity, voltage, current etc.
• Test equipment: oscilloscope, spectrum analyser, logic analyser, protocol analyser etc.
Security
• Security devices at homes, offices, airports etc for authentication and verification
• ATM machines
5. With a neat diagram explain simplified hardware architecture of an embedded system.
Solution:
CPU
• Microcontroller, microprocessor or DSP
• A microcontroller is a low cost processor. Its main attraction is that on the chip itself
there will be many other components such as memory, serial communication interface,
ADC etc. So for small applications microcontroller is the best choice.
• Microprocessors are more powerful but more external components are required
• DSP is used mainly for applications in which signal processing is involved
Memory
• RAM and ROM
• RAM – erased if power is switched off
• ROM – retains the contents even if power is switched off
• So Firmware is stored in ROM
Input devices
• No keyboard(full-size) or mouse and hence interacting with the embedded system is no
easy task
• Many embedded systems will have small keyboard – keys have specific function
• Many Embedded systems in process control do not have input devices – they take input
from sensors
Output devices
• LEDs to indicate health status of system modules, LCD etc
Communication interfaces
• Embedded systems may need to interact with other embedded systems or they may have
to transmit data to a desktop
Solution:
1. The source code is written on the host system, compiled and linked using cross-
platform development tools and then downloaded onto the target and tested.
2. If the software is not working as per requirements, it can be debugged on the target
itself.
3. After ensuring that everything is OK, the executable image is transferred to ROM or
Flash memory. Then, the embedded system can run on its own.
4. As the processors on the host system and the target system will be different a
number of cross platform development tools are required. These tools are
1. Cross-compiler
2. Cross-assembler
3. Cross-linker
4. Cross-debugger
5. Cross-compiled libraries
6.Operating system dependent libraries and headers for target processor
The executable image can be transferred to the target hardware by one of the following
mechanisms:
2. With a neat diagram explain the TCP/IP Protocol suite and its layers.
Solution:
1. Physical Layer:
1. This layer defines the characteristics of the transmission such as data and signal
encoding scheme.
2. Data Link Layer:
1. Defines the protocols to manage the links, establishing a link, transferring the data
received from the upper layers, and disconnecting the link.
2. In LAN This layer divided into 2 sub layers
1.Medium Access control(MAC) sub layer
2.Logical Link Control(LIC) sub layer
3. Explain the following memory chips. 1)RAM 2) ROM and 3) Hybrid memory.
Solution:
RAM
1. Memory location can be accessed randomly
2. Its read-write chip as we can perform both read and write operation on it.
3. RAM is of 2 types
8. Static RAM(SRAM)
a. Its Loses its contents the moment power is switched off to the chip
b. It is faster and consumes less power
9. Dynamic RAM (DRAM)
a. It retains its contents for a fraction of second even if power is switched off to the
chip.
b. To keep its content intact, DRAM has to be refreshed periodically.
ROM
1. Used to store the firmware in embedded system because it retains its contents even if
power is switched off.
2. How to write data into the ROM Chip first time?
1. Some of the ROM are fused in the factory i.e Data is written in the factory and
then shipped.
2. Variety of ROM are available with different capabilities.
3. These are Programmable ROM and Erasable Programmable ROM
4. Programmable ROM(PROM)
1. PROM devices cab be programmed only once
2. When your firmware is ready, put it on the PROM and then mount the devices on
your embedded system
3. If firmware has bug you need to throw that PROM
Hybrid Memory
1. Electrically Erasable PROM(EEPROM)
1. It is similar to EPROM but it contents can be erased by applying electrical signal
to one the pins of the device.
2. Non Volatile RAM
1. It is SRAM with the battery backup.
2. So even if the power is switched off the battery will ensure that the contents are
not erased.
3. Flash Memory
1. It is type of EEPROM
2. These low cost chips are characterized by their fast read quality(but not fast
write)
3. Memory is divided into sectors or blocks.
Solution:
CISC
1. It has Large Instruction set
2. Large number of instruction are available to program the processor
3. The number of instructions required to do a job is very less and hence less memory is
required.
4. The number of registers in CISC processors is very small.
5. Aim is to reduce the software complexity by increasing the complexity of the processor
architecture.
6. Ex: Intel x86 family and Motorola 68000 series processors.
RISC
1. limited number of instructions.
2. A complex instruction is obtained as a sequence of simple instructions.
3. In RISC Processors the software is complex but processor architecture is simple.
4. Large number of registers are required in RISC processors, which are of small size and
consumes less power.
5. Pipelined instruction execution.
6. While one instruction is executed, second instruction is decoded and the third instruction
is fetched leading to faster execution of the program.
7. Ex: ARM, ATMEL AVR, MIPS, Microchip PIC, Power PC and Sun SPARC
5. Explain the following with neat diagram.
2)Harvard Architecture
Solution:
Von Neumann Architecture
1. Most widely used architecture
2. It has one memory chip- stores both instruction and data
3. Processor interacts with the memory through address and data buses to fetch instruction
and data.
Harvard Architecture
1. There are 2 separate memory blocks
1. Program memory- Stores Only instruction
2. Data Memory- Stores only data
2. 2 Pairs of data buses are used between CPU and the memory blocks
3. Program memory address bus and program memory data bus are used to access the
program memory.
4. Data memory address bus and the data memory data bus are used to access the data
memory
6. Explain the different categories of operating system?
Solution:
1. Single-tasking OS versus Multi-tasking OS:
1. In a single tasking OS, only one task is carried out at a time.
2. For instance, if you are using a word processor you have to quit this application
before invoking another application, say a game.
2. In a multitasking OS, multiple tasks can be run simultaneously.
3. For example, you can play a game while getting connected to the Internet and
downloading a file.
4. In a multitasking system, there may be only one CPU, but the CPU is shared by all the
tasks.
5. MS DOS is a single tasking operating system. Windows and Unix are multitasking
operating systems.
6. Single user OS versus Multi-user OS:
1. In a single-user OS, only one user can use the system at a time
2. In a multi-user system, multiple users can share the system simultaneously.
3. In a multi-tasking system, the application run by each user is given a small slice
of time, say 10 msec.
7. Command-driven OS versus GUI-based OS:
1. An important function of the OS is to provide an is interface to the user to access
the computers resources. The user has to give instructions to the computer to carry
out various tasks one method of giving commands such as copy x.c y.c: through
the keyboard.
2. MS DOS is command driven OS