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Cao Syllabus

The document outlines the topics covered in a course on computer architecture and organization. Section A covers boolean algebra, logic gates, combinational and sequential logic blocks. Section B discusses instruction set architecture, addressing modes, and instruction set formats. Section C explains CPU architecture, fetch-decode-execute cycles, pipelining, and memory hierarchy. Section D introduces parallelism, instruction level parallelism through pipelining and superscaling, and processor level parallelism through multiprocessor systems. The document also lists several recommended textbooks.

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0% found this document useful (0 votes)
328 views2 pages

Cao Syllabus

The document outlines the topics covered in a course on computer architecture and organization. Section A covers boolean algebra, logic gates, combinational and sequential logic blocks. Section B discusses instruction set architecture, addressing modes, and instruction set formats. Section C explains CPU architecture, fetch-decode-execute cycles, pipelining, and memory hierarchy. Section D introduces parallelism, instruction level parallelism through pipelining and superscaling, and processor level parallelism through multiprocessor systems. The document also lists several recommended textbooks.

Uploaded by

Niyati Bansal
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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CSE- 210 F Computer Architecture & Organization Section A: Boolean algebra and Logic gates, Combinational logic blocks(Adders,

Multiplexers, Encoders, decoder), Sequential logic blocks(Latches, Flip-Flops, Registers, Counters) Store program control concept, Flynns classification of computers (SISD, MISD, MIMD); Multilevel viewpoint of a machine: digital logic, micro architecture, ISA, operating systems, high level language; structured organization; CPU, caches, main memory, secondary memory units & I/O; Performance metrics; MIPS, MFLOPS. Section B: Instruction Set Architecture: Instruction set based classification of processors (RISC, CISC, and their comparison); addressing modes: register, immediate, direct, indirect, indexed; Operations in the instruction set; Arithmetic and Logical, Data Transfer, Control Flow; Instruction set formats (fixed, variable, hybrid); Language of the machine: 8086 ; simulation using MSAM. Section C: Basic non pipelined CPU Architecture and Memory Hierarchy & I/O Techniques CPU Architecture types (accumulator, register, stack, memory/ register) detailed data path of a typical register based CPU, Fetch-Decode-Execute cycle (typically 3 to 5 stage); microinstruction sequencing, implementation of control unit, Enhancing performance with pipelining. The need for a memory hierarchy (Locality of reference principle, Memory hierarchy in practice: Cache, main memory and secondary memory, Memory parameters: access/ cycle time, cost per bit); Main memory (Semiconductor RAM & ROM organization, memory expansion, Static & dynamic memory types); Cache memory (Associative & direct mapped cache organizations. Section D: Introduction to Parallelism and Computer Organization [80x86]: Goals of parallelism (Exploitation of concurrency, throughput enhancement); Amdahls law; Instruction level parallelism (pipelining, super scaling basic features); Processor level parallelism (Multiprocessor systems overview). Instruction codes, computer register, computer instructions, timing and control, instruction cycle, type of instructions, memory reference, register reference. I/O reference, Basics of Logic Design, accumulator logic, Control memory, address sequencing, micro-instruction formats, micro-program sequencer, Stack Organization, Instruction Formats, Types of interrupts; Memory Hierarchy.

Text Books: Computer Organization and Design, 2 Ed., by David A. Patterson and John L. Hennessy, Morgan 1997, Kauffmann. Computer Architecture and Organization, 3 Edi, by John P. Hayes, 1998, TMH. Reference Books: Operating Systems Internals and Design Principles by William Stallings,4th edition, 2001, PrenticeHall Upper Saddle River, New Jersey Computer Organization, 5th Edi, by Carl Hamacher, Zvonko Vranesic,2002, Safwat Zaky. Structured Computer Organisation by A.S. Tanenbaum, 4th edition, Prentice-Hall of India, 1999, Eastern Economic Edition. Computer Organisation & Architecture: Designing for performance by W. Stallings, 4 edition, 1996, Prentice-Hall International edition. Computer System Architecture by M. Mano, 2001, Prentice-Hall. Computer Architecture- Nicholas Carter, 2002, T.M.H.

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