0% found this document useful (0 votes)
165 views8 pages

AND, 6502 AND - Logical AND: Information About The 6502 AND Instruction

The document provides information about the AND instruction for the 6502 microprocessor. It describes the AND operation as performing a logical AND between the accumulator and data from a specified location. It then lists the 7 addressing modes for AND and provides an opcode, example, and cycle count for each.

Uploaded by

Chelle Brucal
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
165 views8 pages

AND, 6502 AND - Logical AND: Information About The 6502 AND Instruction

The document provides information about the AND instruction for the 6502 microprocessor. It describes the AND operation as performing a logical AND between the accumulator and data from a specified location. It then lists the 7 addressing modes for AND and provides an opcode, example, and cycle count for each.

Uploaded by

Chelle Brucal
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 8

http://www.6502.buss.

hk/6502-instruction-set/and AND, 6502 AND - Logical AND


Information about the 6502 AND Instruction AND --- stands for Logical AND (with accumulator) AND operation is one of the Logical operations in 6502 Instruction-set. This is the logical AND operation between the content of Accumulator and the content at a specifical location. Possible flag status of the 6502 AND Instruction

SR Flags of 6502 AND Instruction 7 6 5 4 3 2 1 0 Negative Overflow Break Decimal Interrupt Zero Carry N V B D I Z C + + Addressing Mode Summary of the 6502 AND Instruction Addressing Mode Summary of the 6502 AND Instruction Example Bytes Example Explanation Opcode Cycles Logical AND operation between $10 (Decimal Immediate AND #10 29 10 2 16) and the content of the Accumulator Logical AND operation between the content Zero Page AND $00 of Accumulator and the content of zero page 25 00 3 address $00 Logical AND operation between the content of Accumulator and the content located at zero Zero Page,X AND $10,X 35 10 4 page with address calculated from $10 adding content of X Logical AND operation between the content Absolute AND $1234 of Accumulator and the content located at 2D 34 12 4 address $1234 Logical AND operation between the content 4 of Accumulator and the content located at (+1 if Absolute,X AND $1234,X 3D 34 12 address calculated from $1234 adding content page of X crossed) Absolute,Y AND $1234,Y Logical AND operation between the content 39 34 12 4 of Accumulator and the content located at the (+1 if Addressing Mode

address calculated from $1234 adding content of Y Logical AND operation between the content of Accumulator and the content located at the (Indirect,X) AND ($20,X) address obtained from the address calculated from "$20 adding content of X" Logical AND operation between the content of Accumulator and the content located at the (Indirect),Y AND ($20),Y address calculated from "the value stored in the address $20" adding content of Y

page crossed) 21 20 6

31 20

5 (+1 if page crossed)

EOR, 6502 EOR - Exclusive OR


Information about the 6502 EOR Instruction EOR --- EOR stands for Exclusive OR (with Accumulator) EOR is one of the Logical operations in 6502 Instruction-set. EOR operations perform a bitwise logical exclusive-OR between the content of Accumulator and content specified in specific location. There are seven opcodes of EOR representing seven different addressing mode. Possible flag status of the 6502 EOR Instruction SR Flags of 6502 EOR Instruction 7 6 5 4 3 2 1 0 Negative Overflow Break Decimal Interrupt Zero Carry N V B D I Z C + + Addressing Mode Summary of the 6502 EOR Instruction Addressing Mode Summary of 6502 EOR Instruction Addressing Example Example Explanation Mode Opcode Logical EOR operation between $10 (Decimal Immediate EOR #10 49 10 16) and the content of the Accumulator. Logical EOR operation between the content Zero Page EOR $00 of Accumulator and the content of zero page 45 00 address $00 Zero Page,X EOR $10,X Logical EOR operation between the content 55 10 of Accumulator and the content located at zero

Bytes Cycles 2 3 4

Absolute

Absolute,X

Absolute,Y

(Indirect,X)

(Indirect),Y

page with address calculated from $10 adding content of Index Register X Logical EOR operation between the content EOR $1234 of Accumulator and the content located at 4D 34 12 4 address $1234 Logical EOR operation between the content 4 of Accumulator and the content located at (+1 if EOR $1234,X 5D 34 12 address calculated from $1234 adding content page of Index Register X crossed) Logical EOR operation between the content 4 of Accumulator and the content located at (+1 if EOR $1234,Y 59 34 12 address calculated from $1234 adding content page of Index Register Y crossed) Logical EOR operation between the content of Accumulator and the content located at the EOR ($20,X) 41 20 6 address obtained from the address calculated from "$20 adding content of Index Register X" Logical EOR operation between the content of Accumulator and the content located at the 5 (+1 if EOR ($20),Y address calculated from "the value stored in the 51 20 page address $20" adding content of Index Register crossed) Y

ORA- 6502 ORA, ORA with Accumulator


Information about the 6502 ORA Instruction ORA --- OR with Accumulator It is one of the Logical operations in 6502 Instruction-set. ORA operations is the logical OR operation between the content of Accumulator and content specified in other location. Information about the 6502 ORA Instruction

SR Flags of the 6502 ORA Instruction 7 6 5 4 3 2 1 0 Negative Overflow Break Decimal Interrupt Zero Carry N V B D I Z C + + Addressing Mode Summary of the 6502 ORA Instruction

Addressing Mode Summary of 6502 ORA Instructure Addressing Example Example Explanation Mode Opcode Logical OR operation between $10 (Decimal Immediate ORA #10 09 10 16) and the content of the Accumulator Logical OR operation between the content Zero Page ORA $00 of Accumulator and the content of zero page 05 00 address $00 Logical OR operation between the content of Accumulator and the content located at zero Zero Page,X ORA $10,X 15 10 page with address calculated from $10 adding content of Index Register X Logical OR operation between the content Absolute ORA $1234 of Accumulator and the content located at 0D 34 12 address $1234 Logical OR operation between the content of Accumulator and the content located at Absolute,X ORA $1234,X 1D 34 12 address calculated from $1234 adding content of Index Register X Logical OR operation between the content of Accumulator and the content located at Absolute,Y ORA $1234,Y 19 34 12 address calculated from $1234 adding content of Index Register Y Logical OR operation between the content of Accumulator and the content located at the (Indirect,X) ORA ($20,X) 01 20 address obtained from the address calculated from "$20 adding content of Index Register X" Logical OR operation between the content of Accumulator and the content located at the (Indirect),Y ORA ($20),Y address calculated from "the value stored in the 11 20 address $20" adding content of Index Register Y

Bytes Cycles 2 3

4 4 (+1 if page crossed) 4 (+1 if page crossed) 6

5 (+1 if page crossed)

8080 Or Instructions
Syntax:ORA B Description:Or register B Code:B0 Format:Embedded Action:A = A && B Flags:SZAPC
SZ0P0

Syntax:ORA C

Description:Or register C Code:B1 Format:Embedded Action:A = A && C Flags:SZAPC


SZ0P0

Syntax:ORA D Description:Or register D Code:B2 Format:Embedded Action:A = A && D Flags:SZAPC


SZ0P0

Syntax:ORA E Description:Or register E Code:B3 Format:Embedded Action:A = A && E Flags:SZAPC


SZ0P0

Syntax:ORA H Description:Or register H Code:B4 Format:Embedded Action:A = A && H Flags:SZAPC


SZ0P0

Syntax:ORA L Description:Or register L Code:B5 Format:Embedded Action:A = A && L Flags:SZAPC


SZ0P0

Syntax:ORA M Description:Or memory Code:B6 Format:Embedded Action:A = A && (HL) Flags:SZAPC


SZ0P0

Syntax:ORA A Description:Or register A Code:B7 Format:Embedded Action:A = A && A

Flags:SZAPC
SZ0P0

Syntax:ORI Imm Description:Or immediate Code:F6 Format:Immediate Action:A = A && I Flags:SZAPC


SZ0P0

8080 And Instructions


Syntax:ANA B Description:And register B Code:A0 Format:Embedded Action:A = A && B Flags:SZAPC
SZ0P0

Syntax:ANA C Description:And register C Code:A1 Format:Embedded Action:A = A && C Flags:SZAPC


SZ0P0

Syntax:ANA D Description:And register D Code:A2 Format:Embedded Action:A = A && D Flags:SZAPC


SZ0P0

Syntax:ANA E Description:And register E Code:A3 Format:Embedded Action:A = A && E Flags:SZAPC


SZ0P0

Syntax:ANA H Description:And register H Code:A4 Format:Embedded Action:A = A && H Flags:SZAPC


SZ0P0

Syntax:ANA L Description:And register L Code:A5 Format:Embedded Action:A = A && L Flags:SZAPC


SZ0P0

Syntax:ANAM Description:And memory Code:A6 Format:Embedded Action:A = A && (HL) Flags:SZAPC


SZ0P0

Syntax:ANA A Description:And register A Code:A7 Format:Embedded Action:A = A && A Flags:SZAPC


SZ0P0

Syntax:ANI Imm Description:And immediate Code:E6 Format:Immediate Action:A = A && I Flags:SZAPC


SZ0P0

8080 and Z80


Logical Byte Instructions
8080 Mnemonic AND ANA A A ANA B B ANA C C ANA D D Z80 Mnemonic AND A AND B AND C AND D Machine Code A7 A0 A1 A2 Operation A <- A AND A <- A AND A <- A AND A <- A AND

ANA E E ANA H H ANA L L ANA M ----ANI byte

AND E AND H AND L AND (HL) AND (IX+index) AND (IY+index) AND byte A6 DDA6index FDA6index E6byte

A3 A4 A5

A <- A AND A <- A AND A <- A AND A <- A AND (HL) A <- A AND (IX+index) A <- A AND (IY+index) A <- A AND byte

EXCLUSIVE OR XRA A XOR A AF A <- A XOR A XRA B XOR B A8 A <- A XOR B XRA C XOR C A9 A <- A XOR C XRA D XOR D AA A <- A XOR D XRA E XOR E AB A <- A XOR E XRA H XOR H AC A <- A XOR H XRA L XOR L AD A <- A XOR L XRA M XOR (HL) AE A <- A XOR (HL) --- XOR (IX+index) DDAEindex A <- A XOR (IX+index) --- XOR (IY+index) FDAEindex A <- A XOR (IY+index) XRI byte XOR byte EEbyte A <- A XOR byte OR ORA A OR A B7 A <- A OR A ORA B OR B B0 A <- A OR B ORA C OR C B1 A <- A OR C ORA D OR D B2 A <- A OR D ORA E OR E B3 A <- A OR E ORA H OR H B4 A <- A OR H ORA L OR L B5 A <- A OR L ORA M OR (HL) B6 A <- A OR (HL) --- OR (IX+index) DDB6index A <- A OR (IX+index) --- OR (IY+index) FDB6index A <- A OR (IY+index) ORI byte OR byte F6byte A <- A OR byte

You might also like