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Ldco Insem Bank

This document covers two units on digital electronics: Unit 1 introduces logic families and their characteristics like fan-out, noise margin, speed and power. It includes examples of TTL and CMOS logic gates like the NAND gate and inverter. Operations using binary and two's complement are also covered. Unit 2 focuses on combinational logic design. It includes examples like a BCD to excess-3 code converter, half and full adders/subtractors, using a multiplexer to implement logic functions, and designing adders and comparators using common ICs. Minimization of logic functions and implementation using NAND gates and multiplexers is demonstrated.

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0% found this document useful (0 votes)
173 views2 pages

Ldco Insem Bank

This document covers two units on digital electronics: Unit 1 introduces logic families and their characteristics like fan-out, noise margin, speed and power. It includes examples of TTL and CMOS logic gates like the NAND gate and inverter. Operations using binary and two's complement are also covered. Unit 2 focuses on combinational logic design. It includes examples like a BCD to excess-3 code converter, half and full adders/subtractors, using a multiplexer to implement logic functions, and designing adders and comparators using common ICs. Minimization of logic functions and implementation using NAND gates and multiplexers is demonstrated.

Uploaded by

Shivam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit 1: Introduction to Digital Electronics

1) What is Logic family? Give the classification of logic families and also state and explain any
four characteristics of digital ICs. (05)

2) Explain the different characteristics of TTL IC (05)


a)Fan-out, b)Fan-IN, c)Noise Margin d)Noise Immunity ,
e)Power dissipation ,f)Speed Power product, g)Voltage and current parameters.

3) Explain with a neat circuit diagram the working of two i/p CMOS Nand gate (05)

4) With neat circuit diagram explain the working of TTL Nand gate. (05)
5) With neat circuit diagram explain the working of CMOS inverter. (05)

6) State merits and demerits of CMOS logic family. (05)

7) Compare TTL and CMOS logic families with datasheet parameters. (05)

8) Find the decimal equivalent of the following binary numbers assuming signed (05)
magnitude representation of the binary numbers
a. 1011
b. 001000
c. 0111
d. 1111

9) Find 2’s complement of the numbers, (05)

a. 01100100
b. 10010010
c. 11011000
d. 01100111
10) Perform the following operations using 2’s complement method (05)
a. 48 – 23
b. 23 – 48
c. 48 – (-23)
d. – 48 – 23

11). Convert the following binary numbers to their equivalent hex numbers (05)

a. 10100110101111

b. (0.00011110101101)
Unit 2: Combinational Logic Design

1) Design a BCD to excess -3 code converter (05)

2) Draw and explain Half adder and Full adder in detail (05)
3) Draw and explain Half subtractor and Full subtractor in detail (05)

4) Use a multiplexer to design the logic function F = A xor B xor C. (05)

5) Design the following function using single 4:1 MUX and logic gates .
F(A,B,C,D)= ∑m(0,1,5,9,10,15) (05)

6) Design BCD adder using binary adder (IC 7483). (05)

7) Design BCD subtractor using binary adder. (IC 7483). (05)

8) Design 2 bit comparator using suitable decoder (IC 74138 / IC 74139). (05)

9) Minimize the function using K-map implement using NAND gates only
F(A,B,C,D)= ∑m (0,1,3,5,6,9,11,13) (05)

10) Implement Full adder using Mux IC 74153. (05)

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