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The document describes the steps to design a processor that executes a subset of the PIC24E instruction set. This includes: 1) Implementing components like the program counter, program memory, registers, and data memory. 2) Designing a block diagram showing how the components interact. 3) Assigning opcodes to instructions and creating a truth table for the control signals.

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0% found this document useful (0 votes)
53 views5 pages

Pic 24

The document describes the steps to design a processor that executes a subset of the PIC24E instruction set. This includes: 1) Implementing components like the program counter, program memory, registers, and data memory. 2) Designing a block diagram showing how the components interact. 3) Assigning opcodes to instructions and creating a truth table for the control signals.

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Andrew X
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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To design a processor that will execute a subset of the PIC24E instruction set, the following steps can be

taken:

Implement the program counter (PC) as a 6-bit register. The PC will be used to keep track of the current
instruction being executed.

Implement the program memory with a 32x24 organization. Each instruction will occupy 24 bits of
memory and there will be 32 total instructions.

Implement 16 general registers, noted W0 - W15. These registers will be used to store data and perform
arithmetic operations.

Implement data memory with 16x16 organization + 3 special locations. The data memory will be used to
store data and variables. The special locations can be used for specific tasks such as storing flags or
program status.

Implement the instruction set by creating the necessary logic for each instruction. The instructions that
must be implemented in this project are:

ADD Wb, Ws, Wd: Adds the contents of register Ws and Wb and stores the result in register Wd.

SUB Wb, Ws, Wd: Subtracts the contents of register Wb from the contents of register Ws and stores the
result in register Wd.

AND Wb, Ws, Wd: Performs a bitwise AND operation on the contents of register Ws and Wb and stores
the result in register Wd.

IOR Wb, Ws, Wd: Performs a bitwise OR operation on the contents of register Ws and Wb and stores the
result in register Wd.

MOV Wns,f: Move the contents of register Wns to the memory location f.

MOV f, Wns: Move the contents of memory location f to register Wns.

BRA Expr: Unconditional jump to the address specified by Expr.

1.block diagram :

A block diagram is a visual representation of the different components of a system and how they
interact with each other. To create a block diagram for your processor design, we can follow these steps:
Start by creating a top-level block representing the processor as a whole. This block can be labeled with
the name of the processor and its main components.

Within the top-level block, add blocks representing the different components of the processor, such as
the program counter, program memory, data memory, and registers.

Connect the different components together using lines and arrows to show how data flows between
them. For example, data can flow from the program memory to the program counter, and then to the
instruction decoder.

Next, you can add a block for the instruction decoder. This component reads the instruction from the
program memory, decodes the opcode, and generates the control signals for the other components.

Add blocks for the Arithmetic and Logic Unit (ALU) and the Register File. These components will be used
to perform arithmetic operations and move data between registers.

Connect the ALU and Register File to the instruction decoder and data memory.

Add blocks for the inputs/outputs (I/O) and connect them to the ALU and data memory.

Add a block for the control unit, which generates the control signals for the other components based on
the instruction being executed.

Add a block for the clock, which synchronizes the operation of the processor and the input/output
devices.

Finally, label each block and line with a brief description of its function.

+-------------+
| Processor |

+-------------+

+-------------+ +-------------+ +-------------+

| Program | | Data | | Register |

| Memory | | Memory | | File |

+-------------+ +-------------+ +-------------+

+-------------+

| Instruction |

| decoder |

+-------------+

+-------------+ +-------------+

| ALU | | Control |

| | | Unit |

+-------------+ +-------------+

+-------------+

| Input/output|

| devices |

+-------------+
2.OPCODE :

ADD Wb, Ws, Wd -> Opcode: 0001

SUB Wb, Ws, Wd -> Opcode: 0010

AND Wb, Ws, Wd -> Opcode: 0011

IOR Wb, Ws, Wd -> Opcode: 0100

MOV Wns,f -> Opcode: 0101

MOV f, Wns -> Opcode: 0110

BRA Expr -> Opcode: 0111

3. Truthtable

A truth table is a tool used to represent the output of a logic circuit or system for all possible
combinations of inputs. To create a truth table for the control signals generated by the control block of
your processor, we can follow these steps:

Identify the inputs of the control block, which are the instruction opcode and the flags (OV, C, N, Z).

Identify the outputs of the control block, which are the control signals (ALU control, Register file control,
Memory control, and Branch control).

Create a table with columns for each input and output, and rows for each possible combination of
inputs.

For each row, fill in the inputs and calculate the corresponding outputs.

Once the table is completed, it will show the output for every possible combination of inputs.
| Opcode | Ws | Wb | Wd | ALU Control |

| 0001 | R1 | R2 | R3 | 0100 |

| 0001 | R4 | R5 | R6 | 0100 |

| 0001 | R7 | R8 | R9 | 0100 |

| | | | | |

Specific :

| Opcode | OV | C | N | Z | ALU Control | Register File Control | Memory Control | Branch Control |

| 0001 | 0 | 0 | 0 | 0 | 0100 | 0001 | 00 | 00 |

| 0001 | 1 | 0 | 0 | 0 | 0100 | 0001 | 00 | 00 |

| 0001 | 0 | 1 | 0 | 0 | 0100 | 0001 | 00 | 00 |

| 0001 | 0 | 0 | 1 | 0 | 0100 | 0001 | 00 | 00 |

| 0001 | 0 | 0 | 0 | 1 | 0100 | 0001 | 00 | 00 |

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