LCD Panel Voltage

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ehtsham electronics Gujrat

[email protected]
+92. 321. 6210. 657
L.C.D L.E.D T.V Panels Connection
and Voltages Understanding

Here we talking about the main


voltages and pin connection of L.C.D
and L.E.D T.Vs
Panels, every technician should
know where to test and how to
check voltages of each connection
as they mention in Service Manual
or schematic diagram or at least you
should know the basic working
voltages.

Connection Name Connection


Working Voltages
1. VGL in Driver negative P.supply1
Around -10.5v
2. VCL in Driver negative p.supply2
Around -10v to -12v
3. VSS Digital ground GND
4. VDD VDD is the logic supply input
for the scan driver.

5. VGH Supply LCM driver output


Around 12v+ to 19.5v+
6. STV Vertical Sync Input. The
rising edge of STV begins a frame of
data. The STV input is used to
generate the high-voltage STVP
output. PulseL.C.D L.E.D T.V Panels
Connection and Voltages
Understanding
Here we talking about the main
voltages and pin connection of L.C.D
and L.E.D T.Vs
Panels, every technician should
know where to test and how to
check voltages of each connection
as they mention in Service Manual
or schematic diagram or at least you
should know the basic working
voltages.
Connection Name Connection
Working Voltages
1. VGL in Driver negative P.supply1
Around -10.5v
2. VCL in Driver negative p.supply2
Around -10v to -12v
3. VSS Digital ground GND
4. VDD VDD is the logic supply input
for the scan driver.

5. VGH Supply LCM driver output


Around 12v+ to 19.5v+
6. STV Vertical Sync Input. The
rising edge of STV begins a frame of
data. The STV input is used to
generate the high-voltage STVP
output. Pulse
7. CPV1 Vertical Clock-Pulse Input.
CPV1 controls the timing of the
CKV1 and CKVB1 outputs, which
change state (by first sharing
charge) on its falling edge.
Pulse
8. CPV2

9. V.COM out Vertical Clock-Pulse


Input. CPV2 controls the timing of
the CKV2 and CKVB2 outputs,
which change state (by first sharing
charge) on its falling edge.

Common signal output TFT Clock


pulse

Signal pulse
10. POL in Supply input common
signal Signal
11. VDC in Supply +5.0v min
12. VON Gate-On Supply. VON is
the positive supply voltage for the
CKV_, CKVB_, and STVP high-
voltage driver outputs. Around 20v+
13. V-OFF Gate-Off Supply. VOFF is
the negative supply voltage for the
CKV_, CKVB_, and STVP high-
voltage driver outputs. Around 8V-

Brief Details of Panels Connection


Points

VDD VDD is the logic supply input


for the scan driver.
VON Gate-On Supply. VON is the
positive supply voltage for the CKV_,
CKVB_, and STVP high-voltage
driver outputs.
VOFF Gate-Off Supply. VOFF is the
negative supply voltage for the
CKV_, CKVB_, and STVP high-
voltage driver outputs.
STV Vertical Sync Input. The rising
edge of STV begins a frame of data.
The STV input is used to generate
the high-voltage STVP output.
CPV1 Vertical Clock-Pulse Input.
CPV1 controls the timing of the
CKV1 and CKVB1 outputs, which
change state (by first sharing
charge) on its falling edge.
CPV2 Vertical Clock-Pulse Input.
CPV2 controls the timing of the
CKV2 and CKVB2 outputs, which
change state (by first sharing
charge) on its falling edge.
EN Enables the MAX17121. Drive
EN high to start up the MAX17121
after a delay time, which is set by a
capacitor at DLY.
CKVB1 High-Voltage Scan-Drive
Output. CKVB1 is the inverse of
CKV1 during active states and is
high impedance whenever CKV1 is
high impedance.
CKVB2 High-Voltage Scan-Drive
Output. CKVB2 is the inverse of
CKV2 during active states and is
high impedance whenever CKV2 is
high impedance.
CKVBCS2 CKVB2 Charge-Sharing
Connection. CKVBCS2 connects to
CKVCS2 whenever CPV2 and STV
are both low (to make CKV2 and
CKVB2 high impedance) to allow
CKV2 to connect to CKVB2, sharing
charge between the capacitive loads
on these two outputs.
CKVCS2 CKV2 Charge-Sharing
Connection. CKVCS2 connects to
CKVBCS2 whenever CPV2 and STV
are both low (to make CKV2 and
CKVB2 high impedance) to allow
CKVB2 to connect to CKV2, sharing
charge between the capacitive loads
on these two outputs.
STVP High-Voltage Scan-Drive
Output. STVP is connected to VOFF
when STV is low and is connected to
VON

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