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Tutorial-1 Digital Design

1. The document provides 10 tutorials on control engineering digital design topics. It includes tutorials on designing digital controllers using root locus techniques to achieve specified damping ratios and time domain specifications for various sampled-data and discrete-time systems. It also covers determining pulse transfer functions and steady state error for different system configurations and inputs.

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geofrey fungo
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58 views2 pages

Tutorial-1 Digital Design

1. The document provides 10 tutorials on control engineering digital design topics. It includes tutorials on designing digital controllers using root locus techniques to achieve specified damping ratios and time domain specifications for various sampled-data and discrete-time systems. It also covers determining pulse transfer functions and steady state error for different system configurations and inputs.

Uploaded by

geofrey fungo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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TUTORIALS - 1

CONTROL ENGINEERING DIGITAL DESIGN EEU 08202.

1. The block diagram of a sampled data control system is shown in Figure below. Find
the value of d.c. gain K which yields a damping ratio of ζ = 0.7. Use root locus
techniques to show the system before and after design

2. Suppose you have the following continuous transfer function

M = 1 kg, b = 10 N.s/m, k = 20 N/m, F(s) = 1

Assuming the closed-loop bandwidth frequency is greater than 1 rad/sec, and


sampling time (Ts) equal to 1/100 sec. Find X(Z)/F(Z)

3. The open-loop transfer function of a system together with a zero-order hold is given
by

Design a digital controller so that the closed-loop system will have ζ = 0.6 and wd = 3
rad/s.

The steady-state error to a step input should be zero. Also, the steady-state error to a
ramp input should be 0.2. Assume that T = 0.2 s. Use root locus techniques to show
the system before and after design

4. The block diagram of a digital control system is given below.


It is required to design a controller for this system such that the system poles are at
the points z1,2 = 0.3 ± j0.3. Use root locus techniques to show the system before and
after design.

5. The block diagram of a system is as shown below. It is required to design a controller


for this system with percent overshoot (PO) less than 17%and settling time ts ≤ 10s.
Assume that T = 0.1 s. Use root locus techniques to show the system before and after
design.

6. Assume we have some discrete transfer function:


0.3678(z+ 0.7189)
G ( z) =
(z−1)( z −0.3680)
And compensator for this system

K ( z−0.3678)
D ( z )=
( z +0.2400)
i. Use root locus to find the maximum gain possible with the applied
compensator without making the system unstable.
ii. Use step functions for simulation of sampled data systems.

7. Given a G(s), below, find Pulse TF with sampling period of 0.1sec. Plot the root locus
of the obtained TF.

8. Sketch the root locus for the system below. Also determine the range of gain K, for
stability from the root locus plot.

9. Find the steady state error for the feedback control system below with step and ramp
inputs. Check for stability in each case.

10. Find the value of gain K, to yield a damping ratio of 0.5 from the figure below.
Where H(z) = 1 and

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