Digital Logic Design Laboratory Hand Book

Experiment No. 10
STUDY OF LINE DECODER
OBJECTIVE
 To check the operation of 2-to-4 line Decoder and 3-to-8 line Decoder. Design a Binary
Code Decimal to the seven segment decoder.
EQUIPMENT
 ePAL Trainer Board
 2 resisters 1K ohm
 Connecting wires
COMPONENTs
 IC Type 7408 Quadruple 2-input AND gates
 IC Type 7404 Hex Inverters
 IC Type 7446/7447 BCD-to-Seven segment decoder/driver
 Seven Segment Display

THEORY
The name “Decoder” means to translate or decode coded information from one format into
another, so a binary decoder transforms “n” binary input signals into an equivalent code using
2n outputs.
A decoder is a logic circuit that accepts a set of inputs that represents a binary number and
activates only the output that corresponds to that input number. In other words, a decoder circuit
looks at its inputs, determines which binary number is present there, and activates the one output
that corresponds to that number; all other outputs remain inactive.
Decoder can be referred to in several ways. For example 3-to-8 line decoder means that it has 3
input lines and 8 output lines. It can also be called binary-to-octal decoder or convertor because
it takes a three bit binary input code and activates one of the eight (octal) outputs corresponding
to that code.
7-segment display is used to display decimal characters 0 through 9 and sometimes the hex
characters A through G

[email protected] 1

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

Its is called as 7-segment display because it has 7 segments ( a to g ) which glow in different
combinations to show decimal numbers from 0 to 9. Our task for this lab session is to design a
circuit that takes BCD input and produces an output that makes only required segments to glow
which could produce the display of exactly the same number whose BCD code has been given as
input to the circuit. So it can be decided that the circuit will have 4 input lines and 7 output lines
each being able to control one of the 7 segments of the display.

[email protected] 2

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

[email protected] 3

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

2-to-4 Binary Decoders

Let 2 to 4 Decoder has two inputs A & B and four outputs D0, D1, D2 & D3. The block
diagram of 2 to 4 decoder is shown in the following figure.

One of these four outputs will be ‘1’ for each combination of inputs. The Truth table of 2 to 4
decoder is shown below.

Inputs Outputs

A B D0 D1 D2 D3

x x 0 0 0 0

[email protected] 4

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

Expressions:-

INPUTS OUTPUTS
A B D0 D1 D2 D3

x x 0 0 0 0

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

For D0 D0¿ A B
For D1 D1¿ A B
For D2 D2¿ A B
For D3 D3¿ A B
CONNECTION DIAGRAM

[email protected] 5

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

Figure 10.1 2-to-4 line decoder

 3-to-8 Decoders
Let 3 to 8 Decoder has two inputs A , B and C and four outputs D0, D1, D2, D3, D4, D5, D6, and
D7 The block diagram of 3 to 8 decoder is shown in the following figure.

One of these four outputs will be ‘1’ for each combination of inputs.
The Truth table of 3 to 8 decoder is shown below.
INPUTS OUTPUTS
A B C D0 D1 D2 D3 D4 D5 D6 D7

[email protected] 6

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
Expressions:-
For D0 D0¿ A B C

For D1 D1¿ A B C
For D2 D2¿ A B C
For D3 D3¿ A B C
For D4 D4¿ A B C
For D5 D5¿ A B C
For D6 D6¿ A B C
For D7 D7¿ A B C
CONNECTION DIAGRAM

[email protected] 7

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

[email protected] 8

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

Figure 10.2 3-to-8 line decoder (Binary to Octal)

BCD-to-7 Segment Decoder Circuit

A binary coded decimal (BCD) to 7-segment display decoder such as the TTL 74LS47 have 4
BCD inputs and 7 output lines, one for each LED segment. This allows a smaller 4-bit binary
number (half a byte) to be used to display all the denary numbers from 0 to 9 

BCD to 7-Segment Decoder

TRUTH TABLE

[email protected] 9

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

K-Maps:
For output a: For output b:

[email protected] 10

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

For output c: For output d:

[email protected] 11

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

For output e: For output f:

[email protected] 12

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

For output g:

CONNECTION DIAGRAM

[email protected] 13

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

[email protected] 14

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

Figure 10.3: BCD-to-7 Segment Decoder Circuit

 stands for Lamp Test. When   is low all the segments on the 7-seg display are lit regardless
of DCBA. 

[email protected] 15

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

 stands for Blanking Input. When   is low the display is blank so all the segments on the
7seg display are off regardless of DCBA.

 stands for Ripple Blanking Input. When   is low and DCBA=0000 the display is blank
otherwise the number is displayed on the display. This is used to remove leading zeroes from a
number (e.g. diplay 89 instead of 089). To use with more than one display connect   (Ripple
Blanking Output) from most significant 74xx47 to the   of the next 74xx47. Connect   of
the least significant 74xx47 to 5v unless you want the display to turn off when the number is 0.

BCD-to-Decimal Decoder Circuit

This type of decoder is probably the most widely used in all digital systems because it changes
the inherent binary codes used within the system to the decimal code used by the human
operators. Figure 1 illustrates the function block of a basic BCD-to-decimal decoder. Four input
lines, representing the decimal numbers 0 through 9. This type of decoder is often used in
combination with decade counters and with decimal displays. BCD-to-decimal decoders are
used for code conversion, address decoding, memory selection control, read-out decoding, and
de-multiplexing in digital systems such as mini-and microcomputers, digital voltmeters, etc.

TRUTH TABLE
INPUTS OUTPUTS
BCD Code Decimal Code
A B C D D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 1 0 1 0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0 0 0 0 0 0 0

[email protected] 16

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

0 0 1 1 0 0 0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 0 1 0 0 0 0 0
0 1 0 1 0 0 0 0 0 1 0 0 0 0
0 1 1 0 0 0 0 0 0 0 1 0 0 0
0 1 1 1 0 0 0 0 0 0 0 1 0 0
1 0 0 0 0 0 0 0 0 0 0 0 1 0
1 0 0 1 0 0 0 0 0 0 0 0 0 1

Important Note:

 Make a K-Map according to the above truth table of each output (If you think it required
in this case). If not required then simply write expression directly for each output.
 Simplify expression using K-Map. (If you think it required in this case.)
 Construct the circuit based on the simplify expression or expression

Figure 6.4: BCD-to-Decimal Decoder Circuit

PROCEDURE

1. Construct the Circuit according to each task.

2. Run the circuit.
3. Apply input according

[email protected] 17

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

Application using encoder decoder

Task No. 1
Construct a circuit of 2-4 line decoder.
Task No. 2
Construct a circuit of 3-8 line decoder.
Task No. 3
Construct a circuit of BCD-to-7 Segment Decoder Circuit using IC.
Task No. 4
Construct a circuit of BCD-to-Decimal Decoder Circuit using IC.
Result Truth Tables
TASK N0.1 2-4 Line Decoder

INPUTS OUTPUTS
A B D0 D1 D2 D3

0 0

0 1

1 0

1 1

TASK N0.2 3-8 Line Decoder

INPUTS OUTPUTS
A B C D0 D1 D2 D3 D4 D5 D6 D7
0 0 0
0 0 1
[email protected] 18

MSISDN +923338369095
Digital Logic Design Laboratory Hand Book

0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

TASK N0. 3 BCD to Seven Segment Decoder

INPUTS OUTPUTS
BCD Code Decimal Code
D C B A a b c d e f g
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1

TASK N0. 4 BCD to Decimal Decoder

INPUTS OUTPUTS
BCD Code Decimal Code
D C B A D0 D1 D2 D3 D4 D5 D6 D7 D8 D9
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1

[email protected] 19

MSISDN +923338369095
 Digital Logic Design Laboratory Hand Book

0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1

CONCLUSION
-------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------

--------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------

--------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------

-------------------------------------------------------------------------------------------

Rubrics Evaluation Criteria

PLO
Criteria Beginning (1) Developing (2) Accomplished (3) Exemplary (4)
No.
With instructor/
With instructor/
Apply Student is unable to apply supervisor’s Student is able to appl
supervisor’s guidance,
1 Procedural described procedure to guidance, student is procedural knowledge
student is able to apply
Knowledge perform activity despite able to apply all independently perform
some of the described
to perform instructor/ supervisor’s described procedure activity without instru
procedure to partially
an activity guidance. to fully perform supervisor’s guidance.
perform activity.
activity.
Student is able to Student is able to
Effectively
Student is unable to Student is able to partially effectively effectively and
document/
effectively document/ document/ communicate document/ independently docum
10 communicat
communicate performed performed activities with communicate communicate perform
e performed
activities despite guidance. guidance. performed activities activities form without
activities
with guidance. guidance.
CLO-04: Apply Procedural Knowledge to Assemble, Manipulate the logic circuits and display the results
CLO-06: Demonstrate result of performed activities
PLO-01: Engineering Knowledge:  An ability to apply knowledge of mathematics, science and engineering fundamentals and
an engineering specialization to the solution of complex engineering problems.
PLO-10: Communication: An ability to communicate effectively, orally as well as in writing on complex engineering activities
with the engineering community and with society at large, such as being able to comprehend and write effective reports

[email protected] 20

MSISDN +923338369095
 Digital Logic Design Laboratory Hand Book

and design documentations, make effective presentations, and give and receive clear instructions.
Activity Name  Experiment No. 1
Group No. 

Student Roll No. 

CL PL Domain + Awarded Score (out of 4 for each cell)

No. O O Taxonomy Criteria
(Absent student will get zero mark)
Apply Procedural Knowledge to perform
1 4 1 P4
an activity
Effectively document/ communicate
2 6 10 A3 performed activities

Name of Lab. Instructor Signature Dated:

[email protected] 21

MSISDN +923338369095