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Prach Mac

This document contains the configuration for carrier 0 of a basic test. It defines parameters for the carrier like frequency points, bandwidth, and slot configurations. It also references files for UL/DL signal generation and reception across 20 slots and test configurations like number of slots to run and pre-defined signal files to use as input.

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RAMASAMY
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60 views4 pages

Prach Mac

This document contains the configuration for carrier 0 of a basic test. It defines parameters for the carrier like frequency points, bandwidth, and slot configurations. It also references files for UL/DL signal generation and reception across 20 slots and test configurations like number of slots to run and pre-defined signal files to use as input.

Uploaded by

RAMASAMY
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
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[root@duapp-16720-du1-nrdufr1testmac-01 BasicTest]# cat maccfgCarr0.

xml
<?xml version="1.0" encoding="utf-8"?>
<macconfig>
<ConfigReq>
<nCarrierIdx>0</nCarrierIdx>
<nDMRSTypeAPos>2</nDMRSTypeAPos>
<nPhyCellId>0</nPhyCellId>
<nDLAbsFrePointA>450000</nDLAbsFrePointA>
<nULAbsFrePointA>450000</nULAbsFrePointA>
<nDLBandwidth>50</nDLBandwidth>
<nULBandwidth>50</nULBandwidth>
<nDLFftSize>2048</nDLFftSize>
<nULFftSize>2048</nULFftSize>
<nSSBPwr>1</nSSBPwr>
<nSSBAbsFre>0</nSSBAbsFre>
<nSSBPeriod>0</nSSBPeriod>
<nSSBSubcSpacing>1</nSSBSubcSpacing>
<nSSBSubcOffset>0</nSSBSubcOffset>
<nMIB0>255</nMIB0>
<nMIB1>255</nMIB1>
<nMIB2>255</nMIB2>
<nDLK0>0</nDLK0>
<nULK0>0</nULK0>
<nSSBPrbOffset>0</nSSBPrbOffset>
<nSSBMask0>255</nSSBMask0>
<nSSBMask1>0</nSSBMask1>
<nNrOfTxAnt>1</nNrOfTxAnt>
<nNrOfRxAnt>1</nNrOfRxAnt>
<numUlStreams>1</numUlStreams>
<nNrOfSrsRxAnt>32</nNrOfSrsRxAnt>
<nCarrierAggregationLevel>1</nCarrierAggregationLevel>
<nFrameDuplexType>1</nFrameDuplexType>
<nSubcCommon>1</nSubcCommon>
<carrierMode>2</carrierMode>
<nTddPeriod>10</nTddPeriod>
<nPrachConfIdx>162</nPrachConfIdx>
<nPrachSubcSpacing>1</nPrachSubcSpacing>
<nPrachZeroCorrConf>14</nPrachZeroCorrConf>
<nPrachRestrictSet>0</nPrachRestrictSet>
<nPrachRootSeqIdx>0</nPrachRootSeqIdx>
<nPrachFreqStart>0</nPrachFreqStart>
<nPrachFdm>0</nPrachFdm>
<nPrachSsbRach>0</nPrachSsbRach>
<nCyclicPrefix>0</nCyclicPrefix>
<tMacCompFlag>0</tMacCompFlag>
<nGroupHopFlag>0</nGroupHopFlag>
<nSequenceHopFlag>0</nSequenceHopFlag>
<nHoppingId>0</nHoppingId>
<sSlotConfig0>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig0>
<sSlotConfig1>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig1>
<sSlotConfig2>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig2>
<sSlotConfig3>0 0 0 0 0 0 0 0 0 0 2 2 1 1</sSlotConfig3>
<sSlotConfig4>1 1 1 1 1 1 1 1 1 1 1 1 1 1</sSlotConfig4>
<sSlotConfig5>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig5>
<sSlotConfig6>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig6>
<sSlotConfig7>0 0 0 0 0 0 0 0 0 0 0 0 0 0</sSlotConfig7>
<sSlotConfig8>0 0 0 0 0 0 0 0 0 0 2 2 1 1</sSlotConfig8>
<sSlotConfig9>1 1 1 1 1 1 1 1 1 1 1 1 1 1</sSlotConfig9>
</ConfigReq>
<TestConfig>
<numSlotsToRun>20</numSlotsToRun>
<numSlots>20</numSlots>
<phy_maintains_bch>0</phy_maintains_bch>
<maxHarqTrans>4</maxHarqTrans>
<TimerModeFreqDomain>1</TimerModeFreqDomain>
<addCarrierInit>1</addCarrierInit>
<ul_ref_out>/opt/ani/etc/530/rxsduparse_tst530.txt</ul_ref_out>
<profiling_test>1</profiling_test>
<uliq_car0_ant0>/opt/ani/etc/BasicTest/FD_IQ_SNR_10dB_ANT_0_Carr_0.bin</
uliq_car0_ant0>

<uliq_prach_car0_ant0>/opt/ani/etc/BasicTest/FD_IQ_SNR_10dB_ANT_0_Carr_0.bin</
uliq_prach_car0_ant0>

<uliq_srs_car0_ant0>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX0_Carr
_0.bin</uliq_srs_car0_ant0>

<uliq_srs_car0_ant1>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX1_Carr
_0.bin</uliq_srs_car0_ant1>

<uliq_srs_car0_ant2>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX2_Carr
_0.bin</uliq_srs_car0_ant2>

<uliq_srs_car0_ant3>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX3_Carr
_0.bin</uliq_srs_car0_ant3>

<uliq_srs_car0_ant4>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX4_Carr
_0.bin</uliq_srs_car0_ant4>

<uliq_srs_car0_ant5>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX5_Carr
_0.bin</uliq_srs_car0_ant5>

<uliq_srs_car0_ant6>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX6_Carr
_0.bin</uliq_srs_car0_ant6>

<uliq_srs_car0_ant7>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX7_Carr
_0.bin</uliq_srs_car0_ant7>

<uliq_srs_car0_ant8>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX8_Carr
_0.bin</uliq_srs_car0_ant8>

<uliq_srs_car0_ant9>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX9_Carr
_0.bin</uliq_srs_car0_ant9>

<uliq_srs_car0_ant10>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX10_Ca
rr_0.bin</uliq_srs_car0_ant10>

<uliq_srs_car0_ant11>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX11_Ca
rr_0.bin</uliq_srs_car0_ant11>

<uliq_srs_car0_ant12>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX12_Ca
rr_0.bin</uliq_srs_car0_ant12>

<uliq_srs_car0_ant13>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX13_Ca
rr_0.bin</uliq_srs_car0_ant13>

<uliq_srs_car0_ant14>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX14_Ca
rr_0.bin</uliq_srs_car0_ant14>
<uliq_srs_car0_ant15>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX15_Ca
rr_0.bin</uliq_srs_car0_ant15>

<uliq_srs_car0_ant16>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX16_Ca
rr_0.bin</uliq_srs_car0_ant16>

<uliq_srs_car0_ant17>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX17_Ca
rr_0.bin</uliq_srs_car0_ant17>

<uliq_srs_car0_ant18>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX18_Ca
rr_0.bin</uliq_srs_car0_ant18>

<uliq_srs_car0_ant19>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX19_Ca
rr_0.bin</uliq_srs_car0_ant19>

<uliq_srs_car0_ant20>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX20_Ca
rr_0.bin</uliq_srs_car0_ant20>

<uliq_srs_car0_ant21>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX21_Ca
rr_0.bin</uliq_srs_car0_ant21>

<uliq_srs_car0_ant22>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX22_Ca
rr_0.bin</uliq_srs_car0_ant22>

<uliq_srs_car0_ant23>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX23_Ca
rr_0.bin</uliq_srs_car0_ant23>

<uliq_srs_car0_ant24>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX24_Ca
rr_0.bin</uliq_srs_car0_ant24>

<uliq_srs_car0_ant25>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX25_Ca
rr_0.bin</uliq_srs_car0_ant25>

<uliq_srs_car0_ant26>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX26_Ca
rr_0.bin</uliq_srs_car0_ant26>

<uliq_srs_car0_ant27>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX27_Ca
rr_0.bin</uliq_srs_car0_ant27>

<uliq_srs_car0_ant28>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX28_Ca
rr_0.bin</uliq_srs_car0_ant28>

<uliq_srs_car0_ant29>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX29_Ca
rr_0.bin</uliq_srs_car0_ant29>

<uliq_srs_car0_ant30>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX30_Ca
rr_0.bin</uliq_srs_car0_ant30>

<uliq_srs_car0_ant31>/opt/ani/etc/BasicTest/SRS_COMPRESSED_FD_IQ_20TTI_10dB_RX31_Ca
rr_0.bin</uliq_srs_car0_ant31>
<ulchWeightFile>/opt/ani/etc/BasicTest/chEstFD_sector0.bin</ulchWeightFile>
<start_frame_number>0</start_frame_number>
<start_slot_number>0</start_slot_number>
</TestConfig>
<TxConfig>
<SlotNum0>txconfig_0_0.xml</SlotNum0>
<SlotNum1>txconfig_0_1.xml</SlotNum1>
<SlotNum2>txconfig_0_2.xml</SlotNum2>
<SlotNum3>txconfig_0_3.xml</SlotNum3>
<SlotNum4>txconfig_0_4.xml</SlotNum4>
<SlotNum5>txconfig_0_5.xml</SlotNum5>
<SlotNum6>txconfig_0_6.xml</SlotNum6>
<SlotNum7>txconfig_0_7.xml</SlotNum7>
<SlotNum8>txconfig_0_8.xml</SlotNum8>
<SlotNum9>txconfig_0_9.xml</SlotNum9>
<SlotNum10>txconfig_0_10.xml</SlotNum10>
<SlotNum11>txconfig_0_11.xml</SlotNum11>
<SlotNum12>txconfig_0_12.xml</SlotNum12>
<SlotNum13>txconfig_0_13.xml</SlotNum13>
<SlotNum14>txconfig_0_14.xml</SlotNum14>
<SlotNum15>txconfig_0_15.xml</SlotNum15>
<SlotNum16>txconfig_0_16.xml</SlotNum16>
<SlotNum17>txconfig_0_17.xml</SlotNum17>
<SlotNum18>txconfig_0_18.xml</SlotNum18>
<SlotNum19>txconfig_0_19.xml</SlotNum19>
</TxConfig>
<RxConfig>
<SlotNum0>rxconfig_530_0_0.xml</SlotNum0>
<SlotNum1>rxconfig_530_0_0.xml</SlotNum1>
<SlotNum2>rxconfig_530_0_0.xml</SlotNum2>
<SlotNum3>rxconfig_530_0_0.xml</SlotNum3>
<SlotNum4>rxconfig_530_0_4.xml</SlotNum4>
<SlotNum5>rxconfig_530_0_0.xml</SlotNum5>
<SlotNum6>rxconfig_530_0_0.xml</SlotNum6>
<SlotNum7>rxconfig_530_0_0.xml</SlotNum7>
<SlotNum8>rxconfig_530_0_0.xml</SlotNum8>
<SlotNum9>rxconfig_530_0_4.xml</SlotNum9>
<SlotNum10>rxconfig_530_0_0.xml</SlotNum10>
<SlotNum11>rxconfig_530_0_0.xml</SlotNum11>
<SlotNum12>rxconfig_530_0_0.xml</SlotNum12>
<SlotNum13>rxconfig_530_0_0.xml</SlotNum13>
<SlotNum14>rxconfig_530_0_4.xml</SlotNum14>
<SlotNum15>rxconfig_530_0_0.xml</SlotNum15>
<SlotNum16>rxconfig_530_0_0.xml</SlotNum16>
<SlotNum17>rxconfig_530_0_0.xml</SlotNum17>
<SlotNum18>rxconfig_530_0_0.xml</SlotNum18>
<SlotNum19>rxconfig_530_0_4.xml</SlotNum19>
</RxConfig>
</macconfig>

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