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Adt 7320

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0% found this document useful (0 votes)
54 views24 pages

Adt 7320

Uploaded by

John Thompson
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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±0.

25°C Accurate, 16-Bit Digital


SPI Temperature Sensor
Data Sheet ADT7320
FEATURES GENERAL DESCRIPTION
High performance The ADT7320 is a high accuracy digital temperature sensor that
Temperature accuracy offers breakthrough performance over a wide industrial temperature
±0.20°C from −10°C to +85°C at 3.0 V range, housed in a 4 mm × 4 mm LFCSP package. It contains an
±0.25°C from −20°C to +105°C at 2.7 V to 3.3 V internal band gap reference, a temperature sensor, and a 16-bit
16-bit temperature resolution: 0.0078°C analog-to-digital converter (ADC) to monitor and digitize the
Ultralow temperature drift: 0.0073°C temperature to a resolution of 0.0078°C. The ADC resolution,
NIST traceable or equivalent by default, is set to 13 bits (0.0625°C). The ADC resolution is a
Fast first temperature conversion on power-up of 6 ms user programmable mode that can be changed through the
Easy implementation serial interface.
No temperature calibration/correction required by user
No linearity correction required The ADT7320 is guaranteed to operate over supply voltages from
Low power 2.7 V to 5.5 V. Operating at 3.3 V, the average supply current is
Power saving 1 sample per second (SPS) mode typically 210 µA. The ADT7320 has a shutdown mode that powers
700 µW typical at 3.3 V in normal mode down the device and offers a shutdown current of typically 2.0 µA
7 µW typical at 3.3 V in shutdown mode at 3.3 V. The ADT7320 is rated for operation over the −40°C to
Wide operating ranges +150°C temperature range.
Temperature range: −40°C to +150°C
Voltage range: 2.7 V to 5.5 V The CT pin is an open-drain output that becomes active when the
Programmable interrupts temperature exceeds a programmable critical temperature limit.
Critical overtemperature interrupt The INT pin is also an open-drain output that becomes active
Overtemperature/undertemperature interrupt when the temperature exceeds a programmable limit. The INT pin
SPI-compatible interface and CT pin can operate in either comparator or interrupt mode.
16-lead, RoHS-compliant, 4 mm × 4 mm LFCSP package PRODUCT HIGHLIGHTS
APPLICATIONS 1. Ease of use, no calibration or correction required by the user.
RTD and thermistor replacement 2. Low power consumption.
Thermocouple cold junction compensation 3. Excellent long term stability and reliability.
Medical equipment 4. High accuracy for industrial, instrumentation, and medical
Industrial control and test applications.
Food transportation and storage 5. Packaged in a 16-lead, RoHS-compliant, 4 mm × 4 mm
Environmental monitoring and HVAC LFCSP package.
Laser diode temperature control
FUNCTIONAL BLOCK DIAGRAM

TEMPERATURE ADT7320
VALUE
REGISTER TLOW INTERNAL
REGISTER OSCILLATOR
INTERNAL
CONFIGURATION THYST REFERENCE
10 CT
REGISTER REGISTER
TCRIT
TCRIT STATUS
REGISTER REGISTER
TEMPERATURE Σ-Δ
SENSOR MODULATOR
THIGH ID 9 INT
REGISTER REGISTER THIGH

SCLK 1
FILTER
DOUT 2 SPI LOGIC
TLOW 11 GND
DIN 3 INTERFACE
09012-001

12 VDD
CS 4

Figure 1.

Rev. 0 Document Feedback


Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2012 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
ADT7320 Data Sheet

TABLE OF CONTENTS
Features .............................................................................................. 1 Configuration Register .............................................................. 14
Applications ....................................................................................... 1 Temperature Value Register ...................................................... 15
General Description ......................................................................... 1 ID Register................................................................................... 15
Product Highlights ........................................................................... 1 TCRIT Setpoint Register ............................................................... 15
Functional Block Diagram .............................................................. 1 THYST Setpoint Register............................................................... 16
Revision History ............................................................................... 2 THIGH Setpoint Register .............................................................. 16
Specifications..................................................................................... 3 TLOW Setpoint Register ............................................................... 16
SPI Timing Specifications ........................................................... 4 Serial Interface ................................................................................ 17
Absolute Maximum Ratings ............................................................ 5 SPI Command Byte .................................................................... 17
ESD Caution .................................................................................. 5 Writing Data ............................................................................... 18
Pin Configuration and Function Descriptions ............................. 6 Reading Data ............................................................................... 19
Typical Performance Characteristics ............................................. 7 Interfacing to DSPs or Microcontrollers ................................. 19
Theory of Operation ........................................................................ 9 Serial Interface Reset.................................................................. 19
Circuit Information ...................................................................... 9 INT and CT Outputs...................................................................... 20
Converter Details.......................................................................... 9 Undertemperature and Overtemperature Detection ............ 20
Continuous Conversion Mode ................................................... 9 Applications Information .............................................................. 22
One-Shot Mode .......................................................................... 10 Thermal Response Time ........................................................... 22
1 SPS Mode .................................................................................. 11 Supply Decoupling ..................................................................... 22
Shutdown Mode.......................................................................... 11 Powering from a Switching Regulator ..................................... 22
Fault Queue ................................................................................. 11 Temperature Measurement ....................................................... 22
Temperature Data Format ......................................................... 12 Quick Guide to Measuring Temperature ................................ 22
Temperature Conversion Formulas ......................................... 12 Outline Dimensions ....................................................................... 23
Registers ........................................................................................... 13 Ordering Guide .......................................................................... 23
Status Register ............................................................................. 13

REVISION HISTORY
12/12—Revision 0: Initial Version

Rev. 0 | Page 2 of 24
Data Sheet ADT7320

SPECIFICATIONS
TA = −40°C to +125°C, VDD = 2.7 V to 5.5 V, unless otherwise noted.

Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
TEMPERATURE SENSOR AND ADC
Accuracy 1 0.0017 ±0.20 2 °C TA = −10°C to +85°C, VDD = 3.0 V
±0.25 °C TA = −20°C to +105°C, VDD = 2.7 V to 3.3 V
±0.31 °C TA = −40°C to +105°C, VDD = 3.0 V
±0.35 °C TA = −40°C to +105°C, VDD = 2.7 V to 3.3 V
±0.50 °C TA = −40°C to +125°C, VDD = 2.7 V to 3.3 V
±0.50 3 °C TA = −10°C to +105°C, VDD = 4.5 V to 5.5 V
±0.66 °C TA = −40°C to +125°C, VDD = 4.5 V to 5.5 V
−0.85 °C TA = +150°C, VDD = 4.5 V to 5.5 V
−1.0 °C TA = +150°C, VDD = 2.7 V to 3.3 V
ADC Resolution 13 Bits Twos complement temperature value of sign bit plus
12 ADC bits (power-up default resolution)
16 Bits Twos complement temperature value of sign bit plus
15 ADC bits (Bit 7 = 1 in the configuration register)
Temperature Resolution
13-Bit 0.0625 °C 13-bit resolution (sign + 12 bits)
16-Bit 0.0078 °C 16-bit resolution (sign + 15 bits)
Temperature Conversion Time 240 ms Continuous conversion and one-shot conversion mode
Fast Temperature Conversion Time 6 ms First conversion on power-up only
1 SPS Conversion Time 60 ms Conversion time for 1 SPS mode
Temperature Hysteresis 4 ±0.002 °C Temperature cycle = 25°C to 125°C and back to 25°C
Repeatability 5 ±0.015 °C TA = 25°C
Drift 6 0.0073 °C 500 hour stress test at 150°C with VDD = 5.0 V
DC PSRR 0.1 °C/V TA = 25°C
DIGITAL OUTPUTS (CT, INT), OPEN DRAIN
High Output Leakage Current, IOH 0.1 5 µA CT and INT pins pulled up to 5.5 V
Output Low Voltage, VOL 0.4 V IOL = 3 mA at 5.5 V, IOL = 1 mA at 3.3 V
Output High Voltage, VOH 0.7 × VDD V
Output Capacitance, COUT 2 pF
DIGITAL INPUTS (DIN, SCLK, CS)
Input Current ±1 µA VIN = 0 V to VDD
Input Low Voltage, VIL 0.4 V
Input High Voltage, VIH 0.7 × VDD V
Pin Capacitance 5 10 pF
DIGITAL OUTPUT (DOUT)
Output High Voltage, VOH VDD − 0.3 V ISOURCE = ISINK = 200 µA
Output Low Voltage, VOL 0.4 V IOL = 200 µA
Output Capacitance, COUT 50 pF
POWER REQUIREMENTS
Supply Voltage 2.7 5.5 V
Supply Current Peak current while converting, SPI interface inactive
At 3.3 V 210 265 µA
At 5.5 V 250 300 µA
1 SPS Current 1 SPS mode, TA = 25°C
At 3.3 V 46 µA VDD = 3.3 V
At 5.5 V 65 µA VDD = 5.5 V

Rev. 0 | Page 3 of 24
ADT7320 Data Sheet
Parameter Min Typ Max Unit Test Conditions/Comments
Shutdown Current Supply current in shutdown mode
At 3.3 V 2.0 15 µA
At 5.5 V 5.2 25 µA
Power Dissipation, Normal Mode 700 µW VDD = 3.3 V, normal mode at 25°C
Power Dissipation, 1 SPS Mode 150 µW Power dissipated for VDD = 3.3 V, TA = 25°C
1
Accuracy specification includes repeatability.
2
The equivalent 3 σ limits are ±0.15°C. This 3 σ specification is provided to enable comparison with other vendors who use these limits.
3
For higher accuracy at 5 V operation, contact Analog Devices, Inc.
4
Temperature hysteresis does not include repeatability.
5
Based on a floating average of 10 readings.
6
Drift includes solder heat resistance and lifetime test performed as per JEDEC Standard JESD22-A108.

SPI TIMING SPECIFICATIONS


TA = −40°C to +150°C, VDD = 2.7 V to 5.5 V, unless otherwise noted. All input signals are specified with rise time (tR) = fall time (tF) = 5 ns
(10% to 90% of VDD) and timed from a voltage level of 1.6 V.

Table 2.
Parameter 1, 2 Limit at TMIN, TMAX Unit Descriptions
t1 0 ns min CS falling edge to SCLK active edge setup time
t2 100 ns min SCLK high pulse width
t3 100 ns min SCLK low pulse width
t4 30 ns min Data setup time prior to SCLK rising edge
t5 25 ns min Data hold time after SCLK rising edge
t6 5 ns min Data access time after SCLK falling edge
60 ns max VDD = 4.5 V to 5.5 V
80 ns max VDD = 2.7 V to 3.6 V
t7 3 10 ns min Bus relinquish time after CS inactive edge
80 ns max Bus relinquish time after CS inactive edge
t8 0 ns min SCLK inactive edge to CS rising edge hold time
t9 0 ns min CS falling edge to DOUT active time
60 ns max VDD = 4.5 V to 5.5 V
80 ns max VDD = 2.7 V to 3.6 V
t10 10 ns min SCLK inactive edge to DOUT low
1
Sample tested during initial release to ensure compliance.
2
See Figure 2.
3
This means that the times quoted in the timing characteristics in Table 2 are the true bus relinquish times of the part and, as such, are independent of external bus
loading capacitances.

CS

t1
t2 t8
t3

1 2 3 6 7 8 9 10 23 24
SCLK

t4
t5
MSB LSB
DIN

t6 t10
t9
09012-002

DOUT MSB LSB


t7
Figure 2. Detailed SPI Timing Diagram

Rev. 0 | Page 4 of 24
Data Sheet ADT7320

ABSOLUTE MAXIMUM RATINGS


Table 3. Stresses above those listed under Absolute Maximum Ratings
Parameter Rating
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
VDD to GND −0.3 V to +7 V
other conditions above those indicated in the operational
DIN Input Voltage to GND −0.3 V to VDD + 0.3 V
section of this specification is not implied. Exposure to absolute
DOUT Voltage to GND −0.3 V to VDD + 0.3 V
maximum rating conditions for extended periods may affect
SCLK Input Voltage to GND −0.3 V to VDD + 0.3 V
device reliability.
CS Input Voltage to GND −0.3 V to VDD + 0.3 V
CT and INT Output Voltage to GND −0.3 V to VDD + 0.3 V
ESD Rating (Human Body Model) 2.0 kV ESD CAUTION
Operating Temperature Range 1 −40°C to +150°C
Storage Temperature Range −65°C to +160°C
Maximum Junction Temperature, TJMAX 150°C
Power Dissipation 2
16-Lead LFCSP 3 WMAX = (TJMAX − TA)/θJA
Thermal Impedance 4
θJA, Junction-to-Ambient (Still Air) 37°C/W
θJC, Junction-to-Case 33°C/W
IR Reflow Soldering 220°C
Peak Temperature (RoHS-Compliant 260°C (0°C/−5°C)
Package)
Time at Peak Temperature 20 sec to 40 sec
Ramp-Up Rate 3°C/sec maximum
Ramp-Down Rate −6°C/sec maximum
Time from 25°C to Peak Temperature 8 minutes maximum
1
Sustained operation above 125°C results in a shorter product lifetime. For
more information, contact an Analog Devices, Inc., sales representative.
2
Values relate to package being used on a standard 2-layer PCB. This gives a
worst-case θJA and θJC.
3
TA = ambient temperature.
4
Junction-to-case resistance is applicable to components featuring a
preferential flow direction, for example, components mounted on a heat
sink. Junction-to-ambient resistance is more useful for air cooled, PCB-
mounted components.

Rev. 0 | Page 5 of 24
ADT7320 Data Sheet

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

16 NC

15 NC

14 NC

13 NC
17 EPAD

SCLK 1 12 VDD

DOUT 2 ADT7320 11 GND


TOP VIEW
DIN 3 (Not to Scale) 10 CT

CS 4 9 INT

NC 8
NC 7
NC 5

NC 6
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
THE NC PIN IS NOT BONDED TO THE DIE INTERNALLY.
2. TO ENSURE CORRECT OPERATION, THE EXPOSED PAD

09012-003
SHOULD EITHER BE LEFT FLOATING OR CONNECTED
TO GROUND.

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions


Pin No. Mnemonic Description
1 SCLK Serial Clock Input. The serial clock is used to clock data into and out of any register of the ADT7320.
2 DOUT Serial Data Output. Data is clocked out on the SCLK falling edge and is valid on the SCLK rising edge.
3 DIN Serial Data Input. Serial data to be loaded to the control registers of the part is provided on this input. Data is
clocked into the registers on the rising edge of SCLK.
4 CS Chip Select Input. The device is enabled when this input is low. The device is disabled when this pin is high.
5 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
6 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
7 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
8 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
9 INT Overtemperature and Undertemperature Interrupt. Logic output. Power-up default setting is as an active low
comparator interrupt. Open-drain configuration. A pull-up resistor is required, typically 10 kΩ.
10 CT Critical Overtemperature Interrupt. Logic output. Power-up default polarity is active low. Open-drain
configuration. A pull-up resistor is required, typically 10 kΩ.
11 GND Analog and Digital Ground.
12 VDD Positive Supply Voltage (2.7 V to 5.5 V). Decouple the supply with a 0.1 μF ceramic capacitor to GND.
13 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
14 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
15 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
16 NC No Connect. Do not connect to this pin. The NC pin is not bonded to the die internally.
17 EPAD Exposed Pad. To ensure correct operation, the exposed pad should either be left floating or connected to ground.

Rev. 0 | Page 6 of 24
Data Sheet ADT7320

TYPICAL PERFORMANCE CHARACTERISTICS


1.00 30

0.75
25
TEMPERATURE ERROR (°C)

0.50

SHUTDOWN IDD (µA)


MAX ACCURACY LIMITS 20
0.25

0 15

–0.25
MAX ACCURACY LIMITS 10 5.5V
–0.50 5.0V
5 4.5V
–0.75 3.3V
3.6V 3.0V
2.7V
–1.00 0

09012-027

09012-032
–60 –40 –20 0 20 40 60 80 100 120 140 –100 –50 0 50 100 150 200
TEMPERATURE (°C) TEMPERATURE (°C)

Figure 4. Temperature Accuracy at 3 V Figure 7. Shutdown Current vs. Temperature

1.00 300

0.75 CONTINUOUS CONVERSION


250
MAX ACCURACY LIMITS
TEMPERATURE ERROR (°C)

0.50
200
0.25
IDD (µA)

0 150

–0.25
100

–0.50
1SPS
MAX ACCURACY LIMITS
50
–0.75

–1.00 0
09012-026

09012-029
–60 –40 –20 0 20 40 60 80 100 120 140 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TEMPERATURE (°C) SUPPLY VOLTAGE (V)

Figure 5. Temperature Accuracy at 5 V Figure 8. Average Operating Supply Current vs. Supply Voltage

300 8

5.5V CONTINUOUS
CONVERSION 7
250
6
3.0V CONTINUOUS
SHUTDOWN IDD (µA)

200 CONVERSION
5
IDD (µA)

150 4

3
100
5.5V 1SPS 2

50
3.0V 1SPS 1

0 0
09012-028

09012-210

–100 –50 0 50 100 150 200 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
TEMPERATURE (°C) SUPPLY VOLTAGE (V)

Figure 6. Operating Supply Current vs. Temperature Figure 9. Shutdown Current vs. Supply Voltage

Rev. 0 | Page 7 of 24
ADT7320 Data Sheet
140
125°C
120
105°C
DUT TEMPERATURE (°C)

100
85°C
80
IT TAKES LESS THAN 2 SECONDS
FOR THE DUT TO REACH 63.2%
60 OF ITS FINAL TEMPERATURE SPAN

40

20

09012-110
0 5 10 15 20 25
TIME (s)
Figure 10. Thermal Response Time

Rev. 0 | Page 8 of 24
Data Sheet ADT7320

THEORY OF OPERATION
CIRCUIT INFORMATION The ADT7320 can be configured to operate in any one of the
The ADT7320 is a high accuracy digital temperature sensor that following four operating modes: normal mode, one-shot mode,
uses a 16-bit ADC to monitor and digitize the temperature to a 1 SPS mode, and shutdown mode.
resolution of 0.0078°C. By default, the ADC resolution is set to CONTINUOUS CONVERSION MODE
13 bits (0.0625°C). An internal temperature sensor generates a
voltage proportional to absolute temperature; this voltage is In continuous conversion mode (default power-up mode), the
compared to an internal voltage reference and input into a ADT7320 runs an automatic conversion sequence. During this
precision digital modulator. automatic conversion sequence, a conversion takes 240 ms to
complete and the ADT7320 is continuously converting. This means
The internal temperature sensor has high accuracy and linearity that as soon as one temperature conversion is completed, another
over the entire rated temperature range without the need for temperature conversion begins. Each temperature conversion
correction or calibration by the user. result is stored in the temperature value register and is available
through the SPI interface. In continuous conversion mode, the
The sensor output is digitized by a sigma-delta (Σ-Δ) modulator, read operation provides the most recent converted result.
also known as the charge balance type ADC. This type of converter
uses time domain oversampling and a high accuracy comparator to On power-up, the first conversion is a fast conversion, taking
deliver 16 bits of resolution in an extremely compact circuit. typically 6 ms. If the temperature exceeds 147°C, the CT pin is
asserted low. If the temperature exceeds 64°C, the INT pin is
CONVERTER DETAILS asserted low. Fast conversion temperature accuracy is typically
The Σ-Δ modulator consists of an input sampler, a summing within ±5°C.
network, an integrator, a comparator, and a 1-bit digital-to-analog
converter (DAC). This architecture creates a negative feedback The conversion clock for the part is generated internally. No
loop and minimizes the integrator output by changing the duty external clock is required except when reading from and writing
cycle of the comparator output in response to the input voltage to the serial port.
changes. The comparator samples the output of the integrator at The measured temperature value is compared with a critical
a much higher rate than the input sampling frequency. This temperature limit (stored in the 16-bit TCRIT setpoint register), a
oversampling spreads the quantization noise over a much wider high temperature limit (stored in the 16-bit THIGH setpoint
band than that of the input signal, improving overall noise register), and a low temperature limit (stored in the 16-bit TLOW
performance and increasing accuracy. setpoint register). If the measured value exceeds the high or low
The modulated output of the comparator is encoded using a temperature limits, the INT pin is activated; if it exceeds the TCRIT
circuit technique that results in SPI temperature data. limit, the CT pin is activated. The polarity of the INT and CT
pins is programmable for via the configuration register, and the
Σ-∆ MODULATOR INT and CT pins are also programmable for interrupt mode via
INTEGRATOR the configuration register.
COMPARATOR
VOLTAGE
REFERENCE

1-BIT
DAC

1-BIT
TEMPERATURE
CLOCK LPF DIGITAL
09012-012

VALUE
GENERATOR FILTER REGISTER
13-/16-BIT

Figure 11. Σ-∆ Modulator

Rev. 0 | Page 9 of 24
ADT7320 Data Sheet

CS

DIN 0x08 0x20

WAIT 240ms MINIMUM


FOR CONVERSION TO FINISH

DATA
DOUT

09012-300
SCLK

Figure 12. Typical SPI One-Shot Write to Configuration Register Followed by a Read from the Temperature Value Register
TEMPERATURE
149°C

148°C

147°C TCRIT

146°C

145°C

144°C

143°C

142°C TCRIT – THYST

141°C

140°C

CT PIN
POLARITY = ACTIVE LOW

CT PIN
POLARITY = ACTIVE HIGH

TIME

WRITE TO WRITE TO WRITE TO


BIT 5 AND BIT 6 OF BIT 5 AND BIT 6 OF BIT 5 AND BIT 6 OF
CONFIGURATION CONFIGURATION CONFIGURATION
REGISTER.* REGISTER.* REGISTER.*

*THERE IS A 240ms DELAY BETWEEN WRITING TO THE CONFIGURATION REGISTER TO START


09012-013

A STANDARD ONE-SHOT CONVERSION AND THE CT PIN GOING ACTIVE. THIS IS DUE TO THE
CONVERSION TIME. THE DELAY IS 60ms IN THE CASE OF A ONE-SHOT CONVERSION.

Figure 13. One-Shot CT Pin

ONE-SHOT MODE CT and INT Operation in One-Shot Mode


When one-shot mode is enabled, the ADT7320 immediately See Figure 13 for more information on one-shot CT pin
completes a conversion and then goes into shutdown mode. The operation for TCRIT overtemperature events when one of the
one-shot mode is useful when one of the circuit design priorities is limits is exceeded. Note that in interrupt mode, a read from
to reduce power consumption. any register resets the INT and CT pins.

To enable one-shot mode, set Bits [6:5] of the configuration For the INT pin in comparator mode, if the temperature drops
register (Register Address 0x01) to 01. below the THIGH − THYST value or goes above the TLOW + THYST value,
a write to the operation mode bits (Bit 5 and Bit 6 of the
After writing to the operation mode bits, wait for at least 240 ms configuration register, Register Address 0x01) resets the INT pin.
before reading back the temperature from the temperature value
register. This delay ensures that the ADT7320 has adequate time For the CT pin in comparator mode, if the temperature drops
to power up and complete a conversion. below the TCRIT − THYST value, a write to the operation mode bits
(Bit 5 and Bit 6 of the configuration register, Register Address 0x01)
To obtain an updated temperature conversion, reset Bits[6:5] of the resets the CT pin (see Figure 13).
configuration register (Register Address 0x01) to 01.
When using one-shot mode, ensure that the refresh rate is
appropriate to the application being used.

Rev. 0 | Page 10 of 24
Data Sheet ADT7320
1 SPS MODE FAULT QUEUE
In 1 SPS mode, the part performs one measurement per second. Bit 0 and Bit 1 of the configuration register (Register Address 0x01)
A conversion takes 60 ms typically, and the part remains in the are used to set up a fault queue. Up to four faults are provided to
idle state for the remaining 940 ms period. This mode is prevent false tripping of the INT and CT pins when the ADT7320
enabled by setting Bits[6:5] of the configuration register is used in a noisy temperature environment. The number of
(Register Address 0x01) to 10. faults set in the queue must occur consecutively to set the INT
and CT outputs. For example, if the number of faults set in the
SHUTDOWN MODE queue is four, then four consecutive temperature conversions
The ADT7320 can be placed in shutdown mode by setting must occur, with each result exceeding a temperature limit set in
Bits[6:5] of the configuration register (Register Address 0x01) to any of the limit registers, before the INT and CT pins are activated.
11. The ADT7320 can be taken out of shutdown mode by If two consecutive temperature conversions exceed a temperature
setting Bits[6:5] of the configuration register (Register Address limit and the third conversion does not, the fault count is reset to
0x01) to 00. The ADT7320 typically takes 1 ms (with a 0.1 μF zero.
decoupling capacitor) to come out of shut-down mode. The
conversion result from the last conversion prior to shutdown
can still be read from the ADT7320 even when it is in shutdown
mode. When the part is taken out of shutdown mode, the
internal clock restarts and a conversion is initiated.

Rev. 0 | Page 11 of 24
ADT7320 Data Sheet
TEMPERATURE DATA FORMAT TEMPERATURE CONVERSION FORMULAS
One LSB of the ADC corresponds to 0.0625°C in 13-bit mode or 16-Bit Temperature Data Format
0.0078°C in 16-bit mode. The ADC can theoretically measure a Positive Temperature = ADC Code (dec)/128
temperature range of 255°C, but the ADT7320 is guaranteed to Negative Temperature = (ADC Code (dec) − 65,536)/128
measure a low value temperature limit of −40°C to a high value
temperature limit of +150°C. The temperature measurement where ADC Code uses all 16 bits of the data byte, including the
result is stored in the 16-bit temperature value register and is sign bit.
compared with the high temperature limits stored in the TCRIT Negative Temperature = (ADC Code (dec) − 32,768)/128
setpoint register and the THIGH setpoint register. It is also compared
with the low temperature limit stored in the TLOW setpoint register. where the MSB is removed from the ADC code.

Temperature data in the temperature value register, the TCRIT 13-Bit Temperature Data Format
setpoint register, the THIGH setpoint register, and the TLOW Positive Temperature = ADC Code (dec)/16
setpoint register are represented by a 13-bit, twos complement
Negative Temperature = (ADC Code (dec) − 8192)/16
word. The MSB is the temperature sign bit. On power-up the three
LSBs, Bit 0 to Bit 2, are not part of the temperature conversion where ADC Code uses all 13 bits of the data byte, including the
result and are flag bits for TCRIT, THIGH, and TLOW. Table 5 shows sign bit.
the 13-bit temperature data format without Bit 0 to Bit 2.
Negative Temperature = (ADC Code (dec) − 4096)/16
The number of bits in the temperature data-word can be extended
where the MSB is removed from the ADC code.
to 16 bits, twos complement by setting Bit 7 to 1 in the configuration
register (Register Address 0x01). When using a 16-bit temperature 10-Bit Temperature Data Format
data value, Bit 0 to Bit 2 are not used as flag bits and are instead Positive Temperature = ADC Code (dec)/2
the LSB bits of the temperature value. The power-on default
setting has a 13-bit temperature data value. Negative Temperature = (ADC Code (dec) − 1024)/2

Reading back the temperature from the temperature value register where ADC Code uses all 10 bits of the data byte, including the
requires a 2-byte read. Designers that use a 9-bit temperature sign bit.
data format can still use the ADT7320 by ignoring the last four Negative Temperature = (ADC Code (dec) − 512)/2
LSBs of the 13-bit temperature value. These four LSBs are Bit 3
where the MSB is removed from the ADC Code.
to Bit 6 in Table 5.
9-Bit Temperature Data Format
Table 5. 13-Bit Temperature Data Format
Positive Temperature = ADC Code (dec)
Temperature Digital Output (Binary) Bits[15:3]
−40°C 1 1101 1000 0000 Negative Temperature = ADC Code (dec) − 512
−25°C 1 1110 0111 0000 where ADC Code uses all nine bits of the data byte, including
−0.0625°C 1 1111 1111 1111 the sign bit.
0°C 0 0000 0000 0000
+0.0625°C 0 0000 0000 0001 Negative Temperature = ADC Code (dec) − 256
+25°C 0 0001 1001 0000 where the MSB is removed from the ADC Code.
+105°C 0 0110 1001 0000
+125°C 0 0111 1101 0000
+150°C 0 1001 0110 0000

Rev. 0 | Page 12 of 24
Data Sheet ADT7320

REGISTERS
The ADT7320 contains eight registers: STATUS REGISTER
This 8-bit read-only register (Register Address 0x00) reflects the
• A status register status of the overtemperature and undertemperature interrupts
• A configuration register that can cause the CT and INT pins to become active. It also
• Five temperature registers reflects the status of a temperature conversion operation. The
• An ID register interrupt flags in this register are reset by a read operation to
the status register and/or when the temperature value returns
The status register, temperature value register, and the ID within the temperature limits including hysteresis. The RDY bit is
register are read only. reset after a read from the temperature value register. In one-
shot and 1 SPS modes, the RDY bit is reset after a write to the
Table 6. ADT7320 Registers
operation mode bits in the configuration register.
Register Address Description Power-On Default
0x00 Status 0x80
0x01 Configuration 0x00
0x02 Temperature value 0x0000
0x03 ID 0xC3
0x04 TCRIT setpoint 0x4980 (147°C)
0x05 THYST setpoint 0x05 (5°C)
0x06 THIGH setpoint 0x2000 (64°C)
0x07 TLOW setpoint 0x0500 (10°C)

Table 7. Status Register (Register Address 0x00)


Default
Bit(s) Value Type Name Description
[3:0] 0000 R Unused Reads back 0.
[4] 0 R TLOW This bit is set to 1 when the temperature goes below the TLOW temperature limit. The bit is cleared to
0 when the status register is read and/or when the temperature measured rises above the limit set
in the TLOW + THYST setpoint registers.
[5] 0 R THIGH This bit is set to 1 when the temperature rises above the THIGH temperature limit. This bit is cleared
to 0 when the status register is read and/or when the temperature measured drops below the limit
set in the THIGH − THYST setpoint registers.
[6] 0 R TCRIT This bit is set to 1 when the temperature rises above the TCRIT temperature limit. This bit is cleared to
0 when the status register is read and/or when the temperature measured drops below the limit set
in the TCRIT − THYST setpoint registers.
[7] 1 R RDY This bit goes low when the temperature conversion result is written to the temperature value
register. It is reset to 1 when the temperature value register is read. In one-shot and 1 SPS modes,
this bit is reset after a write to the operation mode bits in the configuration register.

Rev. 0 | Page 13 of 24
ADT7320 Data Sheet
CONFIGURATION REGISTER
This 8-bit read/write register (Register Address 0x01) stores various
configuration modes for the ADT7320, including shutdown,
overtemperature and undertemperature interrupts, one-shot,
continuous conversion, interrupt pin polarity, and
overtemperature fault queues.

Table 8. Configuration Register (Register Address 0x01)


Default
Bit(s) Value Type Name Description
[1:0] 00 R/W Fault queue These two bits set the number of undertemperature/overtemperature faults that can
occur before setting the INT and CT pins. This helps to avoid false triggering due to
temperature noise.
00 = 1 fault (default).
01 = 2 faults.
10 = 3 faults.
11 = 4 faults.
[2] 0 R/W CT pin polarity This bit selects the output polarity of the CT pin.
0 = active low.
1 = active high.
[3] 0 R/W INT pin polarity This bit selects the output polarity of the INT pin.
0 = active low.
1 = active high.
[4] 0 R/W INT/CT mode This bit selects comparator mode or interrupt mode.
0 = interrupt mode.
1 = comparator mode.
[6:5] 00 R/W Operation mode These two bits set the operational mode of the ADT7320.
00 = continuous conversion (default). When one conversion is finished, the ADT7320
begins the next conversion.
01 = one-shot mode. Conversion time is typically 240 ms.
10 = 1 SPS mode. Conversion time is typically 60 ms. This operational mode reduces the
average current consumption.
11 = shutdown. All circuitry except for the interface circuitry is powered down.
[7] 0 R/W Resolution This bit sets the resolution of the ADC when converting.
0 = 13-bit resolution. Sign bit + 12 bits gives a temperature resolution of 0.0625°C.
1 = 16-bit resolution. Sign bit + 15 bits gives a temperature resolution of 0.0078°C.

Rev. 0 | Page 14 of 24
Data Sheet ADT7320
TEMPERATURE VALUE REGISTER ID REGISTER
The temperature value register stores the temperature measured This 8-bit read-only register (Register Address 0x03) stores
by the internal temperature sensor. The temperature is stored in the manufacturer ID in Bit 7 to Bit 3 and the silicon revision in
a 16-bit, twos complement format. The temperature is read back Bit 2 to Bit 0. The default setting for the ID register is 0xC3.
from the temperature value register (Register Address 0x02) as a
TCRIT SETPOINT REGISTER
16-bit value.
The 16-bit TCRIT setpoint register (Register Address 0x04) stores
Bit 2, Bit 1, and Bit 0 are event alarm flags for TCRIT, THIGH, and the critical overtemperature limit value. A critical overtemperature
TLOW, respectively. When the ADC is configured to convert the event occurs when the temperature value stored in the temperature
temperature to a 16-bit digital value, Bit 2, Bit 1, and Bit 0 are value register exceeds the value stored in this register. The CT
no longer used as flag bits and are, instead, used as the LSB bits for pin is activated if a critical overtemperature event occurs. The
the extended digital value. temperature is stored in twos complement format with the MSB
being the temperature sign bit.

The default setting for the TCRIT setpoint is 147°C.

Table 9. Temperature Value Register (Register Address 0x02)


Bit(s) Default Value Type Name Description
[0] 0 R TLOW flag/LSB0 Flags a TLOW event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value is below TLOW, this bit is set to 1.
Contains Least Significant Bit 0 of the 15-bit temperature value when the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[1] 0 R THIGH flag/LSB1 Flags a THIGH event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value is above THIGH, this bit is set to 1.
Contains Least Significant Bit 1 of the 15-bit temperature value when the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[2] 0 R TCRIT flag/LSB2 Flags a TCRIT event if the configuration register, Register Address 0x01[7] = 0
(13-bit resolution). When the temperature value exceeds TCRIT, this bit is set to 1.
Contains the Least Significant Bit 2 of the 15-bit temperature value if the
configuration register, Register Address 0x01[7] = 1 (16-bit resolution).
[7:3] 00000 R Temp Temperature value in twos complement format.
[14:8] 0000000 R Temp Temperature value in twos complement format.
15 0 R Sign Sign bit; indicates if the temperature value is negative or positive.

Table 10. ID Register (Register Address 0x03)


Bit(s) Default Value Type Name Description
[2:0] 011 R Revision ID Contains the silicon revision identification number.
[7:3] 11000 R Manufacturer ID Contains the manufacturer identification number.

Table 11. TCRIT Setpoint Register (Register Address 0x04)


Bit(s) Default Value Type Name Description
[15:0] 0x4980 R/W TCRIT 16-bit critical overtemperature limit, stored in twos complement format.

Rev. 0 | Page 15 of 24
ADT7320 Data Sheet
THYST SETPOINT REGISTER TLOW SETPOINT REGISTER
The 8-bit THYST setpoint register (Register Address 0x05) stores The 16-bit TLOW setpoint register (Register Address 0x07) stores
the temperature hysteresis value for the THIGH, TLOW, and TCRIT the undertemperature limit value. An undertemperature event
temperature limits. The temperature hysteresis value is stored in occurs when the temperature value stored in the temperature
straight binary format using the four LSBs. Increments are possible value register is less than the value stored in this register. The
in steps of 1°C from 0°C to 15°C. The value in this register is INT pin is activated if an undertemperature event occurs. The
subtracted from the THIGH and TCRIT values and added to the temperature is stored in twos complement format with the MSB
TLOW value to implement hysteresis. being the temperature sign bit.

The default setting for the THYST setpoint is 5°C. The default setting for the TLOW setpoint is 10°C.

THIGH SETPOINT REGISTER


The 16-bit THIGH setpoint register (Register Address 0x06) stores
the overtemperature limit value. An overtemperature event occurs
when the temperature value stored in the temperature value
register exceeds the value stored in this register. The INT pin is
activated if an overtemperature event occurs. The temperature
is stored in twos complement format with the most significant
bit being the temperature sign bit.

The default setting for the THIGH setpoint is 64°C.

Table 12. THYST Setpoint Register (Register Address 0x05)


Bit(s) Default Value Type Name Description
[3:0] 0101 R/W THYST Hysteresis value, from 0°C to 15°C. Stored in straight binary format. The default setting is 5°C.
[7:4] 0000 R/W N/A N/A = not applicable. Not used.

Table 13. THIGH Setpoint Register (Register Address 0x06)


Bit(s) Default Value Type Name Description
[15:0] 0x2000 R/W THIGH 16-bit overtemperature limit, stored in twos complement format.

Table 14. TLOW Setpoint Register (Register Address 0x07)


Bit(s) Default Value Type Name Description
[15:0] 0x0500 R/W TLOW 16-bit undertemperature limit, stored in twos complement format.

Rev. 0 | Page 16 of 24
Data Sheet ADT7320

SERIAL INTERFACE
PULL-UP
VDD TO VDD

VDD 10kΩ 10kΩ

ADT7320 0.1µF

SCLK GND
MICROCONTROLLER
DOUT CT
DIN
CS INT

09012-014
Figure 14. Typical SPI Interface Connection

The ADT7320 has a 4-wire serial peripheral interface (SPI). The Bit C7, Bit C2, Bit C1, and Bit C0 of the command byte must all be
interface has a data input pin (DIN) for writing data to the device, a set to 0 to successfully begin a bus transaction. The SPI interface
data output pin (DOUT) for reading data back from the device, does not work correctly if a 1 is written into any of these bits.
and a serial data clock pin (SCLK) for clocking data into and out of
the device. A chip select pin (CS) enables or disables the serial Bit C6 is the read/write bit; 1 indicates a read, and 0 indicates
interface. CS is required for correct operation of the interface. a write.
Data is clocked out of the ADT7320 on the falling edge of SCLK, Bits[C5:C3] contain the target register address. One register can
and data is clocked into the device on the rising edge of SCLK. be read from or written to per bus transaction.
SPI COMMAND BYTE
All data transactions on the bus begin with the master taking
CS from high to low and sending out the command byte. The
command byte indicates to the ADT7320 whether the transaction
is a read or a write and provides the address of the register for the
data transfer. Table 15 shows the command byte.

Table 15. Command Byte


C7 C6 C5 C4 C3 C2 C1 C0
0 R/W Register address 0 0 0

Rev. 0 | Page 17 of 24
ADT7320 Data Sheet
WRITING DATA Figure 15 shows a write to an 8-bit register, and Figure 16 shows
a write to a 16-bit register.
Data is written to the ADT7320 in 8 bits or 16 bits, depending on
the addressed register. The first byte written to the device is the The master must begin a new write transaction on the bus for
command byte, with the read/write bit set to 0. The master every register write. Only one register is written to per bus
then supplies the 8-bit or 16-bit input data on the DIN line. transaction.
The ADT7320 clocks the data into the register addressed in the
command byte on the rising edge of SCLK. The master finishes
the write transaction by pulling CS high.

CS

SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

8-BIT COMMAND BYTE 8-BIT DATA

0 R/W REGISTER ADDR 0 0 0

09012-128
C7 C6 C5 C4 C3 C2 C1 C0 D7 D6 D5 D4 D3 D2 D1 D0
DIN

Figure 15. Writing to an 8-Bit Register

CS

SCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 22 23 24

8-BIT COMMAND BYTE 16-BIT DATA

0 R/W REGISTER ADDR 0 0 0

09012-129
DIN C7 C6 C5 C4 C3 C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D2 D1 D0

Figure 16. Writing to a 16-Bit Register

Rev. 0 | Page 18 of 24
Data Sheet ADT7320
CS

SCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

8-BIT COMMAND BYTE

0 R/W REGISTER ADDR 0 0 0

DIN C7 C6 C5 C4 C3 C2 C1 C0
8-BIT DATA

09012-030
DOUT D7 D6 D5 D4 D3 D2 D1 D0

Figure 17. Reading from an 8-Bit Register

CS

SCLK 22 23
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 24

8-BIT COMMAND BYTE

0 R/W REGISTER ADDR 0 0 0

DIN C7 C6 C5 C4 C3 C2 C1 C0
16-BIT DATA

09012-031
DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D2 D1 D0

Figure 18. Reading from a 16-Bit Register

READING DATA CS can be tied to ground and the serial interface can operate in
A read transaction begins when the master writes the command a 3-wire mode. DIN, DOUT, and SCLK are used to communicate
byte to the ADT7320 with the read/write bit set to 1. The master with the ADT7320 in this mode.
then supplies 8 or 16 clock pulses, depending on the addressed
For microcontroller interfaces, it is recommended that SCLK
register, and the ADT7320 clocks out data from the addressed
idle high between data transfers.
register on the DOUT line. Data is clocked out on the first
falling edge of SCLK following the command byte. SERIAL INTERFACE RESET
The read transaction finishes when the master pulls CS high. The serial interface can be reset by writing a series of 1s on the
DIN input. If a Logic 1 is written to the ADT7320 DIN line for
INTERFACING TO DSPs OR MICROCONTROLLERS at least 32 serial clock cycles, the serial interface is reset. This
The ADT7320 can be operated with CS used as a frame ensures that the interface can be reset to a known state if the
synchronization signal. This setup is useful for DSP interfaces. In interface is lost due to a software error or a glitch in the system.
A reset returns the interface to the state in which it expects a
this case, the first bit (MSB) is effectively clocked out by CS
write to a communications register. This operation resets the
because CS normally occurs after the falling edge of SCLK in
contents of all registers to their power-on values. Following a
DSPs. SCLK can continue to run between data transfers, provided
reset, allow a period of 500 μs before addressing the serial
that the timing values are obeyed.
interface.

Rev. 0 | Page 19 of 24
ADT7320 Data Sheet

INT AND CT OUTPUTS


The INT and CT pins are open-drain outputs, and both pins Comparator Mode
require a 10 kΩ pull-up resistor to VDD. The ADT7320 must be In comparator mode, the INT pin returns to its inactive status
fully powered up to VDD before reading INT and CT data. when the temperature drops below the THIGH − THYST limit or
rises above the TLOW + THYST limit.
UNDERTEMPERATURE AND OVERTEMPERATURE
DETECTION Placing the ADT7320 into shutdown mode does not reset the
The INT and CT pins have two undertemperature/overtemperature INT state in comparator mode.
modes: comparator mode and interrupt mode. The interrupt Interrupt Mode
mode is the default power-up overtemperature mode. The INT
In interrupt mode, the INT pin returns to its inactive status
output pin becomes active when the temperature is greater than
when any ADT7320 register is read. When the INT pin is reset,
the temperature stored in the THIGH setpoint register or less than
it becomes active again only when the temperature is greater
the temperature stored in the TLOW setpoint register. How this
than the temperature stored in the THIGH setpoint register or less
pin reacts after an undertemperature or overtemperature event
than the temperature stored in the TLOW setpoint register.
depends on the overtemperature mode selected.
Placing the ADT7320 into shutdown mode resets the INT pin in
Figure 19 illustrates the comparator and interrupt modes for
interrupt mode.
events exceeding the THIGH limit with both pin polarity settings.
Figure 20 illustrates the comparator and interrupt modes for
events exceeding the TLOW limit with both pin polarity settings.

TEMPERATURE
82°C

81°C

80°C THIGH

79°C

78°C

77°C

76°C

75°C THIGH – THYST

74°C

73°C

INT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE LOW

INT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE LOW

INT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE HIGH

INT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE HIGH

TIME
09012-020

READ READ READ

Figure 19. INT Output Temperature Response for THIGH Overtemperature Events

Rev. 0 | Page 20 of 24
Data Sheet ADT7320
TEMPERATURE
–13°C

–14°C

–15°C TLOW + THYST

–16°C

–17°C

–18°C

–19°C

–20°C TLOW

–21°C

–22°C

INT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE LOW

INT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE LOW

INT PIN
(COMPARATOR MODE)
POLARITY = ACTIVE HIGH

INT PIN
(INTERRUPT MODE)
POLARITY = ACTIVE HIGH

TIME

09012-021
READ READ READ

Figure 20. INT Output Temperature Response for TLOW Undertemperature Events

Rev. 0 | Page 21 of 24
ADT7320 Data Sheet

APPLICATIONS INFORMATION
THERMAL RESPONSE TIME POWERING FROM A SWITCHING REGULATOR
Thermal response is a function of the thermal mass of the Precision analog devices such as the ADT7320 require a well-
temperature sensor, but it is also heavily influenced by the filtered power source. If the ADT7320 is powered from a switching
mass of the object that the IC is mounted to. For example, a large regulator, noise may be generated above 50 kHz that may affect
PCB containing large amounts of copper tracing can act as a the temperature accuracy specifications. To prevent this, an RC
large heat sink and slow the thermal response. For a faster thermal filter should be used between the power supply and ADT7320
response, it is recommended that the sensor be mounted on a VDD. The value of the components used should be carefully
PCB that is as small as possible. considered to ensure that the peak value of the supply noise is
less than 1 mV. The RC filter should be mounted as far away as
Figure 10 shows the typical response time of less than 2 seconds to possible from the ADT7320 to ensure that the thermal mass is
reach 63.2% of the temperature span of the DUT. The temperature kept as low as possible.
values are the digital bytes read back through the digital interface.
The response time includes all delays incurred on chip during TEMPERATURE MEASUREMENT
signal processing. The ADT7320 accurately measures and converts the temperature
SUPPLY DECOUPLING at the surface of its own semiconductor chip. Thermal paths run
through the leads, the exposed pad, as well as the plastic package.
The ADT7320 must have a decoupling capacitor connected When the ADT7320 is used to measure the temperature of a
between VDD and GND; otherwise, incorrect temperature nearby heat source, the thermal impedance between the heat
readings will be obtained. A 0.1 μF decoupling capacitor, such source and the ADT7320 must be considered because this
as a high frequency ceramic type, must be used and mounted as impedance affects the accuracy and thermal response of the
close as possible to the VDD pin of the ADT7320. measurement.
If possible, the ADT7320 should be powered directly from the For air or surface temperature measurements, take care to isolate
system power supply. This arrangement, shown in Figure 21, the package, leads, and exposed pad from ambient air temperature.
isolates the analog section from the logic switching transients. Use of a thermally conductive adhesive can help to achieve a
Even if a separate power supply trace is not available, generous more accurate surface temperature measurement.
supply bypassing reduces supply line induced errors. Local
supply bypassing consisting of a 0.1 μF ceramic capacitor is QUICK GUIDE TO MEASURING TEMPERATURE
critical for the temperature accuracy specifications to be The following is a quick guide for measuring temperature in
achieved. continuous conversion mode (default power-up mode). Execute
each step sequentially.
TTL/CMOS
LOGIC
CIRCUITS 0.1µF ADT7320 1. After power-up, reset the serial interface (load 32
consecutive 1s on DIN). This ensures all internal circuitry
is properly initialized.
2. Verify the setup by reading the device ID
(Register Address 0x03). It should read 0xC3.
09012-022

POWER
SUPPLY 3. After consistent consecutive readings are obtained from
Figure 21. Use of Separate Traces to Reduce Power Supply Noise Step 2, read the configuration register (Register Address 0x01),
TCRIT (Register Address 0x04), THIGH (Register Address 0x06),
and TLOW (Register Address 0x07). Compare these values
with the specified defaults in Table 6. If all the readings
match, the interface is operational.
4. Write to the configuration register to set the ADT7320 to
the desired configuration. Read the temperature value register.
It should produce a valid temperature measurement.

Rev. 0 | Page 22 of 24
Data Sheet ADT7320

OUTLINE DIMENSIONS
4.10 0.35
4.00 SQ 0.30
PIN 1 3.90 0.25
INDICATOR PIN 1
13 16 INDICATOR
0.65
BSC 12
1
EXPOSED 2.70
PAD
2.60 SQ
2.50
4
9
8 5
0.45 0.20 MIN
TOP VIEW 0.40 BOTTOM VIEW
0.35
0.80 FOR PROPER CONNECTION OF
0.75 THE EXPOSED PAD, REFER TO
0.05 MAX THE PIN CONFIGURATION AND
0.70
0.02 NOM FUNCTION DESCRIPTIONS
COPLANARITY SECTION OF THIS DATA SHEET.
SEATING 0.08
PLANE 0.20 REF

08-16-2010-C
COMPLIANT TO JEDEC STANDARDS MO-220-WGGC.
Figure 22. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-17)
Dimensions shown in millimeters

ORDERING GUIDE
Model 1 Temperature Range 2 Package Description Package Option
ADT7320UCPZ-R2 −40°C to +150°C 16-lead LFCSP_WQ CP-16-17
ADT7320UCPZ-RL7 −40°C to +150°C 16-Lead LFCSP_WQ CP-16-17
EVAL-ADT7X20EBZ Evaluation Board
1
Z = RoHS Compliant Part.
2
Operating at extended temperatures over prolonged periods may shorten the lifetime performance of the part.

Rev. 0 | Page 23 of 24
ADT7320 Data Sheet

NOTES

©2012 Analog Devices, Inc. All rights reserved. Trademarks and


registered trademarks are the property of their respective owners.
D09012-0-12/12(0)

Rev. 0 | Page 24 of 24

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