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Indian Institute of Technology Kharagpur

Computer Architecture and Organization

Assignment 2
TYPE OF QUESTION: MCQ/MSQ
Number of questions: 10 Total mark: 10 x 1 = 10
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1. The decimal number (99.5)10 in binary notation is:
a. 1000011.1
b. 1100011.1
c. 0101010.1
d. 1110011.1
Correct Answer: b
Detailed Solution:

Hence, the correct answer is (b).

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2. The hexadecimal number (6A.4)16 in binary notation is:

a. 1101100.01
b. 1101101.10
c. 1101010.01
d. 1101010.10
Correct Answer: c
Detailed Solution:
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Hence, the correct answer is (c).

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3. What are the maximum and minimum numbers that can be represented in 1’s
complement using 8-bits:
a. +128 and -128
b. +127 and -127
c. +126 and -126
d. +128 and -126
Correct Answer: b
Detailed Solution: The maximum and minimum numbers that can be represented in
1’s complement using n-bits are +(2n-1 – 1) and -(2n-1 – 1), respectively. Hence, the
maximum and minimum numbers that can be represented in 1’s complement using 8-
bits are +127 and -127, respectively.
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4. Which of the following is not an advantage of 2’s complement representation?

a. Unique representation of zero
b. Subtraction can be done using addition
c. Efficient circuitry
d. Expensive circuitry
Correct Answer: d
Detailed Solution: One of the advantages of 2’s complement representation is that it
leads to substantial saving in circuitry, subtraction can be done using addition, and
there is a unique representation of zero. Hence, option (d) is not an advantage of 2’s
complement representation.
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5. The addressing mode that adds the displacement and the index register to get the
effective address of the operand is:
a. Indexed addressing
b. Base-Indexed addressing
c. Register Indirect addressing
d. Relative addressing
Correct Answer: a
Detailed Solution: The indexed addressing mode adds the displacement specified as
part of the instruction and the index register to get the effective address (EA) of the
operand.
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6. Register R1 and R2 contain values 100 and 1000 respectively in decimal, and the word
length of the processor is 32 bits. What will be the value of the effective address of the
memory operand for the instruction “STORE R3, 70(R1, R2)?”
a. 1132
b. 1170
c. 1100
d. 1202
Correct Answer: b
Detailed Solution: EA = [r1] + [R2] + Offset = 100 + 1000 + 70 = 1170
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7. Given a sequence of instruction:

ADD R1,R2,R3
SUB R4,R5,R6
MOV R4,R7
Identify the addressing mode used in the instructions.
a. Direct addressing
b. Indirect addressing
c. Register addressing
d. Register indirect addressing
Correct Answer: c
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Detailed Solution: The given instructions are instances of register addressing mode
where the operand is held in a register, and an instruction specifies the register
number.
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8. What is the equivalent MIPS32 instruction for the C code segment:

A = B + C;
F = A + D - E;
Assume that the variable values are loaded in appropriate registers.
a. Add $s0, $s1, $s2
Add $t1, $s0, $s3
Sub $s5, $t1, $s4
b. Add $s0, $s1, $s2
Add $t1, $s1, $s3
Sub $s5, $t1, $s4
c. Add $s0, $s1, $s2
Add $t1, $s3, $s0
Sub $s5, $t2, $s1
d. Add $s0, $s1, $s2
Add $t1, $s1, $s0
Sub $s5, $t2, $s1
Correct Answer: a
Detailed Solution:

Hence, the correct answer is (a).

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9. The MIPS instruction SLA $S1, $S2, 6 means:

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a. Shift left $S1 by 6 places, and store it in $S2

b. Shift left $S2 by 6 places, and add it with $S1
c. Shift left $S1 by 6 places, and add it with $S2
d. Shift left $S2 by 6 places, and store it in $S1
Correct Answer: d
Detailed Solution: The instruction SLA $S1, $S2, 6 means “Shift left $S2 by 6 places,
and store it in $S1.” Hence, the correct answer is (d).
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10. Which of the following is false in regards to the assembler directive of the MIPS32
assembly code?
a. .text – Specifies the user text segment
b. .space n – Reserve space for n non-sequential bytes in memory
c. .ascii str – Stores the specified string in memory in ASCII code
d. .globl gbl – Specifies that the symbol ‘gbl’ is global
Correct Answer: b
Detailed Solution: All statements are correct except (b) – the directive “.space n”
reserves space for n successive bytes in memory.
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