CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO.

3, SEPTEMBER 2020 215

Recent Developments of Modulation and Control

for High-Power Current-Source-Converters Fed
Electric Machine Systems
Pengcheng Liu, Zheng Wang, Senior Member, IEEE, Sanmin Wei, Yuwen Bo, and Shaoning Pu


Abstract—The pulse-width-modulated (PWM) current-source
converters (CSCs) fed electric machine systems can be considered
as a type of high reliability energy conversion systems, since they
work with the long-life DC-link inductor and offer high
fault-tolerant capability for short-circuit faults. Besides, they
provide motor friendly waveforms and four-quadrant operation
ability. Therefore, they are suitable for high-power applications of
fans, pumps, compressors and wind power generation. The
purpose of this paper is to comprehensively review recent
developments of key technologies on modulation and control of Fig. 1. Configuration of the latest transfermorless current source drive system.
high-power (HP) PWM-CSC fed electric machines systems,
including reduction of low-order current harmonics, suppression current-source converter (CSC) employs the high-reliable
of inductor–capacitor (LC) resonance, mitigation of
inductor as the DC-link energy storage components [3]. This
common-mode voltage (CMV) and control of modular PWM-CSC
fed systems. In particular, recent work on the overlapping effects paper will present a comprehensive review on recent
during commutation, LC resonance suppression under developments of modulation and control schemes of pulse
fault-tolerant operation and collaboration of modular width modulated (PWM) CSCs based electric machine systems
PMW-CSCs are described. Both theoretical analysis and some for HP industrial applications.
results in simulations and experiments are presented. Finally, a Generally speaking, PWM CSC features a simple converter
brief discussion regarding the future trend of the HP CSC fed
configuration, low dv/dt of output voltage, four-quadrant
electric machines systems is presented.
operation, reliable overcurrent and inherent short-circuit
Index Terms—Current source converter (CSC), high power protection. Those features make PWM CSC technology well
(HP) applications, electric machine system, inductor–capacitor suited for HP drives [4]. Fig. 1 shows configuration of the
(LC) resonance, low-order current harmonics, common-mode four-quadrant PWM CSC based electric machine system,
voltage (CMV), modulation, control. where active front-end converters such as PWM current-source
rectifier (CSR) can be utilized at the grid side to improve the
harmonics performance and control the power factor (PF)
I. INTRODUCTION flexibly [4]. Apart from being applied in HP drives, the PWM

P OWER converters have been highly adopted in both the

high-power (HP) drive and generation system for more
cost-effective and advanced industrial processes [1-2]. The
CSCs have also been studied intensively in wind energy
conversion system (WECS) [5], superconductor magnetic
energy storage (SEMS) system [6] and high voltage direct
medium-voltage range (several kV) HP drive applications current (HVDC) transmission system [7], etc.
could achieve lower current ratings, higher efficiency and The low-order current harmonics, the inductor–capacitor
lighter cables [3]. The voltage-source converters (VSCs) have (LC) resonance and the common-mode voltage (CMV)
been widely studied and used in industrial sectors. Different problem are always considered as the challenges and research
from VSC that utilizes capacitor on the DC link, the hotspots for the HP CSC based electric machine systems
[10-34]. High-magnitude low-order harmonics in modulated
currents resulted from the discretization error and overlapping
Manuscript was submitted for review on 11, April, 2020.
This work was supported in part by the Jiangsu Natural Science Foundation period effect are important issues in CSC-based systems. Those
of China under Grant BK20180013 and in part by the Shenzhen Science and generated harmonics degrade the harmonic profile of line
Technology Innovation Committee (STIC) under Grant currents and machine currents and deteriorate the LC resonance
JCYJ20180306174439784. (Corresponding author: Zheng Wang.)
P. Liu and Z. Wang are with the School of Electrical Engineering, Southeast if the damping suppression is inadequate [10-16]. The LC
University, Nanjing 210096, China (e-mail: 230189237 @seu.edu.cn, resonances, excited by either the grid-side LC filter or
[email protected]). motor-side filter capacitors and motor inductors, may
S. Wei, B. Yuwen and S. Pu are with the China TX IIOT Corporation
Limited., Beijing, China. deteriorate the power quality and cause system instability. To
Digital Object Identifier 10.30941/CESTEMS.2020.00027 avoid the possible steady-state and transient LC resonance,
216 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

π π
θ1 -θ
6 3 1
(a)
π 
- 2
6 3

π
θ1 θ 2 -θ (a)
3 1
(b)
Fig. 2. SHE modulation schemes. (a) Three pulses; (b) Five pulses.
T2
I
proper design of LC filter size as well as the optimized Ts 2
modulation and control schemes should be considered [17-27].
The CMV problem generated by high-frequency switching
I ref
actions of power devices, is the main concern for both the CSC T1
and VSC based HP drives due to the high system voltage level. I
Ts 1
If not well mitigated, the CMV would result in the premature
failure of motor stator winding insulation. An effective way to (b)
mitigate the CMV is to modify the pulse patterns of modulation Fig. 3. Modulation schemes. (a) TPWM; (b) SVM.
schemes [29-34].
In addition, with increasing requirements of high power 3(a). Different from SHE and TPWM schemes, the SVM
capacity and high reliability in the HP industrial applications, scheme for CSCs has nine switching states, namely six active
the modular CSCs fed electric machine systems have drawn vectors (I1-I6) and three zero vectors(I7-I9), as shown in Fig.
great attention recently [35-45]. Based on the aforementioned 3(b). The reference Iref of three-segment SVM is synthesized by
scenarios, the succeeding scripts are organized as following: two nearby active vectors and one zero vector. The dwell times
the fundamental modulation and control schemes for PWM T1, T2 and T0 for I1, I2 and I0 are calculated according to the
CSC fed electric machine systems are briefly introduced in ampere-second balancing principle by (1), where Ts is the
Section II. Section III and Section IV introduce the modulation sampling period, ma is the modulation index, and θ is the vector
and control techniques to suppress the low-order harmonics and angle (−π/6 < θ < π/6). Detail principle of SVM for PWM CSC
the LC resonance, respectively. The CMV issues of CSC fed can be referred in [4, 8].
drives are discussed in Section V. Section VI presents the T1 = ma sin(π / 6 - θ )Ts
application of modular CSCs and the future trend of HP PWM
CSCs fed machine systems. Finally, conclusions are drawn in T2 = ma sin( π / 6 + θ )Ts (1)
Section VII. T0 = Ts - T1 - T2

II. FUNDAMENTAL KNOWLEDGE Because of the better harmonics performance under low
switching frequency, SHE is dominantly employed in grid-side
The trapezoidal pulse-width modulation (TPWM), the space converter, while the SHE, TPWM and SVM are hybrid used by
vector modulation (SVM), and the selective harmonics motor-side converter to achieve both the improved current
elimination (SHE) are three major modulation schemes used harmonic performance and dynamic performance under a wide
for PWM CSCs [4]. The SHE is able to eliminate a specific set speed range. In the practical applications, SHE is used under
of undesired harmonics with low switching frequency. The the high-speed range, and TPWM and SVM are implemented
switching angles θ1, θ2, …, θN indicate the N degrees of freedom under the low-speed range [3].
for eliminating N-1 harmonics, and 2N+1 pulses are required As for the control schemes, PWM CSR can be operated with
per half cycle consequently. These switching angles of SHE are either the fixed-unity modulation index with delay-angle
calculated offline by mathematical equations for harmonics control or modulation index control to regulate the DC-link
elimination. But the computation process is complex and there current. Normally, the delay-angle control is used for PWM
will be no solution when the pulse number per cycle increases. CSR on grid side due to the implementation of SHE [4]. While
The SHE schemes with three pulses and five pulses per half in the CSC based WECS system, the grid voltage-oriented
cycle are exemplified in Fig. 2 [8]. control (VOC) is utilized for the grid-side CSR. Modulation
In contrast to SHE, SVM and TPWM are two online schemes index and delay-angle controls are implemented to satisfy the
that feature better dynamic performance. But they exhibit larger requirements of DC-link current regulation and PF control
low-order harmonics. The TPWM requires a special design, according to the grid code [5, 8]. In the motor side, the
where no switching signal is generated in the center π/3 interval field-oriented control (FOC) scheme is mainly used to control
of both half cycles of modulated waves, to meet the gating the flux and torque independently. The speeds ωr and rotor
constraints of PWM CSC. The modulating wave and carrier angle θr of electric machine are fed back to the CSI controller to
wave needed to generate TPWM pulses are illustrated in Fig. track the speed reference. Under a certain power condition,
LIU et al.: RECENT DEVELOPMENTS OF MODULATION AND CONTROL FOR HIGH-POWER CSCS FED ELECTRIC MACHINE SYSTEMS 217

ωr Capacitor
LPF LPF Us Field oriented control
current
ω*r - θr
PI θdci θ
SHE
d-axis Idc_ref mi &SVM
current /
1 i dc
ωr&θr
CSI
CSR idc Ldc CSI M
U g L g Cg
[ [
Cf Us

PLL CSR
θg
Idc_ref θdcr θ
PI arc cos SHE
idc
LPF Delay-angle Control

Fig. 4. Control strategies for current source drives. Fig. 5. Dwell time calculation and vector selection based on NS-SVM and
conventional SVM.
smaller DC-link current ripples and lower conducting losses
can be achieved with the minimized DC-link current, which can Modulation schemes based on the natural sampling (NS)
be obtained by applying the fixed unity modulation index technique generate the modulated waveforms with superior
strategy on the motor-side CSC [8]. This control strategy is a harmonic performance due to the accurate dwell time
tradeoff between the system efficiency and dynamic response. calculation. However, the discretization error always exists in
The DC-link current reference is calculated from the CSIs and digital implementation of conventional SVM due to the low
the actual DC-link current is regulated by the grid-side CSRs. sampling frequency. Fig. 5 illustrates the dwell time calculation
The overall control strategies for the CSC fed drives are and vector selection in sector I based on NS SVM and
illustrated in Fig. 4. conventional SVM, respectively. As can be seen, the dwell
times of the conventional SVM are calculated once in the
III. LOW-ORDER HARMONICS REDUCTION beginning of the sampling period and are maintained fixed
The maximum switching frequency is normally set around within the whole period, while NS SVM calculates the dwell
several hundred Hz in the industrial HP CSC drives for the time on a basis of a continuous approach so that the compared
permitted power losses. However, high-magnitude low-order dwell time is more accurate. From the vector arrangements at
harmonics, including 5th, 7th, 11th and 13th, are generated in the bottom in Fig. 5, it can be observed that deviation of dwell
modulated converter currents due to the discretization error in time of space vectors exists in the conventional SVM, which is
the digital realization [10]. In addition, large overlapping the reason why distinct low-order harmonics are generated in
period will also increase the low-order harmonics and reduce the modulated converter currents [10].
the fundamental in the modulated converter currents [15-16]. Many research works have been conducted to reduce the
The input line currents are strictly regulated by the harmonic low-order harmonics under low switching frequency by using
requirements set by IEEE Standard 519 [9]. However, those the SVM. Different vector sequences of conventional SVM
generated harmonics will not only degrade the grid-side power combining with the synchronization method are investigated in
quality, but also produce the excessive torque ripples on the [11] to generate the minimum magnitudes of the low-order
motor and even excite the LC resonance, which bring great (mainly 5th and 7th order) harmonics. It is indicated that
challenges to the CSC based electric machine system. harmonic performance of modulated currents can be improved
Therefore, operation of HP CSC energy conversion system by selecting two vector sequences under different modulation
with low switching frequency requires appropriate modulation indexes. However, this method depends on the conventional
and control techniques to contain the steady-state low-order SVM and the overall performance is still limited. A minimum
current harmonics. harmonics tracking technique, which utilizes a feedback
concept and calculate the dwell time four times in one sampling
A. Mitigation of Discretization Error period, is proposed in [12] to minimize the 5th and 7th order
The SHE provides superior harmonic performance than harmonics. This method can improve the low-order harmonics
TPWM and SVM at low switching frequency, but suffers from performance to some extent, but suffers from complex digital
limited dynamic performance and is difficult to be used in low implementation online.
speed range. The implementation of TPWM should meet The multisampling SVM is proposed for PWM CSC in [13].
special requirements to satisfy the switching constrains for A sampling ratio is defined by dividing the sampling frequency
CSC, which is also difficult to improve the harmonic by the fundamental frequency. With higher sampling ratio, the
performance. On the other hand, SVM features flexibility of calculated dwell time is closer to that of the NS-based
sequence arrangement and easy digital implementation. technique so as to reduce the deviation error of dwell time.
Therefore, this section mainly focuses on the SVM techniques However, the switching frequency may be slightly increased
to eliminate the low-order harmonics. with this method due to the sector transition and
218 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

Pat
Ura（40V/div）

Time（10ms/div） iwa（5A/div）

-8.24dBm -26.5dBm

(a)

(b)
Fig. 7. Experimental results of different modulation schemes. (a) Traditional
SVM scheme. (b) Proposed SVM scheme.
of PWM CSCs. For instance, the switching situations of power
switches S1, S2, S4 and S6 of PWM CSR under the three-phase
Fig. 6. Commutation situations with overlapping-period effect under different voltages of Ua>Uc>Ub in sector I are shown in Fig. 6(b)-(1).
voltage relationships. (a) Ideal commutation situation. (b) Real commutation During the whole sampling period, S1 remains on state while S6,
situation. (c) Commutation with the proposed schemes. S2 and S4 turn on in sequence. During the first overlapping
multi-intersection between the discrete dwell time wave and the period, both S2 and S6 receive the turn-on signal. However, S2
carrier wave. In order to achieve an approximate NS effect will turn off due to the biased voltage Uc>Ub, so S6 will keep on
under the limited several-hundred-Hz switching frequency, state until the end of dwell time T1+td. Commutations of S2 and
Wei et al. [14] derived the precise equations on the basis of the S4 are similar during the second overlapping period. It indicates
Newton–Raphson iteration algorithm to solve the nonlinear that the dwell time of S2 remains unchanged as T2, but the dwell
calculation of dwell time and obtain the dwell time of space time of S4 and S6 has a deviation of td under voltage relation of
vectors accurately, which gives the good low-order harmonics Ua>Uc>Ub, which are different from that of the ideal situations.
performance. The commutation processes under other voltages relations can
Comparing the four optimized modulation schemes, it is be derived accordingly, as shown in Fig. 6(b)-(2) to Fig.
indicated that the combined schemes [11] is simple but the 6(b)-(4). Those dwell time deviation results in the low-order
harmonic performance is limited. The minimum harmonics harmonics in the modulated converter currents.
tracking technique [12] and the multisampling SVM [13] need An optimal overlapping-period distribution method is
to calculate the dwell time multi-times within one switching introduced in [16] to solve the overlapping effect. Different
period, which features for complex digital implementation. The from placing the overlapping period at the end of switching
natural-sampling-based SVM [14] only need to calculate the signal with the traditional SVM scheme, the proposed method
dwell time once, but nonlinear equations that based on the distributes the overlaps depending on the measured AC-side
theory derivation are needed to be solved, which may requires capacitor voltage information. The switching commutations of
the high performance digital processor. Therefore, the SVM S1, S2, S4 and S6 with the proposed method under the voltage
relations of Ua>Uc>Ub are exemplified in Fig. 6(c)-(1). As can
scheme featuring good harmonic performance with easy digital
be seen, the overlapping period is distributed ahead of the
implementation should be further investigated.
turn-on signal of S2 and S4, which is different from that of
B. Mitigation of Overlapping-period Effect traditional SVM in Fig. 6(b)-(1). Under this circumstance, the
On the other hand, the generated low-order harmonics in conductions of S2 and S4 is hindered by reverse voltages during
modulated currents due to the overlapping-period effect is commutations. It is indicated that the dwell time of space
recently investigated and solved in [16]. Overlapping periods vectors remains the same as calculated under all voltage
are normally placed at the end of switching signals to ensure the relations with the proposed method as shown in Fig. 6(c)-(1) to
proper switching commutations. The ideal commutation Fig. 6(c)-(4). Therefore, the harmonic performance of
situations of power switches are shown in Fig. 6(a), where td modulated converter currents is effectively improved.
denotes the overlapping period. The dwell time T1, T2 and T0 The harmonic performance of converter currents iwa with
are expected to remain as calculated during the whole switching both the traditional SVM and the proposed SVM scheme have
periods. However, the real commutation processes of power been conducted in experiments, as shown in the Fig. 7(a) and
switches are decided by different AC-side three-phase voltages Fig. 7(b), respectively. Pat indicates the switching patterns of
LIU et al.: RECENT DEVELOPMENTS OF MODULATION AND CONTROL FOR HIGH-POWER CSCS FED ELECTRIC MACHINE SYSTEMS 219

40

20 Gi (s)_3.3p.u. Gi (s)_5.8p.u.

0
Gv (s)_3.3p.u.
-20

-40 5th 7th

Gv (s)_5.8p.u.
(a) (b)
-60 1
Fig. 8. Single-phase equivalent circuit for grid side and motor side. (a) Grid 10 102 Frequency (Hz) 10
3
104
side. (b) Motor side.
the proposed method. With the traditional SVM, the Pat keeps Fig. 9. Magnitude-frequency characteristics of different LC filters.
zero to assign the overlaps at the end of switching signals. As
can be seen, the 5th and 7th order harmonics of iwa are
-8.24dBm and -26.5dBm. On the other hand, the Pat of the
proposed method changes according to the AC-side voltage
information as presented in Fig. 7(b). The 5th and 7th order
harmonics are reduced correspondingly, which verifies the
effectiveness of the proposed distribution method.

IV. LC RESONANCE SUPPRESSION

Fig. 10. Different connection of virtual resistors to damp the LC resonance.
In the CSCs fed electric machine systems, three-phase
capacitors (Cg and Cf) are required on ac sides of both CSR and It indicates in (2) that the LC filter forms a second-order
CSI to assist switching commutations and filter high-frequency system and the corresponding resonant frequency is
current harmonics. However, the LC resonance problem can be  r  1 Lg C g . The magnitude-frequency characteristics of
caused from either the grid side or machine side due to the LC transfer function Gi(s) from rectifier current and transfer
filters, as shown in the single-phase equivalent circuits of grid function Gv(s) from grid voltage with 3.3p.u. and 5.8p.u.
and machine side in Fig. 8. The series and parallel LC resonance frequencies are presented in Fig. 9 (the series resistor
resonances happen when the low-order harmonics are Rg is set at 0.05p.u. in this case). It is illustrated that the PWM
contained in the modulated converter currents and line voltages, CSR suffers severe parallel LC resonances arising from the
resulting in the issues of distorted line and machine currents harmonics of modulated rectifier currents.
and even the system instability [17]. Previous researches of LC The passive damping resistors are always avoided
resonance suppression are mainly studied under the normal particularly in HP applications mainly due to the cost of power
operation conditions for CSC-based system [17-26]. Recently, losses [17]. Active damping methods based on the virtual
the LC resonance suppression under the fault-tolerant operation resistor are preferred to damp the possible resonance and
conditions of current source drives has also been conducted in maintain the efficiency at the same time. A number of active
[27, 45] to improve the phase currents quality of the electric damping strategies have been studied to suppress the LC
machine. resonance either from the grid side or the machine side in the
CSCs fed drive. Generally speaking, the virtual resistors of
A. LC Resonance Suppression Under Normal Conditions
active damping methods can be connected in series or in
In the HP CSC based electric machine system, the capacitor parallel with the LC filter, as shown in Fig. 10. Active damping
is usually in the extent of 0.3p.u. to 0.6p.u. and the filter methods using the proportional capacitor-voltage feedback
inductor ranges from 0.1p.u. to 0.15p.u. in the grid side. The (CVF) and the derivative inductor-current feedback (ICF) are
grid-side LC filter forms the resonant frequencies varying from introduced for HP PWM CSR in [17] and [18], respectively. It
3.3p.u. to 5.8p.u., which covers the 5th order harmonic and may is indicated that both methods can effectively suppress both
arouse the LC resonance if system is insufficient damped [10]. parallel and series resonances. Li et al. [19] proposed a hybrid
On the machine side, the filter capacitor and the stator method combining the CVF and three-step modulation signal
inductance have values of 0.3p.u. to 0.6p.u. and 3p.u. to 5p.u., regulator to suppress both the transient and steady state LC
respectively. The resultant resonant frequencies vary from resonance. Bai et al. [20] comprehensively investigated and
0.6p.u. to 1.0p.u., which is within the motor operation analyzed different variables feedback controls to damp the LC
frequency and may result in the system instability [14]. resonance of CSR. It indicates that the damping effect can be
Take the LC resonance of PWM CSR, as shown in Fig. 8(a), effectively improved with a combination of different state
for example, the grid-side transfer function of series and variables.
parallel LC resonances can be derived as: As for the CSI-fed drives, a simple CVF is used to damp the
I g = Gi ( s ) I wr ( s ) + Gv ( s )U s ( s ) possible multiple LC resonances for the CSI based multi-motor
1 sC g (2) applications in [21]. The dynamic capacitor voltage control
= 2 I wr ( s ) + 2 U s ( s)
s Lg C g + sRg C g + 1 s Lg C g + sRg C g + 1 (DVC) method and the hybrid modulation strategy (SHE and
220 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

Healthy stator winding

Ldc idc iABC
A
B
PWM1 C
CSI1
[ uabc
θr, ωr
iE E
PWM2 Ls
Cf (a)
CSI2 F

Faulty stator winding

Fig. 11. System structure with phase D open-circuit fault.

SVM) under low switching frequencies are designed for the HP

CSC fed drives in [22-23]. This DVC method utilizes the
fundamental capacitor voltage closed-loop control to suppress
the steady and transient LC resonance. Furthermore, Zhang et (b)
al. [24] investigated the system resonance caused by the Fig. 12. Simulation results of phase currents of healthy stator winding. (a)
distortion of DC-link current due to the small DC-link inductor Without LC resonance suppression. (b) With LC resonance suppression.
and the low switching frequency. Harmonics and
interharmonics with a set of possible frequencies are generated stator winding is illustrated in Fig. 11, where the set of stator
by the harmonics interaction between the CSR and CSI through winding with phase-ABC is defined as the healthy stator
DC-link inductor. The damping method of DC-link virtual winding and the set of winding with phase-DEF is called the
impedance is introduced to suppress the resulted harmonics and faulty stator winding. The phase angle of phase-E current
system instability. should be controlled the same as that of phases-EF back EMF to
In terms of the more commonly used SHE scheme, Zhou et generate the maximum electrical torque under phase-D
al. [25] presents the selective harmonics compensation (SHC) open-circuit fault condition [28]. Under such conditions, the
technique to realize the active damping of grid current electrical torque generated by the faulty stator winding of
harmonics introduced by the background harmonics of grid machine is a double-frequency fluctuated component. The
voltages. Different sets of switching angles should be off-line faulty inverter CSI2 can be operated as a single-phase inverter
calculated and saved in lookup tables with the SHC. However, with one-phase opening fault. The compensation of capacitor
there exist drawbacks in this method: (1) both calculation and current in CSI2 needs to be considered because the motor
storage are challenging considering the mitigation of currents are coupled with inverter currents through capacitor
multi-harmonics; (2) the compensation effect may be limited currents. However, the LC resonance is not a big concern for
due to the one sampling delay of compensation signals. CSI2 since only fundamental components are contained in the
Different from SHC, Zhang et al. [26] directly modified SHE to phase-E current of faulty stator winding.
realize the real-time harmonic compensation. This is realized As for the healthy inverter CSI1, the q-axis current value of
by adjusting the phase angle with compensation signals, which the healthy stator winding is set as the periodic quantity
can be calculated with algebraic equations. This method does superimposed by constant component to compensate the
not require establishing lookup tables and the online active electrical torque fluctuation generated by the faulty stator
winding. Under such condition, the design of d-axis current
harmonic compensation can be achieved using SHE technique.
value of machine should be considered carefully because of the
B. LC Resonance Suppression Under Fault-Tolerant existence of the LC filter. Normally, the d-axis current value is
Operation Conditions set as zero to minimize the copper losses [28]. However, the
Recently, the LC resonance suppression under the low-order (mainly the third order) harmonics appear in the
fault-tolerant operation has been investigated in the CSC based phase-ABC currents of the healthy stator winding with this
six-phase permanent-magnet synchronous motor (PMSM) setting of dq-axis current values, as shown in Fig. 12(a).
drives [27, 45]. The dq-axis current values of CSIs under Therefore, this d-axis current reference cannot be applied for
normal operation conditions are DC quantities to generate the the CSC module because the low-order current harmonics will
steady electrical torque. Three-phase currents references can be stimulate the LC resonance between the filter capacitors and the
obtained by applying the reverse park transformation to the motor inductors. To avoid this situation, a sine-function
dq-axis current references. It is expected that only the component with the same amplitude and frequency as the
fundamental components are contained in the three-phase cosine-function component in q-axis current value is used in the
currents of machine, so that no LC resonance would be excited d-axis current with the proposed reference design. As shown in
due to the harmonics. Fig. 12(b), the phase-ABC currents of the healthy stator
The system structure of the cascaded CSCs fed machine winding are sinusoidal with the special design of d-axis and
system with the phase-D opening fault occurring in one set of q-axis current references. In addition, the
LIU et al.: RECENT DEVELOPMENTS OF MODULATION AND CONTROL FOR HIGH-POWER CSCS FED ELECTRIC MACHINE SYSTEMS 221

TABLE I
DEFINITION OF CMV UNDER DIFFERENT SWITCHING STATES

Space Vector Switching States CMV

I1 (S1 , S6) -0.5 Vc
I2 (S1 , S2) -0.5 Vb
Active I3 (S2 , S3) -0.5 Va
States I4 (S3 , S4) -0.5 Vc
I5 (S4 , S5) -0.5 Vb
I6 (S5 , S6) -0.5 Va
Fig. 13. Definition of CMV in transfermorless current source drive system.
Zero I7 (S1 , S4) Va
I8 (S3 , S6) Vb
proportional-integral-resonant (PIR) controllers are used to States
I9 (S5 , S2) Vc
track the periodical d-axis and q-axis current reference values
of the healthy winding. Thus, the LC resonance problem is
prevented. More details of the reference design can be referred scheme due to its flexibility of space vector arrangement and
in [27, 45]. continuous modulation index adjustment [29]. The CMV
values generated by different space vectors are given in Table I,
V. COMMON-MODE VOLTAGE MITIGATION where the CMV peaks can be up to the peak values of line
voltages when zero states of space vector are used. It is
The CMV is generated by the rectification and inversion indicated in [30] that the peaks of CMV are mainly generated
process in the current source drives. The CMV will appear by the zero-states vectors, while the third-order harmonics in
between the neutral point of the stator windings of electric CMV are caused by the active-state vectors of the SVM scheme
machine and the ground. Due to the existence of parasitic for CSCs. The peak value of CMV can reach as high as the sum
capacitance between the stator windings and the ground, the of the CSR-side CMV peaks and CSI-side CMV peaks when
bearing current will be induced [29]. Fig. 13 shows the their polarities are opposite.
configuration of a kind of transformerless PWM CSC based Some of methods have been proposed to reduce the CMV
drives [30]. The key is to invent an integrated DC-link choke, without using the zero-state vectors of SVM. For example, Zhu
which includes the common-mode inductance of Lcm and the et al. [29] introduced the nonzero-state modulation concept in
differential-mode inductance of Ld. The neutral points of the VSC, such as the nearest three states (NTS) and the
grid-side and the machine-side filter capacitors are connected, active-zero-state (AZS) modulation technique, for CSCs to
in such a way that the stator winding of electric machine will reduce the CMV. Although these methods can effectively
not bear the CMV. Instead, the integrated DC-link choke will mitigate the CMV to some certain extent, they suffer from the
bear the CMV, so the isolation transformer in the traditional reduced range of modulation index, higher switching
CSC fed drive system is saved. The size of the integrated frequencies and deterioration of power quality [30]. Therefore,
DC-link choke can be further reduced when the CMVs from CMV mitigation strategies with the zero-state vector selection
CSR-side and CSI-side are minimized. One effective way to have been proposed in [30-31], which allows the use of
realize the CMV mitigation is optimized design of the pulse zero-state vectors. Minimization of CMV peak value or
patterns of modulation schemes [29-34]. reduction of CMV average value is realized without affecting
As shown in Fig. 13, the CMVs in CSCs based system the modulation index range of SVM and the harmonics profile
consist of the CSR-side CMV CMVCSR and the CSI-side CMV of modulated currents. A CMV reduction method based on the
CMVCSI, which are defined as following: model-predictive control is introduced in [32], aiming at
V pr _ g  Vnr _ g reducing the CMV peak value with optimal selection of space
CMVCSR  (3) vectors on CSR-side and CSI-side simultaneously. However,
2
higher sampling frequency or multisampling methods are
V pi _ o  Vni _ o
CMVCSI  (4) required to achieve the reference track.
2 These methods [29-32] can be generally summarized as
where Vpr_g and Vnr_g are the voltages at the CSR DC-link adjusting the pulse sequences to achieve the CMV mitigation.
positive terminal (pr) and negative terminal (nr) with respect to However, as low switching frequencies are used in HP CSC
the three-phase neutral g of the grid; Vpi_o and Vni_o are the system, the harmonic performance of modulated converter
CSI-side voltages with respect to the three-phase neutral o of currents are inevitably affected due to the adjustment of the
the machine. If the differential inductance Ld in the positive DC pulse patterns [11]. On the other hand, considering low
link is equal to that in the negative DC link, the total CMV of switching frequencies applied in HP drives, the low-order
the whole current-source drive CMVo_g can be defined by harmonic performance of the converter currents should be
following. improved while the CMV mitigation is considered. The
CMVog = CMVCSR - CMVCSI (5) reference-trajectory-optimized SVM [33] and the NS SVM
based CMV mitigation methods [34] are two methods proposed
Various CMV mitigation methods have been designed for to realize the reduction of both the CMV and the low-order
the current source drives, which mainly focused on the SVM harmonics of modulated converter currents. The former one
222 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

Multi-Module Converter Topologies

Parallel PWM CSCs Cascaded PWM CSCs

PWM PWM CSI1

CSI1
idc idc
PWM
CSIn PWM CSIn

Control Applications modulation Fig. 15. Configuration of the grid-connected CSC system [41].

Fig. 14. Configuration of cascaded and parallel converters.

implements the SVM-derived SHE scheme by incorporating

relevant concepts from SVM into SHE, while the latter applies
the NS-based SVM [14] scheme to mitigate the CMV of the
CSR. However, investigations of improving both the harmonics
and CMV performance are still rare, more researches should be
encouraged as these two aspects are both important for the HP
CSC fed electric machines.

VI. MODULAR CSCS FED SYSTEMS AND FUTURE TREND

A. Modular CSCs Fed Systems
Fig. 16. DC-link current ripple with traditional and coordinated modulation
With the increasing requirements of higher power capacity schemes. (a) Traditional scheme. (b) Coordinated scheme.
and reliability in HP industrial applications, the topologies of
modular CSCs have been considered due to their advantages of [38]. So far, some research works focusing on applying the
high power capacity and module redundancy [35, 43]. There cascaded CSCs to the WECS have been conducted. In [38], the
are two kinds of commonly used modular CSC topologies, cascaded PWM CSCs are applied on both offshore side and
namely, the parallel CSCs and the cascaded CSCs. The onshore side of WECS. This simple system topology can help
configurations of parallel CSCs and the cascaded CSCs with a eliminate the use of bulky and costly concentrated offshore
single DC current source are shown in Fig. 14 as the converters required in the VSCs based counterparts. In [39], a
exemplification. The parallel and cascaded CSC topology can novel medium-frequency isolated structure is proposed in the
increase the system power region without the connection of cascaded CSCs based offshore WECS to improve the power
power switches in series or in parallel, thus eliminating the density and the system operation efficiency.
transient/steady-state voltage-sharing problem of In addition, not only the power converters but also the
series-connected and parallel-connected switches. In other electric machines have used the concept of redundant modules
words, low voltage/current rated power switches can be easily to increase the reliability and performance of HP generation
applied in the HP applications with these two topologies. and drive systems [40-45]. Multiphase machine is one typical
The parallel CSCs, also known as multilevel current source candidate for the high-reliability HP applications, offering
converters, offers several advantages in terms of high power advantages of lower electrical torque ripple, higher power
capability and excellent quality of output current waveform rating and fault tolerant capability [40]. Therefore, the
under low switching frequency [35]. The parallel CSCs can be multiphase machine systems fed by modular converters have
further divided into two types: The first type is direct parallel attracted great attentions in some industry fields, for instance,
connecting of two back-to-back CSCs, which has independent ship propulsion, aerospace, electric vehicles and elevator
DC current source for each paralleled CSI. In the second type, traction system [42]. Many research works have been
the paralleled CSCs share one DC current source, which can developed for the modular VSCs fed multiphase drives to
reduce the size and cost of the system [37]. However, the improve the system performance and obtain high reliability
DC-link current balancing and the circulating current issue are with proper modulation and control schemes [40-42].
challenging for the second type, as paralleled CSCs share the Recently, the coordinated strategies of modulation and
same DC current source and three-phase filter capacitors as control have been studied for cascaded CSCs fed multiphase
shown in Fig. 14. Appropriate modulation and control machine systems in [44-45]. Fig. 15 shows the system structure
strategies should be developed to solve these concerns of the of cascaded CSCs fed dual three-phase PMSM drive, where
parallel CSCs based system [36-37]. several CSCs are connected in cascade to convert power
On the other hand, the cascaded CSCs share the common between the grid and the electric machine. The DC-link current
DC-link current, and thus the DC-link regulation is a challenge ripple is an important factor in the CSC based drive system,
as each converter may have different DC-link requirements since it will introduce extra power losses, low-order harmonics,
LIU et al.: RECENT DEVELOPMENTS OF MODULATION AND CONTROL FOR HIGH-POWER CSCS FED ELECTRIC MACHINE SYSTEMS 223

TABLE II
OVERVIEW OF MODULATION AND CONTROL SCHEMES FOR RELATED ISSUES
WITH REFERENCES

Related Issues References Strategies

Low-order harmonics [10-16] Modulation
[17-21, 24, 27] Control
(a)
LC resonance [25-26] Modulation

[22-23] Modulation & Control

Common mode voltage [29-34] Modulation
Modular CSCs [35-45] Modulation & Control

The PWM CSCs fed drives have been widely used in HP

(b) applications with low dynamic requirements, for example, fan
Fig. 17. Experimental results of different modulation schemes in the cascaded and pumps. This is due to the low switching frequency and the
CSC-fed drive system. (a) Traditional scheme. (b) Coordinated scheme. dominant use of SHE scheme [1, 3]. However, with the
torque ripple and even system instability [46]. As shown in Fig. development of power devices and the implementation of
16(a), the severe DC-link current ripple is generated in the advanced modulation and control schemes, the PWM CSCs are
back-to-back CSC fed drive systems operated under the regarded as the promising and competitive alternatives in other
low-speed region with low back-EMF. The reason lies in the industrial applications, such as WECS [2, 5] and HVDC [7],
large voltage difference between the voltage peak on the CSR due to the increased flexibility and dynamic performance. On
side and the voltage peak on the CSI side. In Fig. 15, Vrd and Vid the other hand, as the requirements of higher power capacity
are the DC-link voltages on the sides of CSR and CSI, and reliability for HP industrial applications is increasing, the
respectively. An improved pulse patterns arrangement has also topology combining the modular CSCs with multiphase
been proposed to reduce the DC-link current ripple by machines is regarded as an emerging trend, as discussed in
collaborative SVM strategies of CSR and CSI in [46]. The good Section VI-A.
performance is obtained in suppression of DC-link current In terms of the modulation and control scheme, the choice
ripple under the similar AC voltages on CSR side and CSI side. between the dynamic response and the harmonic performance a
But the AC terminal voltages on CSI side are variable while the tradeoff in today’s HP CSCs fed drives. There are three
AC terminal voltages on CSR side are constant for the possible technical solutions: the first solution is considering the
applications of WECS. Therefore, the voltage difference harmonic modification of the traditional SVM scheme, which
between the CSR side and the CSI side will be large under the can take full use of the flexibility and easy digital
low-speed operation of WECS, and the collaborative design of implementation of SVM [10]; the second solution is combining
SVM strategies on CSR side and CSI side is not enough to the offline optimized modulation with advanced control
suppress the DC-link ripple. On the other hand, the cascaded scheme like stator flux trajectory control to achieve both good
CSC configuration presents an opportunity to optimize the harmonic and dynamic performance under low switching
SVM strategy of each CSC module on the single side of CSR or frequency [47-48]; the last one is applying the model predictive
CSI, as shown in Fig. 16(b). Thus, the suppression of DC-link control (MPC) to achieve the multi-objectives (low-order
current could be achieved under various operation speeds of harmonic distortion and dynamic performance) optimization
electric machine. [32, 49]. However, researches regarding these three aspects for
Fig. 17(a) and Fig. 17(b) show the comparison of the HP CSC system is rare are present, more efforts should be
experimental results with the traditional modulation and the made to improve the low-order harmonic performance and
proposed modulation, respectively. It can be observed in Fig. dynamic performance of the HP PWM CSC fed electric
17(a) that the CSR-side DC-link voltage changes from 0 to machines system.
150V, while the CSI-side DC-link voltage changes from 0 to
90V during the 200us sampling period. The obvious DC-link VII. CONCLUSION
current ripple is produced consequently due to the large This paper presents a comprehensive review of recent
DC-link voltage difference between the voltage peaks on CSR developments of modulation and control schemes for HP PWM
side and CSI side. In Fig. 17(b), both the DC-link voltages of CSCs based electric machine systems, which are considered as
the cascaded CSRs and CSIs become smoother by using the a high-reliability system with the long-life DC-link choke and
collaborative SVM on the single side of CSR and CSI in high immunity for short-circuit faults. The challenging issues in
[44-45]. Consequently, the DC-link current ripple is reduced LC resonance suppression, low-order harmonics reduction,
significantly in Fig. 17(b). CMV mitigation and modular CSCs are discussed in PWM
CSCs fed systems. In particular, the overlapping effects during
B. Future Trend and Challenges
224 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

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SanminWei received the B.S. degree in
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instruments from Beihang University,
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Beijing, China, in 1998, respectively, and
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35, no. 6, pp. 6153-6164, Jun. 2020. from Tsinghua University, Beijing, China. .

[46] X. Guo, D. Xu, J. M. Guerrero and B. Wu, "Space vector modulation for From March, 2002 to June, 2004, he worked as postdoctoral
DC-link current ripple reduction in back-to-back current-source fellow at Ryerson University in Canada, majoring in electrical
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62, no. 10, pp. 6008-6013, Oct. 2015. and computer engineering. In 2002, the research team led by
[47] J. Holtz and N. Oikonomou, "Synchronous Optimal Pulsewidth Wei won the Outstanding Cooperation Award issued by the
Modulation and Stator Flux Trajectory Control for Medium-Voltage Natural Science and Engineering Fund of Canada, and in 2004,
Drives," IEEE Trans. Ind. Appl., vol. 43, no. 2, pp. 600-608, Mar.-Apr. the research team led by Wei won the Prime Minister's
2007.
Outstanding Research Award from the Canadian Department of
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Drives Operating at Very Low Switching Frequency—An Overview,"
Energy to reward the outstanding contribution to industrial
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[49] T. Geyer, "A Comparison of Control and Modulation Schemes for and control system. Since July 2017, he worked in China TX
Medium-Voltage Drives: Emerging Predictive Control Concepts Versus IIOT Corporation Limited., and now serves as the deputy
PWM-Based Schemes," in IEEE Transactions on Industry Applications, general manager of the company. During this period, he
vol. 47, no. 3, pp. 1380-1389, May-Jun. 2011.
participated in the research and development of electric drive
system of 5500HP fracturing pump electric drive system and
the research and development of intelligent mine operating
Pengcheng Liu (S’76) received the B.Sc. system platform (RED-MOS).
degree in electrical engineering from
Southeast University, Nanjing, China, in
2016. He is currently working toward the
Ph.D. degree in electrical engineering in Yuwen Bo received the B.Eng., M.Eng.
the school of electrical engineering, and the Ph.D. degree from Tsinghua
Southeast University, Nanjing, China. University, Beijing, China, in 1997, 2000
His research interests include and 2003, respectively, all in electrical
current-source converter, modulation engineering.
techniques, motor drives and renewable energy generation. From September 2003 to December
2004, he worked as postdoctoral fellow at
Ryerson University in Canada, majoring in
electrical and computer engineering. Since
Zheng Wang (S’05–M’09-SM’14) July 2018, he has worked in China TX IIOT Corporation
received the B.Eng. and M.Eng. degrees Limited., and he currently serves as the representative
from Southeast University, Nanjing, China, supervisor and the general manager of the R&D center of China
in 2000 and 2003, respectively, and the TX IIOT Corporation Limited. During this period, he
Ph.D. degree from The University of Hong participated in the overall design and development organization
Kong, Hong Kong, in 2008, all in electrical of Explosion-proof and intrinsically safe permanent-magnet
engineering. synchronous VFD integrated motor for mines, and organized
From 2008 to 2009, he was a the design and development of the transmission system of the
Postdoctoral Fellow in Ryerson University, Toronto, ON, inspection robot.
226 CES TRANSACTIONS ON ELECTRICAL MACHINES AND SYSTEMS, VOL. 4, NO. 3, SEPTEMBER 2020

Shaoning Pu received the B.S. degree in

electronic science and technology from
Shanghai Jiaotong University, Shanghai,
China, in 2007 and the M.S. degree in
electromagnetic field and microwave from
Shanghai Jiaotong University, Shanghai,
China, in 2010.
Since January 2011, he has worked in
China TX IIOT Corporation Limited., and
now he is the deputy general manager of China TX IIOT
Corporation Limited. and the general manager of China TX
IIOT Corporation Limited. (Qingdao). During his tenure, he
participated in the design and manufacture of the first mine
flameproof and intrinsically safe 3300V inverter in China (the
world's first 3300V voltage inverter used in underground coal
mines) and the improvement and production of mine
flameproof and intrinsically safe (1140V voltage level).