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Module 2 - Verilog HDL

ACU Verilog HDL notes 5th sem ECE

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287 views

Module 2 - Verilog HDL

ACU Verilog HDL notes 5th sem ECE

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balajibs
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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1% Ec Veatleg HDL 3B U Mopute-2 Basic Concerts Lexical CONVENTIONS tN kenastod ements” oy" dokuns” sau wed 0 eenstruct Statements, dufrattion , celorabions ath va wed te constaurck complete preqroms . + The daste kenical convertor wed ty Weu'leg HDL rr acourlor to thore in '¢! programm Ft henicol emer or dekeny con le ¥ WSuebespoce * Lemments * Opactou * Numba Apeafration * Ake + Toluntifros wok Fag worcls «Escaped tdentifias () WHarTespace PA suhitespace son de ony one of Ha fotloung : ¥ Blank spoxes (\b) * £obs (\t) * nuwka (\n) aan Wha tes pace as Aeporotu tokens, _ Whitespace as xgreud ty Veuleg ened urhen st net sgnoud mm stungs 48 Aowne on kg vaput ws arput ay Laptce ie rynoud J Nagano: kK, Aset. Prof Eck, SVIT Verthog HDL IFECSS ii) COMMENTS ; +> Lomment «con de inueted ah He xode fo readily end cleurmentatt on » Thee wu 2 wos to unite Lommenti ; ¥ 7 Cre-line comment staxts wuth JIL, Versteg 7 Pe. fon Yok peik to te tnd od Line vA matt ple= kine vomment stark with — /y wana ds muckh ¥/- Mult ple Line comment coun. Ae neskeds % One- Lne Komment coun Le embedded cr mult dene Commun in ex a= be2e » Il This 4s eo one-hine commer /% The & ow rmuttipse Line vommunk */ 7% Wisin /x an olga ¥ | comment ¥/ J¥ This & fl fegal wommert */ fii) OPERATORS > Operotors ax of S Hyper % Unery * Eo 47 Unory eperatou prrcede the veperand, Bewany epuatou wypyear Lekween two prance. Ternary eprokers Jove kwo separate proto that _ Aeponoke S epaands, Nayona-k, Asst. Prel , ECE, SviT 2 Ld Vetlog Hdl leecss Exanple a= ~b; Hm it a. sumany seperate b ii the operand, a= bsec, I gp a trnary operader « PEC or weperands, w= decid; Et 4 a benay sprater. by Crd ae operand GY NomBer Spe crercarion_ a) Sizep NumBers * Atxed mmbus ore Atpauented vas * Calze> a wtten tn dewmel anol for dewmal th w'H > fe Jenadenimal ‘bo 'B > fr inary ‘o w'0> fo vwortal ¥ Cnumbur & apex fred os digits from o-4 2B A-Fey) Uppercase deters ow egal as muumber tpeafration. Exarapl Hib 0101 [This ik a A- bit benasy umber 010) 8'b0000I101 J] Thu is an 8- bit beaaay nuumber 00001161 TUN2AC ff thu Bt W-bet dumadeuined aunbay 24 C0010 1010%1100) 16'd 255 || The ss w Ié-bit weumat number 260. (0000 0 000 Yoni » Nayar - Re, Asst. Pref ) Ece, svar Vertlog HL I8ECss ¢ b) UNSTZED NUMBERS * Numbeu that are speared auutheut a ¢ base fomat> Apeerfreation care Amal numbss by default. * Numbeu that rr awatHen sutthout Oe <étzey speeef cabin rave a. Atfoult numba wf Wb that 6 pmuletor ave machine — ~epeafre Cust be ot least 39 In'tr). 23456 Wf This is a 32-Int deamal number ty “ett ‘hes W this & a 32- Ak Ienadeeimal number ‘e3 Orn a) shu cre 32 -'t octal number 2) ‘bitoo // This uw a 32- bet Jrnasy number ‘d250 Il This 4 & 32-bit deumok number 26D ) Xo % values ¥ Veukeg hos 2 symbol for wrknowun vend hugh - tmpedorre % Ture volun arr important fer modeling Arab euacu'ts . ¥ An unknown value ob denoted Jy an "x! + A Iuigh impedane role is danced by ‘x’ - lo" 53x & The & @ I2-bte fax number ; J deaat sgesbiian bits unknown (0101 ool ey 6'AK HW This be ww bebe don number, AU unknown born 32'bu /| Ths & wo 39-bit hagh impedanu number, Nayana-k Mest. Prof , ECE, SV IT 4 Vetlog HDL feecss fn x oe deh Aobit for a numba in tunadeurmat bare eqe IG'HASXI 100 O1D1 xxxx peo! Cc Ban X ow x ats Bobrb fr w numba in wotal tase. eg:- 6'0Xh > Xxx ied Cx- da Acpartsented as 3-bits) * AK wD Mets [bat fre a nwmba de dnnary dese . : Y ~ i ngle bit ‘Ut Wd eqs A bIOX) > Aemoins FOX| (xX Aemaing 40 nny a) + Tf te meat scgneficank dik (Mb) af so number i 0) Xam , He numba i mntematiially enterdedl fre He mest argaefreant dnt awe 0) %) Z aupectivety . e he. “B'hXB > ‘kexx 1000 g'ho¢g— 00001000 BIhz&—> xzzzz!000 Ff the mat acgnt fant Wk ib ft) then O' ert ) intended tg: B'hIg > 000) 1 ovo tk & Zuo 4) NEGATIVE Numbers * Negadire number can de Apeetfied 4y puting oe manus argn defen Ehe atze fe wonsbant numbe, + Acre conmtont we elas posbive , ¥ Tk adegel to hore vr minus 49a detween < bue> 2¢ * An «phenol ayned apterfrer. ton de added Je aegred warkhmdlics + N egative number wre nepauented tn 26 comple, 4 tomplerment fem =8'd3 HT @-ba negative number stored ws 2! ¢ complement 3 = 6'sd3 I Aed fo pefening agned integer math A'd-2 Il Legad medule, uure, srput, output, aston , alure endmoduls etc. IDENTIFTERS * dents ree vase ames given te wljects 40 thot thay won ae Arpounrud in the wdesvan. Thay wane ser lefonad * Ruler waa bis or Koen fen aes Tend fren stork wth wir eal phrobetic Character of an uundescore * > Ladenti de é . > danti fees may vantain al photetic whoracteu , nomen vhoades , khe undercwore and He ellos 4g 2" > Tderdifies covet stork uth a aiget oY acgn ; 7 Wg as o Rey roord » Volue ab vdlentifrer dinput lok, I ainpud ds 2 keyword ; tok is rdentr fre Butput — wa-bowr 4 Il outputs a Reywords a-bor ix tolerti fey +) ESCAPED Lpentrerers * Vorleg HDL wlews whoracter te Le useol tn sor Falenbiper ty escaping the sderdifies, * Escaped vahordifves degia uitth the tackslosh(\) sand nok ath ant tupace. * any parntalte ASCII character ean de Included sin wsoped vdentifiers + The (VJs wmhiktepace a9 net conscderedl os Part of rdents}ier | \atb-e Nouste oh +e Aymbely Vaya Hause ef w' symbsl Nayana-k, Asst. Prof, Ece, vir 7 Vectlog HDL Igecs3 DATA TyPES W Varve Ser ¥ Vorlog supports 4 valu ond & Ataengthe to modal ty functionality sf Mot tordiuars . ¥ The value tele are Lited below VALUE LeveL | Conpsrzon IN Harowaee Crecurr ] 0 Loge Zero , foute Kendrlion | togec one , dtAue wondel en x Unknown dogee value L High simpedance, floating dtake * In addin to togic values , ataungth dvds ur sued Lo turolve conics Lebwear drives of du fpaerdh dbrengths at digital winmub. Value Lwelr 0 2 ‘1’ won trove thy Adsangth lived Masked below STRENGTH LeveL" TYPE Degree | Aupply Cae st aonget sbrong Driveng A pul Darveng Loge. stowage ea Darveng medium + dovage smal 4 borage ugha, dugh tmpelenw | Weakest Nayona-k, Asst: Prol, ECE ,Svir Vevheg HDL I? Ec 5% * q 2 tignols 4 auniqurod Atsengths axe wluven an a sure, the athens atgeak paar Fg X 2 eugnate of adaangth trong | ard uusakO “ontend , te Ault ib aolved ar a sbiong 4 % q 2 Avgne. of eoyrol shangths wre wluven en ow tn, He ruwlt & unknown (x)+ Ege 44 2 agnals +4 obaength strong! wad ahrorg 0 con fuck» the Aut tan x, ¥ bksangth levels ore partials quefd for wccurok Modeling of BL tontention » MOS daveus, dynarnic Mos wand stler Low- evel diver, * Onty tung nets “an have skovage tbrangbls Harge ; medium & small, (ii) NETS ¥ Nets apauent wonnections Letween trordumaw elemerck , + Nets dove values continuous duven en thm by the outputs 4 devices they ors connected to. ¥ On the frque dow a, be, d mre cnpubs 3 Yu outpuk m4 ond no Atpaurent connection between Mee gactee ond Fone st is a net! Wire = I'bO} Mek 0 as fread bo tegee 0 war A= OF; Nayana-K, Asst. Pre} ) ECE, Svar 4 4 IPECSB Veatlog Hol Nets ore Iebet values dry olfoult unin tray are leclany ws vectou, They con dake valu 0,1) K,% ¥ The wdlefott value of A met as ' ¥ Nets wet tiv vautpwt value of Hsin olrivers « has no duiver , £E gets the value %. Hi)REGISTERS Lf aonet ¥ Regtaters Atpauiert alata stovege elements: * Regestus Atkain value wntl wnother value is placeg Onto Hum. They wan take the values O, I, xX, B t, In x verlog , wegaken means wo vawabte that van told volue + Regester do net ned 0 uduver , unlcke aks They lo net need a clock as hardcore Arguater velo, ¥ Values wo} Atgtaten wor We changed anytime tn atmutotion ty aaargnsing MO new Value tbe tha Acgeater , ¥ Requests vars declored ty Ha keyword ‘aay! The default value pr a Aeg’ hata Hype cs ox Reg vowolte mud Le cnctialrresd suithin watttal ot’ , 7 starts ree AU FI derclorr Oo VOwabhe Agree thot con held ve value Ace = I'bh N inittobize. suet to 4 ‘bos . #00 peed! bo, HW efter 100 dime wrrte make arsed = 0 ena UA on olio be wliclad vod 44; Qed Vanes cond can be used for argned ox tnvutte Aq Avgned [63:0] ; N 3 IT 64 bit svgned value m, ayana-k, Asst. Prof , €ce,Svir Iv ECSB Verrteg He iv) VEcTors * Nets ow xq lata ypu von Le didored wr veckou(muttepl brt uals). * y Wk in not apeertred » he dofarett scalar CI-bit )» ¥ Vutou tan le decloud os [ight t toot] or Pow tdughat] , du tft eumber dn dquere tracked iy alurays meb ve. [msb:lsb], aucre [1:0] dus 5 || weclors P-bit net tus. wutine [315 0] Jus A, tusB, tues I cleclores 3 fuser f 7b, eg [63to}a; MN clechars 64-bit Jawalte “a', a9 (0: yodaddr ; 4} declarcs 4l-brt wide addiey raualte x We wan as ow Wh oe a pest of a vecko. a4 fellow, @) Verkor part select (5) Vawalle vector port select a)VECTOR PART SELECT + We van mec tre of wa vector ot parti of veces, dy Apes yong He Wt numba uuvHun [7], En: busALt] = f/f bet 7 of vedo buA bus [2:0] I 3- break siguefrrant biti of vector “bus' DNores- hee we cconmnot ae tus [02510 dn Hu deglorstion we tant sued u're [7:0}bua (ms iy igher than Leb). J dd. [02170 2- mest sarge fuiant dnts of ladda’ varcabts Nayana-K, Asst- Pro, , ECE , SVIT Vertlog HDL [8Ecse b) VARZABLE VECTOR PART ELECT Anew ee * Vou leg HDL prowdy the suc kity te Fave vorwalto park Alecks ol vento. This allows part veluctr be Le put in fu Aeopa to sdact -vouous ports of Hue vector, Thee vy DL Apectat part — select woprotors (@) [Atoruing— ait +t wdth]— part select tncsernents from stating (0) Latoating bik = + mult) - pork select clecrements from tnaing bet % The atorting bet of te port select con be vamed, but thy audi tos to Le constant y Ex: Ag [25570] .datat * I] Avkte endian netation wg [05255]detar; |) Brg endian notation Aug [10] dy; byte = dhotad [si-:8]; M ataabing bit 31; width= § =) data [31:94] byte = Aotas [24:2]; | Atnaking bek = 24) uadth=¢ => dotafss; 947 byte = ota 2 [31~78); M Akoxhing bet = 31; ausdth= 8=> clota[ ay : 1] byte = data [o4+:2] 5 Msonting bet = 24) sud tha 8 => vote [24:31] ¥ The staat dk won alto be a vowable . Th this une Hy auth hos bo be wontond. kn T fol frry f473l5 deg) days = dotat[( jest: 0]; UM seqponce sis £130] [18:4] ----Bs:2 A pork of Hu vector can de warbiatiod r aloda! LCdytenum st +28) =8'bds If tenn =I, clear fbrls 7 yy Gy a Lis:g7 L Nayana k, Asst. Prot, ECE, SVir 1 Vetkeg HpL (8ECSB WV) Integer, Rear & Ttme Register Data Tyres > INTEGER ¥ An inte ds a gensal purpose Atgcater dato. type suse] ca mont puladig quant bies y Grbegor or diclaud dy the Ray wood Sink eger a ¥ Getega vawolte 4 sued for te purpose 0f counting » 4 The default wuidth for an wnbeges is the hhosk- madre aur 4022, which ib implement abi on apeetfre (atleast 32-04) ¥ Regtstes duclored as dota type ‘Aug’ atew values vos nacgned pronk be, uheeos inkeges stow valuts oe segaed Cre 8 v6) panties. Inbegus au surged valu dnscde “bu hial ‘statement Bn: dink eae. court § |) declore vawabte vounk a4 shbeger inibiag “Mount = =I 5 I] stone -| tn” the ankege vanielte count > REAL ¥ Real numba entank ond rrol Agceter deka types ay diclassd matte te keyword — ‘Aral! ¥ Real numbes «can Le Aprrrpeed dn deamal netation eg 3-14) O% un sacenlific notation (e.g. 3e6 whch is 3Xi0f) ¥ esl mambo eonnet have .o range wlecleration mnol Hrs chefoult value is 0), ¥ Kthen wo acal value i ascarid Ae van inbeger , the cof Mumba is rounded off do the neat intega. NayouasK, Asst. Pach, ECE, Svar Vewleg HDL 1 EC Eu: ALod val ta * ll define & areal vorralle «abled delty dnrhi oS dltashelo 5 // delta u atagned te acter fee notation delta = 2613 5 Wi delta as wanscgned Avalue 9-13 end. intean 4 5 define oun enkeges 4 tana keto Fe lta y fc gets Hre Volue 2( sounded value ef 2:13) + tome ¥ Veulog acoutediion is dane mut supect t2 semulabion tims ¥ A specal dime aegiste deta dype dy aed dn Vewloy to Ato acmulation time v4 bine vowel fs ceclaud with the kiywerd din’, The wudth for tema Atgiater dota types ts implementat on apenfe dut bkt-leart b4-bry + The’ § time's ystane furclion us invoked te get the cutter Airmulodion time, dima aim_biney I hefine ee bimavanalte sim-biny tnt kod. armkima = $ hime | yp Udove tha wumenk sreclabin te! ¥ Aimudabion Lime u measuard an tory | Avmuulocion seconds, The writ 4 daneted Jy ¥ , dame ar sal kine. L Nayana-k, Asst. Prel, ECE, Svar 14 Vutleg Hou gece (vi) ARRAYS :- wottection of cements of svr'lar dole hyper + A asouys axe wellowed in Verilog fe stg snbeger, temo, seal, Acaltime arte wand vector sagrater dora bipa. # Mult duimunsconad weraiys an de declared aut sony mune, of dumenacona + Indenes needs bo Le proweded for each dumeniton, ¥ Arrays arm accrued ty sonay-nvarne [inden] ' bu dnkeger sound [0:7]; M Ain oon 4 g trbeger vowalles count nq boot [31:0] 5 i Assay 4 32 bit anguetes vost'attes . Hime — ch port [1100] 5 I} Arnay GI 10D time check pert vawaltes Ag [40] poe [0:1]. it Pray I 8 port-cde » coh pert rd ds crn wikegen mnectuin [4:0] [05955]; 1 Tivo dhimansconal vastay of dategts Arg [63:0] atrmyg yd [1520] [10] L120} [25580] 5 I] 4nd arany autar [750] sunorray [550] Man osrny 8 doments ; tach e-brt wide WAtre W-amay CrvoEs:0]; / ctectore son aanay 4 guage bet maltes +A ver A a aungte cement thot in abit wurde + + Rssougs Ors mutltipe cement thot ore bet ot n-beb ude x we wan wucgn voluss te ements of aay os showin below wount [5J=05 I make tee sh lomant of ania count = 0 vk point [lov] =0; Il Reet 100" element 4 Aims Whk-purnt pobead [2] = 07 M Ruck SA clemant of port wasiay motun[i]LoJ= 339542 /ack value d dement crdoned by [1] [0] 3355, saatouy yd LONLOILOICE] L530} =0 5 Reon Ants 1540 o] Hho wotray whose nden 4 [oJloJ[o][oq pork—ld= 0} J] Iegat syntore ~ attempt le suck entre any Nagena:K, Asst. Pare}, ECE, SVIT 1S | Veutog HOL ISECSB (tt) MEMO REES % Memewe wie modeled in Vorlog Os wo vant- olimensenal vate. Each element of the aray is knowin os an elements or masd word 4 addrsed dy a avngle omnes carder ¥ Fock cent ot usd tan le |e mow dnb. Fd pertiodlan suck in mimaiy i obtained by mscng ty walle 0s Memory rag subsurpe Enz mom! bit 0 , 2 a9 mem bit [0:1028], ¥ memory memibet watth 1K, Ie ora 023 eI love edi T7:0] rrombyts C0023) 5 ‘Je mombyte su'th 1K) bit siroecls Coogi) € / [1022 1023 le— 9 pry marys Csuy fetes I dye auprd deutrose oddres vd SII Nay ona K, Asst. Pae|, ECE, Svar 16 IB ECS Verclog HDL (wit) PARAMETERS X Verleg allows constants to de defintd sin wo mre duste oy By Mywerd “pramebe” ¥ Porometes vonnot te used ox vawabter » Paromebr type and atzes can elie be Behind En: prrouneter = 28 5 [I defines ww wonstant mn =F Porameter portid= 5% Mtlefrnes wo constant pod = 5 Porometr cache vudth=256 5 Il onttont wlefines udth of MH toche Lino , parcmeter signed [150] mudth 5 " pred acga wat fea Perameter nuidth * Paromete, volute aan be changed ascag Hee del param’ adotermunk + ‘Youlog HDL Jecalparametey ( deja watag Reyword -Local para wrx sdentitad to pexonute emaep thot they connat Le. Modiped eu th te * de poasien ' 24 Verclog HOL IBECSR Mopute- 2 || Mopures AND PorTS | Mopures A module is the date tuidding Mock in Veu'tog, — A module aan de ar eiment or collection of Lowe- Level duncan Mocks, It duccbu funcionality of design > A Medi in Vurleg wensiats f dusdinck ports we theun in figs Lelow, Boric components of a module Mopute Name, Port List, Port DECLARATIONS CaF ports PRESENT) Parameters (OPTEONAL) DECLARATION OF Weres, DATA FLOW STATEMENTS REG AND OTHER VARIABLES Casszqn) INSTANTIATION OF LoweR Auwaygs & Inzrzar Brocks| LeveL Mopuces ALL BenAvaoRAL STATEMENTS . Go In Tuese Brocys Tasks AND Functz0Ns ENDMopuLeE = SrATEMENT tg: Componente qf a Veuteg Module AA module defvartion always Jegcar uatth kyword “madule ” Nayana-K, Asst. Paol ECE, svar 2s Vetlog HDL IG ECS —> The module name, pert Wit , port decorations and optronal Porometers mut de fru an a module defatihion The five components uuthin a medule aw Vawable declarations , dota flow statements, yy ef tower medulu, Leravoral becky wand tasks 6 functions Thee “empenents eon le in ay S Plast sin the module difiniion , a The wdmedus siakemert aud sabusais some lack in module defeartion, All tomponents module y module name sand endmodule OL ophonal and con te munud sand ched Pr dustan nieds. Lonsider the emample of an SR tatdh te andlestand the componints the module, 1 ' Sbor (3d) 8 Qbar Abos t { (asset) bLa--------3 hye 6R Lod Nayona-k, Asst. Pref , ECE, Sva7 26 Verthog HDL pecs + The SR Latch con le modeled as shoun module SRtatch ( Y, Ghar , Shor, abor) 4 || module name, Portli input shar, rbor ; I) Pork declorat'ons output GY , Goo ; Nond at (G) shar, Whar) 5 Il dutunt'ab verilog prince masad mand n2d (aba, abu, 4) j Hq procbive castanuenare(outpnl, caputs) endmodule +A A Atimul Hock Ios to be utter to vety the forctionality of He valor design Mock module xtimulus } neg set) Auet 5 Nodeclaredion of reg dome wce-diffount names be uteal buine 8, Qber + I) detaration wine tame o6 differ nares arn be wed Sktath miC&, Abar, wsek, wacick)* // sutarntinte ¢ttakh antdiak degin $ronitor( $time, “eet = Gb, rcect= bb, @= Ib ") Set, nese, 8) ah = 0 5 Aesek= 0; HS set " Oj Ateet =4 5, Ho 4b = 4; suet= 0; HS sk = 4; Auek= 4; end endmodwle NOTE: For vo abtnulus block * All orpat vawabls in Bungn block wre detored as “neg” ¥ All woutput vawalter on desn block var declawed a * 4 nstantate Design Hock ~ par poramet oder ot Nayana-k, Asst Pro} ) ECE, Svar 27 Vewtlog Hou geen Ports — Pot provide the intufad by auhith a module won dommnunsokt awth its environment, > The snpvt] output pau of on TC ore att ports. —+ The enwronment con vntaract uth the module Hough oh pols. The intunels +f the module ae net viacble te the enwaonment. Ths provide a powurrdudl Pewiletity te the dercpact, > Ports ore aleo apured te os“ taminals", Last OF Ports A module depnction contains wan optional Liat of pout, Of Hu module dou not any acgnala autkh the enwaonment , Hue awe no ports in He Avast. > Lender wo he int ful adder thet u instantiated inne A top-level module named “ads, " spuk|ourput ports for sbimudus andl fl sadder it shown bela > Module stimulus is Aop- Level module » + Module fwladdl is instantiated below thinulu, Nayana-K y dest. Pash / ECE, Svr7 298 Verleg Hp I8EC SE 4 > The module full-eddy tok input en ports a,b and cin, and produces an output ven pots sum end cout. Thus module ful-aday perfouns addi bon for ths envixonment. > The modu stimulus i dep devel module an the simulate wund dees net nud be pow signals do ot Accerve argaals from He enwaonment. Thus tk wos not have wo Jick of ports, F The module mom cand pert Lith for dethe ( full-adill satiull Modul declorotions in Vewtog ih ae shown below module full addy (tum, cout) we, b, ain) » faith pest list module skims 5 Ino List of ports ——_ ¥ 2) Port DECLARATION AM ports in the eat vo} ports mut de declored in the masdule. Povs tan le declared ws follows ; ') input — input pot 2) sutput = eukput poe 3) dneunk — Lidiucbienal pot Fak posk in the iat 3 dived as Laput, wulput ot inout dased ven Hue liraecion of the port signal. The put Audmation for a y-brt full adder iy ay shown below module full-vaddt (sum, “out, ab, un) » dnput [3:0]a, bs | y- bk dab ilps sum. . a oi i Anpwk aa 5 7 futeaddl eutpwk [3:0] awmy Il Ao bit sun ofp 4 | cout ouk ye out 5 ua Zoodule entownalss endmoducle Nayonn-k, Acst Pref, ECE, Svit 24 Vewlog HDL WECsE > AIL pout declarations wart immpliutly clulared a4 Tawa i Yesteg + input" ot dined "pos oe normally leclored vas Nae" + Tf eutput ports hold or «tow vedine , hay raust Le declared as “ang + Example 2: Pert declaration fe D-FF module DFF( y, d, «tk, Aust) ¢ dnpnt aly atk, auset 5 output ay 5 D_FF Mg oy; Hop pork heldg|¢tocer value wdmodule +> Ports of the type input & snout cannot be declored ar neg" Aecorse Atg var able Ake values rol input ports «hould net shoe values drut seflect tre changes sn Hu entonal aguas Hhey oe connected. : Sg Te ANSI ¢ abyle ayrtan ke Apeaby the pos, of Hot modulo as shoun Lelow. Tha avecds aluphivation of mowing He porti det on the medule dlefvacbien wanel pert. Atak NOTE :- medile fu addy ( outpace wg [3:0] sum y Out put Ag endnodulo Nayana kK, Asst. Prot, ECE, svaz 3d Vethog HDL 19 €cst 39 Port Connection Ruves. FA pert connate of 2 unt , one wut that is intenel to the modu erd oncthn that is entenal ty Hu module. + The intemal and entend unth are connected. Thee oe Malis povenning pot conneebiors unten modules are anskont ated aurthin ether modules, > The ve Avmudeter omplainy af eng pert wonnection Matta vans woleted - The Pak uonnechion sues art vat follows net net dneut apt —_*" outpey | Ay nee Aeg onet| Mek Pork connection acles Input $ ¥ Tntunally, dapat ports must always be of type “ret ¥ Extanoly, Anput ports can de connected to a vorwabls wluch Bowe ‘out - Output % Triton, outpuk po con be woh te type “eq be’net' ’ Enkanoly, audput por must be connect ed to ae nwt! Inout: ¥ Entowally ) snout ports must -olanaiys te of Hoe hype nati ¥ Entunally ; dneut parts must always Le connected #9 6 WaDTH MATCHING $ ¥ Tt ip egal to connect intanal and enteral wrt of Nayana-k, Asst Prof, ECE, ever 3) Vewlog HDL SECS. ali ffprent airy wahen making intw- module port ann echory, ¥A aaanning is type cally cnurd thot the unulths ole net ™odkth. UNCONNECTED PoRTS $ * Veuideg wallow ports to Aumain suncennected: * Lekein autpat par may Le used enty for debugging are 4 you awe nat intersted de connect suck pos Lo thy tntunol argnols, then such pods ran Aemain unconneded Jy inaketiccting a module a shown below [tenses folsom, y»A4,B, CIN); |x out put port Cout ip unconne cles” ¥ ConnectinG Ports To ExternaL SIGNALS * Thee og 2 metheds 4 making “enneetions detween Atgnals apes fred in tho medule itantiohon wand the posts in a module ifeathion « ¥ Thee bvo methods cannst Le mud. % The 2 methods wu: ') Lennucling Ports bywordirecl heat om Port mapping Jy ordor 2) Jonneching pots ty nome oo Pert mapp Oo denaee Neayora +k , Asst. Pref, ECE, Svat 32 \ Vewlog HDL IF ECS ConnecTINg Ports By ORDERED Last * Lennecting ports dy wrlred Lak is the mort vahutive FMA acgnals te be connected mut anor sn the Medule iwtontiaton in tle same BAMA gu he tn the port Last of module velefeec tron. S Menacder tha enampds of vo fultaddy (1-b¢t futlaclder) module Top, rug [3:0]a, Bs a a AAALAR C3:o]sum; sutras — COUT 5 WM dvskonblote fuul-addy verve wonnect Avgnals £0 portrin ede, fuliodd fat (sum, cour, A,B, CIN)S Mtornert by order sds > endlne due. pets module. ful add (tum, taut) a, b, ua), output [3:0]4um ; outpuk — teuk + Jnpuk [3,0] a, bs dnpuk cn Nayana-k, Asst. Pao , ECE, svar 33 Veawhog HDL 18 ECS 4 For Lage -duavgrs uuhue module dave mor than sdpos Aue Leung He werden ef the port in the mo dle oleate on as tenparcccte cal nd wor prone. ¥ Vuuleg prowdu Hu vapaliiity te wonuck enteral 4c gna te ports ty the pert names, Aothn than ty order (portion) ¥ Me von cpecty the port venucion in ony oroler 04 dong as Ae pet name dn tHe module lefrnct'en veowectty moti the entunal signal * Eg. ane ton vennect the ports ty nome sy srakondh abing He module fubiadahy soe follows Cruhote code came entsp + nutateliin) I Ingtantiat modus fulladdy and connect pact by nanu, fullaoldy fat (cout Ceoon), + (A), + b(B) , wa'n(caw), ~Sum(stm))e v NOTE:- The crdur ef ports i not important ¥ uly these pots Hret ors bo be wonnected to tok anes tig raby mua de aperbred in poe eonnech on vy nome. * Untemucted pots won Le wlropped Eg tp cous wuere bp we uninnected , the sntantatin welt Le [ana fot (-sumCsvm), sb(B) , + ainCcrN), a, ¥ Another vadvand age ci wonnucling ports dy name thet vas dong os the port none i net changed, the order of He per in Humlist of o module van Le Aasnanged mutkiont hanging Hue pork conection tx modub, aun ood obions Nayana-Kk, Asst» Pref 7 ECE, Svat 3y (BEC Vertlog Hoe ¢ HiIeRaRcHicaL NAMES | => Vewleg supports Ivrordu col Auge methodology. + Evey modulo instomee , avgnal , A vartabte ds lefrned wath oun tdentifra, + A particular Hahurd fren tos a wunriqne plore in te wdeavgn dev enan cha « > Heercuducol name acfounuing willows us to denote woy Eiderds fra in the Busia Arierorchy duh ee Vw que viture » pe A dkuorduical name & wo dst + sedans foes separated dry alot C+) for each devel ve daerarchy > Thu, ig Cdarchiforn con be addarued from wry Place sin the velescgn dy acophy Apeatying the compiete + The top-level module is colted tee “Root” modulp 4une@ th & not tukanttated anys . It bp th shorting porat. — To aargn oe nome te von dadenke fea , skout from the op- Lwel module and trac thy path along the design Iurrorchy de the aduacaed A dunt fier + Knample ! Kenda the atmutedton sf SRLatch . The design duro duy fo the come ub thou Nayana+K, Asst. Pro ECE, SvTi cl a” DQ , / Veatloy HDL IEC SB d mai ybon (SR-dakeh) Sk , rerek Cvartattes ) na nd | o ghee Coed) Crand) Cavgrols) ry Decgn Heeraachy as SR doth simuledia, + Fea this srmulation, “yb mulus” a the top-level module Arne sk is nek stated ang were Tt i colled sou He noct module —+ The daenti frou afinad din this module are a, wba, Ak & auc. TH Acct modulo snstantiotes m1 , uch ss wa module | SR Latch , —+ The module m4 instantiated nand gots nig nr. + 8, Boor 1S £ R wre pot atgnals tn inukanue m4. A Hreorducel nome mepouniiag ens ge amp He cach saber foes + To wurga Ainrarchiced nonut, wie the module now fer rset module end instunu nae fr all module unskuney Aelow Aho vecot module. 3t Nagona K , Asst. Pref) Ece, Svar Vertlog HDL IRECER > Hirauhical name fo ald caer fiers i He SRlodkeh Atmuledion shown 4 as fotlous. Thee & wm whet (+) f each evel of Aerorchy from the -reet module te the luvaed sddundifier. He Akimulus odirndut + v ALimulus . yeu stimulus, set shimulus . acset stimulus. mt 4dimulus. m1. Ahimulus. m4. bay sdimulus . m4. Alimully. m4. eR shermdus 02. NOTE: Each soli fer sn the selesgn #8 sna qpely Apeecfeed +4 the Juunduicol poth narra, To display tho Level of tuoarhy , use the specal stung fournat” Yorn’ sn Hee $dsiplay trae * L Noyona +K, Asst. Paroh , ECE, SVIT i)

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