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Digital System Design-Assignment-3

The document discusses a truth table and logic circuit that relates an input X and output Y-ABS(X-1). The truth table shows the relationship between X, Y, and Y-ABS(X-1) for values of X from 0 to 3. A Karnaugh map is used to minimize the equation for Y-ABS(X-1) and convert it into a logic circuit diagram with two AND gates, one OR gate, and one inverter.

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89 views

Digital System Design-Assignment-3

The document discusses a truth table and logic circuit that relates an input X and output Y-ABS(X-1). The truth table shows the relationship between X, Y, and Y-ABS(X-1) for values of X from 0 to 3. A Karnaugh map is used to minimize the equation for Y-ABS(X-1) and convert it into a logic circuit diagram with two AND gates, one OR gate, and one inverter.

Uploaded by

Rüstem Eleç
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Digital System Design

Assignment#3
Batuhan Kenan EREN – B1805.010034
Rüstem ELEÇ – B1805.010026
Assignment#3
Truth Table:
| X | Y | Y-ABS(X-1) |
|---|----|-------------|
|0|Y |Y |
| 1 | Y | Y-1 |
| 2 | Y | Y-2 |
| 3 | Y | Y-3 |

Minimization using Karnough Map:


ABS(X-1) = X2'X1' + X2X1
Y-ABS(X-1) = Y + X2'X1'X0' + X2X1X0'

The input X and the output Y-ABS are related in the truth table (X-1). The
equation is converted into a logic circuit using the Karnough map in order to
minimize it. The diagram depicts the logic circuit.
The 3 inputs of the circuit are X0, X1, and X2. The results are Y-ABS (X-1).
Two AND gates, one OR gate, and one inverter make up the circuit. The inputs
X2'X1' are used to calculate ABS(X-1) using the first AND gate. The inputs Y,
X2'X1'X0', and X2X1X0' are utilized to calculate Y-ABS(X-1) using the second
AND gate. The outputs of the two AND gates are combined using the OR gate.
Finally, the output of the OR gate is inverted using the inverter to provide the
desired outcome.
This circuit can be used to calculate the equation Y-ABS(X-1) for 3-bit unsigned
numbers. The number of gates used is minimized, ensuring the efficiency of the
circuit.

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