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Lecture2 Chapter6 - An Introduction To Counters

This document discusses asynchronous (ripple) and synchronous counters. It defines a counter as a special type of register that sequences through states upon input pulses. There are two main types of counters: ripple counters which do not use a common clock and synchronous counters which do use a common clock. It provides examples of 4-bit binary ripple and BCD ripple counters to illustrate their counting sequences and timing diagrams. Synchronous counters are also introduced as having a simpler design where all flip-flops are triggered simultaneously by a common clock. Various counter circuit examples are shown including 4-bit up/down binary, BCD, and binary counters with parallel load capabilities.
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0% found this document useful (0 votes)
83 views17 pages

Lecture2 Chapter6 - An Introduction To Counters

This document discusses asynchronous (ripple) and synchronous counters. It defines a counter as a special type of register that sequences through states upon input pulses. There are two main types of counters: ripple counters which do not use a common clock and synchronous counters which do use a common clock. It provides examples of 4-bit binary ripple and BCD ripple counters to illustrate their counting sequences and timing diagrams. Synchronous counters are also introduced as having a simpler design where all flip-flops are triggered simultaneously by a common clock. Various counter circuit examples are shown including 4-bit up/down binary, BCD, and binary counters with parallel load capabilities.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Chapter6: Registers and Counters

Lecture2- An Introduction to Counters


Engr. Arshad Nazir, Asst Prof
Dept of Electrical Engineering
Fall 2022 SEECS 1
Objectives
• Study Asynchronous (Ripple) and Synchronous
Counters

Fall 2022 2
Counter
• A special type of register that goes through a prescribed sequence of states
upon the application of input pulses
 Input pulses: May be clock pulses or originate from some external source
 The sequence of states may follow
– the binary number sequence ( Binary counter) or
– any other sequence of states
• There are two main categories if counters
 Ripple counters (Asynchronous Counters)
There is no common clock pulse (not synchronous) and t he flip-flop output
transition of one serves as a source for triggering other flip-flops
 Synchronous counters
The CLK inputs of all flip-flops receive a common clock

Fall 2022 3
Example: 4-bit Binary Ripple A3 A2 A1 A0
0 0 0 0
Counter 0 0 0 1
0 0 1 0
• A 4-bit Binary Ripple Up Counter follows the sequence 0 0 1 1
0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 0 1 0 0
1001, 1010, 1011, 1100, 1101, 1110, 1111, back to 0000, 0 1 0 1
and repeat. 0 1 1 0
0 1 1 1
• Count pulse is applied only to A0 generating the least 1 0 0 0
significant bit of counting sequence. The output state 1 0 0 1
transition of A0 will be connected with C input of A1 and 1 0 1 0
trigger it , and so on. 1 0 1 1
• The flip-flops used in the design of 4-bit Binary Ripple 1 1 0 0
Counters are self-complementing and toggle output state 1 1 0 1
on negative edge of each count pulse. 1 1 1 0
• The timing diagram of the counter for counting sequence 1 1 1 1
0000 through 1000 is shown in the next slide.
Fall 2022 4
Partial Timing of a 4-bit binary ripple counter
Clk

A0 0 1 0 1 0 1 0 1 0

A1 0 0 1 1 0 0 1 1 0

A2 0 0 0 0 1 1 1 1 0

A3 0 0 0 0 0 0 0 0 1

Fall 2022 5
 10

10

Fall 2022 6
Example: BCD Ripple • A BCD Ripple Counter
follows the sequence
Counter 0000, 0001, 0010, 0011,
0100, 0101, 0110, 0111,
1000, 1001, back to 0000
and repeats.
• It can also be constructed
using different types of
flip-flops such that count
pulse is applied to the
flip-flop generating the
least significant bit of
counting sequence and
output state transition of
one triggers others.

Fall 2022 7
Timing Diagram of BCD Ripple Counter
Clk

A0 0 1 0 1 0 1 0 1 0 1 0

A1 0 0 1 1 0 0 1 1 0 0 0

A2 0 0 0 0 1 1 1 1 0 0 0

A3 0 0 0 0 0 0 0 0 1 1 0

Fall 2022 8
The BCD Ripple Counter
Circuit (with JK FF)
Counting Sequence
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010 (0000)

Fall 2022 9
Cascading Counter Stages

Fall 2022 10
Synchronous Counters
• Synchronous counters are those in which common
clock triggers all flip-flops simultaneously.
• In the design of synchronous counters, apply the same
procedure of synchronous sequential circuits.
• Design of 4-bit Binary Up Synchronous Counter is
much simpler and can be implemented after due
scrutiny of counting sequence bits pattern.
• Flip-flops may be positive or negative-edge triggered.
A0 =1 will complement A1 , A0 A1 =1, A0 A1 A2 =1, and
A0 A1 A2 A =1 will reset all flip-flops to 0 synchronously.

Fall 2022 11
4-bit up/down binary counter

down
up
up A0
down A'0

down A'0 A'1 up A0 A1

down A'0 A'1 A'2


up A0 A1A2

Fall 2022 12
BCD Counters

Using map method, we get


TQ1=1 ; TQ2 =Q8′Q1; TQ4 =Q2Q1; TQ8 =Q8Q1+Q4Q2Q1
Y =Q8Q1
Fall 2022 13
4-bit Binary Counter with Parallel Load

Fall 2022 14
Load Count, load'

Fall 2022 15
BCD Counter Design Examples
• Generate any count sequence using this counter with parallel load i.e BCD
counting sequence after states decoding

– E.g.: BCD counter  Counter w/ parallel load

Fall 2022 16
The End

Fall 2022 17

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