Course Title: Computer Organization and Architecture

Course Code: ITec 2021

Module Name: Computer Systems

Module Code: ITec-M2021

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Course Learning Outcome

• At the end of this course, students will be able to:

Understand Boolean algebra, logic gates and their relationship

Describe basic components of computer hardware like decoder,

encoder, register, counter, multiplexer, etc

Describe basic instruction of computer and how it is executed

Describe Control Unit and ALU design

Describe mathematical algorithms used in computer

Understand the organization of components like RAM, I/O

devices, and controllers

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 CHAPTER ONE

DIGITAL LOGIC AND DIGITAL SYSTEMS

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LESSON OBJECTIVES:

After completing this lesson you will be able to:

• Identify the different graphic symbols of Logic circuits

• Draw circuits for different algebraic functions

• Simplify algebraic functions using Boolean algebra and K-map

• Design combinational circuit

• Describe the various types of Flip-flops

• Differentiate between Combinational and Sequential circuits

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1. INTRODUCTION

DEFINITION

• Computer Architecture: is a blueprint for design and

implementation of a computer system.

• It provides the functional details and behavior of a computer

system and comes before computer organization.

• Computer architecture deals with ‘What to do?’

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• Computer architecture includes many elements such as

instruction sets and formats, operation codes, data types, the

number and types of registers, addressing modes, main

memory access methods, and various I/O mechanisms.

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• Computer Organization: is how operational attributes are linked

together and contribute to realize the architectural specifications.

Computer organization deals with 'How to do?'

• Example: it is an architectural design issue whether a computer will

have a multiply instruction. It is an organizational issue whether

that instruction will be implemented by a special multiply unit or

by a mechanism that makes repeated use of the add unit of the

system.

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2. Logic Gates:

• Binary Information is represented in a digital computers by physical

quantities called signals.

• In the digital computer, electrical signals such as voltages exist

through out the computer in either one of two recognizable states

(say either +3 volt or 0.5 volt).

• The two states represent a binary variable that can be equal to 1 or 0.

• The manipulation of binary information is done by logic circuits

called gates.
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• Gates are blocks of hardware that produce signals of binary 1

or 0 when input requirements are satisfied.

• There are a variety of logic gates with distinct graphic

symbol and truth tables.

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 Continued…

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 Continued…

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• Exercise: Draw logic circuits for the following algebraic

expressions:

a. X+Y'Z

b. AB'+C'D

c. AB + A'B' + A'BC

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 3. Boolean Algebra
• Deals with binary variables (F, x, y, z … ) and logic operations (OR,

AND, NOT …)

• For the given value of variables, the Boolean function can be either 0 or 1.

• For Example, the Boolean function

F= X+Y'Z

• The function F is 1 if either X=1 or if both Y' and Z equal to 1, otherwise

F is equal to 0

• The relationship between F and x,

y & z can be put in table form

• This table is called the truth table

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Purpose of Boolean algebra:

1. Express in algebraic form a truth table relationship between

binary variables

2. Express in algebraic form the input-output relationship of logic

diagrams

3. Find simpler circuits for the same function

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Rules of Boolean algebra:

1a. 0 · 0 = 0 Single variable theorems:

1b. 1 + 1 = 1 5a. x · 0 = 0

2a. 1 · 1 = 1 5b. x + 1 = 1

2b. 0 + 0 = 0 6a. x · 1 = x

3a. 0 · 1 = 1 · 0 = 0 6b. x + 0 = x

3b. 1 + 0 = 0 + 1 = 1 7a. x · x = x

4a. If x=0, then x'=1 7b. x + x = x

4b. If x=1, then x'=0 8a. x · x' = 0

8b. x + x' = 1
9. x'' = x

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Two and three variable properties:

Commutative Absorption

10a. x · y = y · x 13a. x + x · y = x

10b. x + y = y + x 13b. x · (x + y) = x

Associative 14a. x · y + x · y' = x

11a. x · (y · z) = (x · y) · z 14b. (x + y) · (x + y') = x

11b. x + (y + z) = (x + y) + z DeMorgans Theorem

Distributive 15a. (x · y)' = x' + y'

12a. x · (y + z) = x · y + x · z 15b. (x + y)' = x' · y'

12b. x + y · z = (x + y) · (x + z) 16a. x + x' · y = x + y

16b. x · (x' + y) = xy

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Exercise:

1. Simplify (x + y) · (x + y')

2. Simplify (A + A’)(AB + ABC)

3. Simplify (A+B)(A+C)

4. Simplify the following boolean function and draw its logic circuit.

F= x’y’ + x’y + xy’

5. Simplify and draw its logic circuit for AB + (AB )’C + A=

6. Simplify A + B[AC + (B + C’)D]=

7. Simplify the following boolean function and draw its logic circuit.

F = yz + xyz’ + xyz + xy’z’ + xy’z

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4. Map Simplification

• In addition to using Boolean algebra to simplify a Boolean function, a

technique called map simplification can also be utilized.

• The map method is known as the Karnaugh map or K-map.

• A map is simply a table made up of squares with each square

representing one minterm.

The rows and columns correspond to the possible values of the function’s

inputs.

Each cell represents the outputs of the function for those possible inputs.

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• Each combination of the input variables in a table is called a

minterm.

• There are 2n minterms for a function of n variables.

For example, if there are two input values, x and y, there are four

minterms, x’y’ , x’y, xy’, and xy, which represent all of the possible

input combinations for the function.

• The minterm x’y’ represents the input pair (0,0). Similarly, the

minterm x’y represents (0,1), the minterm xy’ represents (1,0), and

xy represents (1,1).
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• To use this map to reduce a Boolean function, we simply need to

group ones.
The squares corresponding to minterms that produces 1 for a function

are marked by a 1 and others are marked by a 0 or are left empty.

• To group squares marked by 1’s in a map and drive the

simplified algebraic expression, squares must be adjacent to each

other.

• A square is considered adjacent to another square if it is next to,

above, or below it.

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• In addition, squares at the extreme ends of the same horizontal

row are also considered adjacent.

• The same applies to the top and bottom squares of a column.

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• Maps for two, three and four variable function

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Sum-of-Products Simplification

• It expresses that the output is 1 if any of the input

combinations that produce 1 is true.

• A Boolean function represented by a truth table is plotted

into the map by inserting 1's into those squares where the

function is 1.

• Boolean functions can then be simplified by identifying

adjacent squares in the Karnaugh map that contain a 1.

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• Rules for Grouping adjacent squares

No diagonals.

Only power of 2 number of cells in each group.

Groups should be as large as possible.

Every one must be in at least one group.

Overlapping allowed.

Fewest number of groups possible.

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• Example: Simplify the following function in truth table using

SOP.
X Y Z F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

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• The information contained in a truth table may be expressed

in compact form by listing the decimal equivalent of those

minterms that produce 1 for a function.

• For example, the previous truth table can be expressed as

follows:

F(X,Y,Z)=∑ (1,2,5,6)

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Exercise 1:Simplify a Boolean function using K-Map

1. F (ABC) =∑ (3, 4, 6, 7)

F=BC+AC’

2. F (A B C) = Σ (0, 2, 4, 5, 6)

F=C’+AB’

3. F (A B CD) = Σ (0, 1, 2, 4, 5,7,11,15)

F = ACD + A′C′ + A′B′D′ + BCD

3. F (A B CD) = Σ (0, 1, 2, 6, 8,9,10) = B’D’ + B’C’ + A’CD’

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Product-of-Sum Simplification

• It is sometimes convenient to obtain the algebraic expression for

the function in Product-of-Sum.

• The 1’s in the Map represent minterms that produce 1 for the

function.

• The squares not marked by 1 represent minterms that produce a 0

for the function.

• If we mark empty squares with a 0’s and combine them we can get

F’.

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• Taking the complement of F produces an expression in the

form of Product-of-sum.

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Don't Care Conditions
• On occasion, it doesn't matter whether a function produces a 0 or

1 for a given minterm.

• We don’t care what the function outputs is to be for this minterm.

• Minterms that may produce either 0 or 1 for a function are said to

be Don’t care Conditions.

• X is used in the map to represent the don't care condition.

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• Don’t care condition can be used to provide further

Simplification.

• When choosing adjacent squares for the function in the map, the

x’s may be assumed to be either 0 or 1, whichever gives the

simplest expression.

• An x need not to be used at all if it does not contribute to the

simplification of the function.

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• As example consider the following Boolean function together

with the don’t care minterms:

F(A,B,C) = Σ(0,2,6)

d(A,B,C) = Σ(1,3,5)

• The minterm listed with F produce a 1 for the function.

• The don’t care minterms listed with d may produce either a 0

or 1 for the function.

• The remaining minterms 4,7 produce a 0 for the function.

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Cont…

• The 1’s and x’s are combined in any convenient manner so as

to enclose the maximum number of adjacent squares.

• By including the don’t care minterms 1 and 3 with the 1 in

the first row we obtain A’.

• The remaining 1 for minterm 6 is combined with minterm 2

to obtain the term BC’.

F=A’ + BC’

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5. Combinational Circuits:
• A connected arrangement of logic gates (AND, OR, NOT,

NAND etc.) with a set of inputs and outputs.

• At any given time, the binary values of the outputs are a

function of the binary values of the inputs.

• The design of a combinational circuit starts from a verbal

outline of the problem and ends in a logic circuit diagram.

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• The procedure involves the following steps:
1.The problem is stated

2.The input and output variables are assigned letter symbols

3.The truth table that defines the relationship between inputs and

outputs is derived

4.The simplified Boolean functions for each output are obtained

5.The logic diagram is drawn

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• Examples of simple arithmetic circuits

Half-Adder

• The most basic digital arithmetic circuit

• Performs the addition of two binary digits

• The input variables of a half-adder are called the augends

and the addend bits

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• The output variables of a half-adder are called the sum and

the carry. S= X’Y + XY’ or S= X ⊕ Y, C=XY

Figure: A half-adder circuit

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Full-Adder :

• A full-adder performs the addition of three binary digits

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• Diagram of a full adder circuit.

S= X ⊕Y ⊕Z

• There are two possible expression for C.

C= XY +(X ⊕Y)Z

= XY + XZ + YZ

Q. Show that X’Y’Z+X’YZ’+XY’Z’+XYZ is X ⊕Y ⊕Z

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6. Flip Flop
• A Flip-flop is a binary cell capable of storing one bit of

information.

• It has two outputs, one for the normal value and one for the

complement value of a bit stored in it.

• Are storage elements utilized in synchronous sequential

circuits.

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• Values maintained in the storage elements can only change when the

clock pulses.

• The difference in the types of flip flops is in the number of inputs

and the manner in which the inputs affect the binary state.

• The most common types of flip flops are:

1.SR Flip-Flop

2.D Flip-Flop

3.JK Flip-Flop

4.T Flip-Flop

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1. S-R Flip Flop

• The next state of Flip-Flop is based on the inputs and the

current state, Q.

• The notation Q(t) represents the current state, and Q(t + 1)

indicates the next state.

• There are three inputs: S(for set), R(for reset), and the

current output Q(t).

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• For example, if S is 0 and R is 0, and the current state, Q(t),

is 0, then the next state, Q(t + 1), is also 0.

• If S is 0 and R is 0, and Q(t) is 1, then Q(t+1) is 1.

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NOR Gate SR FlipFlop (LATCH) Characteristic table

Drawback

• If both R and S set to 1 at the same time, forces both Q and Q’

the same, results in an unstable circuit.

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2. D Flip-Flop

• It has a single input D.

• If a 1 is asserted on the input line D, and the clock is pulsed,

the output line Q becomes a 1.

• If a 0 is asserted on the input line and the clock is pulsed, the

output becomes 0.

• The next state Q(t+1) is determined from the D input.

• The relationship can be expressed by: Q(t+1)=D

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 D flip-flop Characteristic table

• Has only one input

• Doesn’t have a no change condition

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3. JK Flip-Flop (Jack Kilby)

• Refinement of SR flip-flop.

• Defines the indeterminate condition of SR flip-flop.

• Inputs J and K behaves like S and R to set and clear the flip-

flop respectively.

• Both inputs J and K are equal to 1, a clock transition switches

the outputs of flip-flop to their complement state i.e.

Q(t+1)=Q’(t).

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 JK flip-flop Characteristic Table

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4. T Flip- Flop

• T flip-flop has two condition

• When T=0, a clock transition does not change the state of

the flip-flop

• When T=1, a clock transition complements the state of the

flip flop

• These condition can be expressed as:

Q(t+1)= Q(t) T

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T Flip- Flop

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Excitation Tables

• The characteristic table of flip-flops specify the next state

when the inputs and the present state are known.

• If we know the transition from present state to next state we

can find the input combination that cause the required

transition.

• Such a table is called flip-flop excitation table.

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Continued

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7. Sequential Circuits

• When a circuit contains just gates, it is called a

combinational circuit.

• However, if a circuit contains both gates and flip-flops, it is

called a sequential circuit.

• As shown in the diagram below the external inputs

constitute some of the inputs to the combinational circuit.

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• The internal outputs of the combinational circuit go to

external output and inputs to the flip-flops.

Figure: Block diagram of sequential circuit

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• The gates in combinational circuit determine the binary

values to be stored in the flip-flop.

• The output of flip-flop, in turn, are applied to combinational

circuit inputs and determine the circuits behavior.

• The next example consists of one input(x), one output(y),

and two clocked D flip-flops.

• The AND, OR and Inverter form the combinational logic

part of the circuit.

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Example of Sequential Circuit

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• We can drive input equations for flip-flops from combinational circuits

that provides inputs to flip-flops

• Output of OR gate is connected to D input of flip-flop A

We can write the first input equation as:

DA= AX+BX

The second input equation is:

DB= A’X

• The sequential circuit also has an external output, which is the function

of input variables and current state of the flip-flop

Y= AX’+ BX’

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• Note, the next state value of each flip-flop is equal to its D

input value in the present state.

State Table for Example Sequential circuit

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State Diagram

• Information's available in state table can be represented

graphically in state diagram.

• In this diagram a state is represented by a circle.

• The transition is represented by an Arrow connecting circles.

• The state diagram provides the same information as a state table.

• The binary numbers inside each circle identifies state of a flip-

flop.

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• The directed lines are labeled with two binary numbers separated

by slash.

The input value is labeled first

The number after the slash gives an output during the present state

• The directed line that connects a circle with itself indicate a no

change condition

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Continued

• Example

State diagram

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Continued

Steps to design a sequential circuit

Translate the circuit specification in to state diagram

Convert the state diagram in to state table

Drive equations from state table

Use K-Map to reduce the input functions

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Example

• Design a synchronous sequential circuit described by the

following state table using D flip-flop:

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• The flip-flop inputs can be directly from the next-state columns and

expressed in the sum of products form.

DA = ∑(2, 4, 5, 6)

DB = ∑ (1, 3, 5, 6)

• The output can also be expressed in the sum of products form

y = ∑ (1, 5)

• Use Karnaugh maps to reduce the flip-flop input functions and the output

function

DA = AB' + Bx'

DB = A'x + B'x + ABx'

y = B'x
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Continued

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