Tps 61200

Product Sample & Technical Tools & Support &
Folder Buy Documents Software Community
TPS61200, TPS61201, TPS61202

SLVS577E – MARCH 2007 – REVISED DECEMBER 2014
TPS6120x Low Input Voltage Synchronous Boost Converter

With 1.3-A Switches
1 Features 3 Description
1• More than 90% Efficiency at The TPS6120x devices provide a power supply
solution for products powered by either a single-cell,
– 300 mA Output Current at 3.3 V two-cell, or three-cell alkaline, NiCd or NiMH, or one-
(VIN ≥ 2.4 V) cell Li-Ion or Li-polymer battery. It is also used in fuel
– 600 mA Output Current at 5 V (VIN ≥ 3 V) cell or solar cell powered devices where the capability
• Automatic Transition between Boost Mode and of handling low input voltages is essential. Possible
Down Conversion Mode output currents depend on the input to output voltage
ratio. The devices provide output currents of up to
• Device Quiescent Current Less than 55 μA 600 mA at a 5-V output, while using a single-cell Li-
• Startup into Full Load at 0.5 V Input Voltage Ion or Li-Polymer battery and discharges it down to
• Operating Input Voltage Range from 2.6 V. The boost converter is based on a fixed
0.3 V to 5.5 V frequency, pulse-width-modulation (PWM) controller
using synchronous rectification to obtain maximum
• Programmable Undervoltage Lockout Threshold efficiency. At low load currents, the converter enters
• Output Short Circuit Protection Under all the Power Save mode to maintain a high efficiency
Operating Conditions over a wide load current range. The Power Save
• Fixed and Adjustable Output Voltage Options from mode can be disabled, forcing the converter to
1.8 V to 5.5 V operate at a fixed switching frequency. The average
input current is limited to a maximum value of 1500
• Power Save Mode for Improved Efficiency at Low mA. The output voltage is programmed by an
Output Power external resistor divider, or is fixed internally on the
• Forced Fixed Frequency Operation Possible chip. The converter can be disabled to minimize
• Load Disconnect During Shutdown battery drain. During shutdown, the load is completely
disconnected from the battery. The device is
• Overtemperature Protection packaged in a 10-pin VSON package measuring 3
• Small 3 mm x 3 mm VSON-10 Package mm x 3 mm.
2 Applications Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
• All Single-Cell, Two-Cell and Three-Cell Alkaline,
NiCd or NiMH or Single-Cell Li Battery Powered TPS6120x VSON (10) 3.00 mm × 3.00 mm
Products (1) For all available packages, see the orderable addendum at
the end of the datasheet.
• Fuel Cell And Solar Cell Powered Products
• Portable Audio Players
• PDAs
• Cellular Phones
• Personal Medical Products
• White LED Driver
4 Typical Application
L1
2.2 mH
VIN L
C1
VIN VOUT
0.3 V to 5.5 V 10 mF
EN C2
VAUX R1 VOUT
PS C3 1.8 V to 5.5 V
10 mF
UVLO 0.1 mF
FB
R2
GND PGND
TPS61200
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61200, TPS61201, TPS61202
SLVS577E – MARCH 2007 – REVISED DECEMBER 2014 www.ti.com
Table of Contents
1 Features .................................................................. 1 10.3 Feature Description............................................... 12
2 Applications ........................................................... 1 10.4 Device Functional Modes...................................... 13
3 Description ............................................................. 1 11 Application and Implementation........................ 14
4 Typical Application ................................................ 1 11.1 Application Information.......................................... 14
11.2 Typical Application ............................................... 14
5 Revision History..................................................... 2
11.3 System Examples ................................................. 19
6 Device Options....................................................... 4
12 Power Supply Recommendations ..................... 20
7 Pin Configuration and Functions ......................... 4
13 Layout................................................................... 21
8 Specifications......................................................... 5
13.1 Layout Guidelines ................................................. 21
8.1 Absolute Maximum Ratings ...................................... 5
13.2 Layout Example .................................................... 21
8.2 ESD Ratings.............................................................. 5
13.3 Thermal Considerations ........................................ 21
8.3 Recommended Operating Conditions....................... 5
8.4 Thermal Information .................................................. 5 14 Device and Documentation Support ................. 22
14.1 Related Links ........................................................ 22
8.5 Electrical Characteristics........................................... 6
14.2 Trademarks ........................................................... 22
8.6 Typical Characteristics .............................................. 7
14.3 Electrostatic Discharge Caution ............................ 22
9 Parameter Measurement Information ................ 10
14.4 Glossary ................................................................ 22
10 Detailed Description ........................................... 11
15 Mechanical, Packaging, and Orderable
10.1 Overview ............................................................... 11
Information ........................................................... 22
10.2 Functional Block Diagram ..................................... 11
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (March 2013) to Revision E Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Revision C (September 2012) to Revision D Page
• Changed the PS pin description From: Enable/disable Power Save mode (High = enabled, Low = disabled) To:
Enable/disable Power Save mode (High = disabled, Low = enabled) ................................................................................... 4
Changes from Revision B (FEBRUARY 2008) to Revision C Page
• Changed Feature From: Small 3 mm x 3 mm QFN-10 Package To: Small 3 mm x 3 mm SON-10 Package ...................... 1
• Changed Application From: White LED's To: White LED Driver ............................................................................................ 1
• Changed the Available Device Options Package type From: 10-PIN QFN To: 10-Pin SON ................................................. 4
• Changed VSS to VIN in the Recommended Operating Conditions table ................................................................................. 5
• Changed From: DISSIPATION RATINGS TABLE To: Thermal Information table ................................................................ 5
• Changed the Parameters and Test Conditions in the Electrical Characteristics table .......................................................... 6
• Updated Figure 1 through Figure 11 ...................................................................................................................................... 7
• Added C3 to the List of Components ................................................................................................................................... 14
• Added text to the Input Capacitor section "An R-C filter may be placed..." ......................................................................... 16
• Added Figure 26, Figure 27, and Figure 28 ......................................................................................................................... 19
• Added Figure 29 ................................................................................................................................................................... 21
2 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated
Product Folder Links: TPS61200 TPS61201 TPS61202

TPS61200, TPS61201, TPS61202
www.ti.com SLVS577E – MARCH 2007 – REVISED DECEMBER 2014
Changes from Revision A (JUNE 2007) to Revision B Page
• Added DSC package and tape and reel note to the Available Device Options. .................................................................... 4
Changes from Original (MARCH 2007) to Revision A Page
• Changed Features bullet From: 600 mA Output Current at 3.3 V (VIN ≥ 1.2 V) To: 300 mA Output Current at 3.3 V
(VIN ≥ 2.4 V)........................................................................................................................................................................... 1
• Changed Figure 6 label From: Power Save Disabled To: Power Save Enabled .................................................................. 7
• Changed Figure 7 label From: Power Save Enabled To: Power Save Disabled .................................................................. 8
Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 3

TPS61200, TPS61201, TPS61202
6 Device Options
TA OUTPUT VOLTAGE (1) PART NUMBER (2)

Adjustable TPS61200DRC
3.3 V TPS61201DRC
–40°C to 85°C
5V TPS61202DRC
5V TPS61202DSC
(1) Contact the factory to check availability of other fixed output voltage versions.
(2) The DRC and the DSC package are available taped and reeled. Add R suffix to device type (e.g., TPS61200DRCR or TPS61202DSCR)
to order quantities of 3000 devices per reel. It is also available in minireels. Add a T suffix to the device type (i.e. TPS61200DRCT or
TPS61202DSCT) to order quantities of 250 devices per reel.
7 Pin Configuration and Functions
DSC and DRC Package

10 Pins
Top View
VAUX 1 10 FB
VOUT 2 Exposed 9 GND
Thermal
L 3
Pad
8 PS
PGND 4 7 UVLO
VIN 5 6 EN
Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
EN 6 I Enable input (High = enabled, Low = disabled). Do not leave floating.
Exposed — — Must be soldered to achieve appropriate power dissipation and mechanical reliability. Should be
thermal pad connected to PGND.
FB 10 I Voltage feedback of adjustable versions, must be connected to VOUT at fixed output voltage versions
GND 9 — Control / logic ground
PGND 4 — Power ground
PS 8 I Enable/disable Power Save mode (High = disabled, Low = enabled). Do not leave floating.
L 3 I Connection for Inductor
UVLO 7 I Undervoltage lockout comparator input. Must be connected to VAUX if not used
VAUX 1 I/O Supply voltage for control stage
VIN 5 I Boost converter input voltage
VOUT 2 O Boost converter output

TPS61200, TPS61201, TPS61202
8 Specifications
8.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VIN Input voltage range on VIN, L, VAUX, VOUT, PS, EN, FB, UVLO –0.3 7 V
TJ Operating junction temperature –40 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
8.2 ESD Ratings

VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±4000
Charged-device model (CDM), per JEDEC specification JESD22- ±1500
V(ESD) Electrostatic discharge V
C101 (2)
Machine Model (MM) (3) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
(3) ESD testing is performed according to the respective JESD22 JEDEC standard.
8.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN Input voltage at VIN 0.3 5.5 V
TA Operating free air temperature range –40 85 °C
TJ Operating junction temperature range –40 125 °C
8.4 Thermal Information

TPS6120x
THERMAL METRIC (1) DRC DSC UNIT
10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 41.2 40.4
RθJC(top) Junction-to-case (top) thermal resistance 62.8 37.8
RθJB Junction-to-board thermal resistance 16.6 15.4
°C/W
ψJT Junction-to-top characterization parameter 1.2 0.3
ψJB Junction-to-board characterization parameter 16.8 15.6
RθJC(bot) Junction-to-case (bottom) thermal resistance 4.1 2.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

TPS61200, TPS61201, TPS61202
8.5 Electrical Characteristics

over recommended junction temperature range and over recommended input voltage range (typical at an ambient
temperature range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC-DC STAGE
VIN Input voltage range 0.3 5.5 V
VIN Minimum input voltage at startup 0.5 V
VOUT TPS61200 output voltage range 1.8 5.5 V
VFB TPS61200 feedback voltage 495 500 505 mV
VOUT TPS61201 output voltage VIN < VOUT, PS = High 3.27 3.3 3.33 V
VOUT TPS61202 output voltage VIN < VOUT, PS = High 4.95 5.0 5.05 V
f Oscillator frequency 1250 1650 kHz
ILIM average inductor current limit VOUT = 3.3 V 1200 1350 1500 mA
RDS(on) Rectifying switch on resistance VOUT = 3.3 V 180 mΩ
RDS(on) Main switch on resistance VOUT = 3.3 V 150 mΩ
Line regulation VIN < VOUT, PS = High 0.1% 0.5%
Load regulation VIN < VOUT, PS = High 0.1% 0.5%
VIN 1 2 μA
IO = 0 mA, VEN = VIN = 1.2 V,
IQ Quiescent current VOUT VOUT = 3.3 V, VAUX = 3.3 V 50 70 μA
PS = Low
VAUX 4 6 μA
VIN 0.5 1.5 μA
ISD Shutdown current VEN = 0 V, VIN = 1.2 V
VAUX 1 2 μA
ILKG Input leakage current ( L) VEN = 0 V, VIN = 1.2 V, VL = 1.2 V 0.01 1 μA
CONTROL STAGE
VAUX Auxiliary Output Voltage 2.4 5.5 V
VIL Low level input threshold voltage (EN) VIN < 0.8 V 0.1 × VIN V
VIH High level input threshold voltage (EN) VIN < 0.8 V 0.9 × VIN V
VIL Low level input threshold voltage (EN) 0.8 V ≤ VIN ≤ 1.5 V 0.2 × VIN V
VIH High level input threshold voltage (EN) 0.8 V ≤ VIN ≤ 1.5 V 0.8 × VIN V
VIL Low level input threshold voltage (EN) VIN > 1.5 V 0.4 V
VIH High level input threshold voltage (EN) VIN > 1.5 V 1.2 V
VIL Low level input threshold voltage (PS) 0.4 V
VIH High level input threshold voltage (PS) 1.2 V
ILKG Input leakage current (EN, PS) EN, PS = GND or VIN 0.01 0.1 μA
VUVLO Undervoltage lockout threshold Falling UVLO voltage 235 250 265 mV
VUVLO Undervoltage lockout threshold Rising UVLO voltage 330 350 370 mV
ILKG Input leakage current (UVLO) VUVLO = 0.5 V 0.3 μA
VOVP Overvoltage protection threshold 5.5 7 V
Thermal shutdown temperature Rising temperature 140 °C
Thermal shutdown temperature
20 °C
hysteresis

TPS61200, TPS61201, TPS61202
8.6 Typical Characteristics

Table 1. Table of Graphs
FIGURE
Maximum output current vs Input voltage Figure 1
vs Output current (TPS61200), Power Save Enabled Figure 2
vs Output current (TPS61200), Power Save Disabled Figure 3
Efficiency
vs Input voltage (TPS61201), Power Save Enabled Figure 8
vs Input voltage (TPS61201), Power Save Disabled Figure 9
vs Input voltage (TPS61202), Power Save Enabled Figure 10
vs Input voltage (TPS61202), Power Save Disabled Figure 11
vs Output current (TPS61201) Figure 12
Output voltage
vs Output current (TPS61202) Figure 13
1600 100
TPS61201 TPS61200
VO = 3.3 V 90 VO = 1.8 V,
1400
Power Save Enabled
80
Maximum Output Current - mA
1200 TPS61200 VI = 1.8 V

VO = 1.8 V 70
1000
Efficiency - %
60
800 50
TPS61202 40 VI = 0.9 V
600
VO = 5 V
30
400
20
200
10
0 0
0.2 0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 0.10 1 10 100 1000
VI - Input Voltage - V IO - Output Current - mA
Figure 1. Maximum Output Current vs Input Voltage Figure 2. Efficiency vs Output Current
100 100
TPS61200 TPS61201
VO = 1.8 V, VI = 1.8 V VO = 3.3 V, VI = 2.4 V
90 90
Power Save Disabled Power Save Enabled
80 80
70 70
VI = 1.8 V
Efficiency - %
Efficiency - %
60 60
50 50
VI = 0.9 V
VI = 0.9 V
40 40
30 30
20 20
10 10
0 0
0.10 1 10 100 1000 0.10 1 10 100 1000
IO - Output Current - mA IO - Output Current - mA
Figure 3. Efficiency vs Output Current Figure 4. Efficiency vs Output Current

TPS61200, TPS61201, TPS61202
100 100
TPS61201 VI = 3.6 V
90 VO = 3.3 V, 90
VI = 2.4 V
Power Save Disabled
80 80
70 VI = 2.4 V 70
VI = 1.8 V
Efficiency - %
Efficiency - %
60 VI = 1.8 V 60
50 50
VI = 0.9 V VI = 0.9 V
40 40
30 30
20 20 TPS61202
VO = 5 V,
10 10 Power Save Enabled
0 0
0.10 1 10 100 1000 0.10 1 10 100 1000
IO - Output Current - mA IO - Output Current - mA
Figure 5. Efficiency vs Output Current Figure 6. Efficiency vs Output Current
100 100
TPS61202 VI = 3.6 V IO = 500 mA IO = 1000 mA
90 VO = 5 V, 90
Power Save Disabled IO = 100 mA
80 80
VI = 2.4 V
70 70
VI = 1.8 V
Efficiency - %
Efficiency - %
60 60
VI = 0.9 V
50 50
IO = 10 mA
40 40
30 30
20 20 TPS61201
VO = 3.3 V,
10 10 Power Save Enabled
0 0
0.10 1 10 100 1k 10k 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
IO - Output Current - mA VI - Input Voltage - V
Figure 7. Efficiency vs Output Current Figure 8. Efficiency vs Input Voltage

100 100
IO = 500 mA IO = 1000 mA IO = 500 mA
90 90
IO = 100 mA
80 80
IO = 1000 mA
70 70
Efficiency - %
Efficiency - %
60 60
50 IO = 10 mA 50
IO = 10 mA
40 IO = 100 mA 40
30 30
20 TPS61201 20 TPS61202
VO = 3.3 V, VO = 5 V,
10 Power Save Disabled 10 Power Save Enabled
0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VI - Input Voltage - V VI - Input Voltage - V
Figure 9. Efficiency vs Input Voltage Figure 10. Efficiency vs Input Voltage

TPS61200, TPS61201, TPS61202
100 3.33
90 VI = 2.4 V
80 IO = 500 mA
70 IO = 100 mA IO = 1000 mA
VO - Output Voltage - V
Efficiency - %
60
50
3.30
IO = 10 mA
40
30
TPS61202
20 VO = 5 V,
TPS61201
Power Save Disabled
10 VO = 3.3 V,
Power Save Disabled
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 3.27
VI - Input Voltage - V 1 10 100 1000
IO - Output Current - mA
Figure 11. Efficiency vs Input Voltage Figure 12. Output Voltage vs Output Current
5.05
TPS61202
VO = 5 V,
Power Save Disabled
VI = 2.4 V
VO - Output Voltage - V
4.95
1 10 100 1000
IO - Output Current - mA
Figure 13. Output Voltage vs Output Current

TPS61200, TPS61201, TPS61202
9 Parameter Measurement Information

L1
VIN
VIN L
C1 VOUT
VOUT
EN
VAUX R1 C2
PS C3
UVLO
FB
R2
GND PGND
TPS61200
Figure 14. Parameter Measurement Schematic

TPS61200, TPS61201, TPS61202
10 Detailed Description
10.1 Overview
The TPS6120x is a low input voltage synchronous boost converter family. The devices support 0.3-V to 5.5-V
input voltage range, so can provide power supply solutions for products powered by either a single-cell, two-cell,
or three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-polymer battery. It is also used in fuel cell or solar cell
powered devices where the capability of handling low input voltages is essential. The devices provide output
currents of up to 600 mA at a 5-V output, while using a single-cell Li-Ion or Li-Polymer battery and discharges it
down to 2.6 V. The boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller
using synchronous rectification to obtain maximum efficiency. At low load currents, the converter enters the
Power Save mode to maintain a high efficiency over a wide load current range. The Power Save mode can be
disabled, forcing the converter to operate at a fixed switching frequency. The average input current is limited to a
maximum value of 1500 mA. The output voltage is programmed by an external resistor divider, or is fixed
internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is
completely disconnected from the battery.
10.2 Functional Block Diagram
VOUT
VCC
VAUX Control VOUT
Current
Sensor
PGND
VIN Gate
VCC Control
Modulator FB
VFB
PS
Oscillator
EN Device
Control
UVLO
Thermal PGND
Shutdown
GND PGND

TPS61200, TPS61201, TPS61202
10.3 Feature Description

10.3.1 Controller Circuit
The controlling circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses
input and output voltage feedforward. Changes of input and output voltage are monitored and immediately
change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. For adjustable output voltage devices, a resistive voltage divider must be
connected to that pin. For fixed output voltage devices, FB must be connected to the output voltage to directly
sense the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage is
compared with the internal reference voltage to generate a stable and accurate output voltage.
The controller circuit also senses the average input current as well as the peak input current. Thus, the maximum
input power is controlled as well as the maximum peak current, to achieve a safe and stable operation under all
possible conditions. To protect the device from overheating, an internal temperature sensor is implemented.
10.3.1.1 Synchronous Operation

The device uses three internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins, GND and
PGND, are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally close to the GND pin. Due to the
3-switch topology, the load is always disconnected from the input during shutdown of the converter.
10.3.1.2 Down Regulation

A boost converter only regulates output voltages which are higher than the input voltage. This device operates
differently. For example, it is able to regulate 3 V at the output with two fresh alkaline cells at the input having a
total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from a fully
charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a Down Conversion
mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter automatically changes to a Down
Conversion mode. In this mode, the control circuit changes the behavior of the two rectifying switches. While
continuing switching, it sets the voltage drop across the rectifying switches as high as needed to regulate the
output voltage. This means the power losses in the converter increase. This must be taken into account for
thermal consideration.
10.3.1.3 Device Enable

The device is put into operation when EN is set high. It is put into Shutdown mode when EN is set to low. In
Shutdown mode, the regulator stops switching, all internal control circuitry including the UVLO comparator is
switched off, and the load is disconnected from the input. Current does not flow from input to output or from
output to input. This also means that the output voltage can drop below the input voltage during shutdown.
10.3.1.4 Softstart and Short-Circuit Protection

During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak
currents drawn from the battery. After being enabled, the device starts operating. At first, it keeps the main output
VOUT disconnected, and charges the capacitor at VAUX. Once the capacitor at VAUX is charged to about 2.5 V,
the device switches to normal operation. This means VOUT is turned on and the capacitor at VOUT is charged,
while the load connected to the device is supplied. To ramp up the output voltage in a controlled way, the
average current limit is set to 400 mA and rises proportional to the increase of the output voltage. At an output
voltage of about 1.2 V the current limit is at its nominal value. If the output voltage does not increase, the current
limit does not increase. There is no timer implemented. Thus the output voltage overshoot at startup, as well as
the inrush current, is kept at a minimum. The device ramps up the output voltage in a controlled manner even if a
large capacitor is connected at the output. When the output voltage does not increase above 1.2 V, the device
assumes a short-circuit at the output, and keeps the current limit low to protect itself and the application. When
there is a short at the output during operation, the current limit is decreased accordingly.

TPS61200, TPS61201, TPS61202
Feature Description (continued)

The device can also start into a Prebias on the outputs.
10.3.1.5 Current Limit

The device current limit limits the average current in the inductor. In a boost connector, this is the input current. If
an excessive load requires an input current greater than the average current limit, the device limits the input
current by reducing the output power delivered. In this case, the output voltage decreases.
10.3.1.6 Undervoltage Lockout

An undervoltage lockout function prevents the main output at VOUT from being supplied if the voltage at the
UVLO pin drops below 0.25 V. When using a resistive divider at the voltage to be monitored, for example the
supply voltage, any threshold for the monitored voltage can be programmed. If in undervoltage lockout mode, the
device still maintains its supply voltage at VAUX, and it is not turned off until EN is programmed low. This
undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter.
10.3.1.7 Thermal Shutdown

The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature
exceeds the programmed threshold (see electrical characteristics table), the device stops operating. As soon as
the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in
hysteresis to avoid unstable operation at IC temperatures at the thermal shutdown threshold.
10.4 Device Functional Modes

10.4.1 Power Save Mode
The Power Save (PS) pin can be used to select different operation modes. To enable Power Save mode the PS
pin must be set low. Power Save mode is used to improve efficiency at light load. If Power Save mode is
enabled, the converter stops operating if the average inductor current decreases below about 300 mA and the
output voltage is at or above its nominal value. If the output voltage decreases below its nominal value, the
device ramps up the output voltage again by starting operation using a programmed average inductor current
higher than required by the current load condition. Operation can last for one or several pulses. The converter
stops operating once the conditions for stopping operation are met again.
The Power Save mode can be disabled by programming a high at the PS pin. In Down Conversion mode, Power
Save mode is always enabled and the device cannot be forced into fixed frequency operation at light loads. The
PS input supports standard logic thresholds.
10.4.2 Down Conversion Mode

If the input voltage reaches or exceeds the output voltage, the converter automatically changes to a Down
Conversion mode. In this mode, the control circuit changes the behavior of the two rectifying switches. While
continuing switching, it sets the voltage drop across the rectifying switches as high as needed to regulate the
output voltage. This means the power losses in the converter increase. This must be taken into account for
thermal consideration.

TPS61200, TPS61201, TPS61202
11 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
11.1 Application Information

The TPS6120x DC-DC converters are intended for systems powered by a single up to triple cell Alkaline, NiCd,
NiMH battery with a typical terminal voltage between 0.7 V and 5.5 V. They can also be used in systems
powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other
voltage source like solar cells or fuel cells with a typical output voltage between 0.3 V and 5.5 V can power
systems where the TPS6120x is used.
11.2 Typical Application

L1
VIN
VIN L
C1 VOUT
VOUT
R3 EN
VAUX R1 C2
PS C3
UVLO
FB
R4
R2
GND PGND
TPS61200
Figure 15. Typical Application Circuit for Adjustable Output Voltage Option
11.2.1 Design Requirements

In this example, TPS61200 is used to design a 3.3-V power supply with 100-mA output current capability. The
TPS61200 can be powered by either a single-cell, two-cell, or three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion
or Li-Polymer battery. In this example, the input voltage range is from 0.8 V to 1.65 V for single-cell alkaline
input.
11.2.2 Detailed Design Procedure
Table 2. List of Components

COMPONENT REFERENCE PART NUMBER MANUFACTURER VALUE
C1 any 10 μF, X7R Ceramic
C2 any 2 x 10 μF, X7R Ceramic
C3 any 1 µF, X7R, Ceramic
L1 LPS3015-222ML Coilcraft 2.2 μH
11.2.2.1 Programming the Output Voltage
Within the TPS6120X family, there are fixed and adjustable output voltage versions available. To properly
configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it
must be connected directly to VOUT. For the adjustable output voltage version, an external resistor divider is
used to adjust the output voltage. The resistor divider must be connected between VOUT, FB and GND. When
the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum
recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about 100
times greater than the current into the FB pin. The typical current into the FB pin is 0.01 μA, and the voltage

TPS61200, TPS61201, TPS61202
across the resistor between FB and GND, R2, is typically 500 mV. Based on those two values, the
recommended value for R2 should be lower than 500 kΩ, in order to set the divider current at 1 μA or higher. It is
recommended to keep the value for this resistor in the range of 200 kΩ. The value of the resistor connected
between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using
Equation 1:
æV ö
R1 = R2 x ç OUT - 1÷
è VFB ø (1)
As an example, for an output voltage of 3.3 V, a 1-MΩ resistor should be chosen for R1 when a 180-kΩ is
selected for R2.
11.2.2.2 Programming the UVLO Threshold Voltage

The UVLO input can be used to shut down the main output if the supply voltage is getting too low. The internal
reference threshold is typically 250 mV. If the supply voltage should cause the shutdown when it is dropping
below 250 mV, VIN can be connected directly to the UVLO pin. If the shutdown should happen at higher voltages,
a resistor divider can be used. R3 and R4 in Figure 15 show an example of how to monitor the input voltage of
the circuit. The current through the resistive divider should be about 100 times greater than the current into the
UVLO pin. The typical current into the UVLO pin is 0.01 μA, and the voltage across R4 is equal to the UVLO
voltage threshold that is generated on-chip, which has a value of 250 mV. Therefore, the recommended value for
R4 is in the range of 250 kΩ. From this, the value of resistor R3, depending on the desired shutdown voltage
VINMIN, can be calculated using Equation 2.
æV ö
R3 = R4 x çç INMIN - 1÷÷
è VUVLO ø (2)
11.2.2.3 Inductor Selection

To make sure that the TPS6120X devices can operate, an inductor must be connected between the VIN and L
pins. To estimate the minimum inductance value, Equation 3 can be used.
ms
LMIN = VIN x 0.5
A (3)
In Equation 3, the minimum inductance, LMIN , for boost mode operation is calculated. VIN is the maximum input
voltage. The recommended inductor value range is between 1.5 μH and 4.7 μH. The minimum inductor value
should not be below 1.5 μH, even if Equation 3 yields something lower. Using 2.2 μH is recommended anyway
for getting best performance over the whole input and output voltage range.
With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated
using Equation 4.
VOUT x IOUT VIN x (VOUT - VIN )
ILMAX = +
0.8 x VIN 2 x VOUT x f x L (4)
This would be the critical value for the current rating for selecting the inductor. It also needs to be taken into
account that load transients and error conditions may cause higher inductor currents. The following inductor
series from different suppliers have been used with TPS6120x converters:
Table 3. List of Inductors

VENDOR INDUCTOR SERIES
LPS3015
Coilcraft
LPS4012
Murata LQH3NP
Tajo Yuden NR3015
Wurth Elektronik WE-TPC Typ S

TPS61200, TPS61201, TPS61202
11.2.2.4 Capacitor Selection
11.2.2.4.1 Input Capacitor

At least a 4.7-μF input capacitor is recommended to improve transient behavior of the regulator and EMI
behavior of the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the
VIN and PGND pins of the IC is recommended.
An R-C filter may be placed on the VIN pin to improve performance in applications with a noisy input source. A
100-Ω resistor and 0.1-µF capacitor are recommended in this case. This filter is not required operation.
11.2.2.4.2 Output Capacitor

For the output capacitor, it is recommended to use small X5R or X7R ceramic capacitors placed as close as
possible to the VOUT and PGND pins of the IC. If, for any reason, the application requires the use of large
capacitors which can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one
is required. This small capacitor should be placed as close as possible to the VOUT and PGND pins of the IC.
To get an estimate of the recommended minimum output capacitance, Equation 5 can be used.
mF
COUT = 5 x L x
mH (5)
A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain
control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit
for the output capacitance value. Larger capacitors cause lower output voltage ripple as well as lower output
voltage drops during load transients.
11.2.2.4.3 Capacitor at VAUX

Between the VAUX pin and GND pin, a capacitor must be connected. This capacitor is used to maintain and filter
the control supply voltage, which is chosen from the highest of VIN, VOUT, and L. It is charged during startup
and before the main output VOUT is turned on. To ensure stable operation, using at least 0.1μF is
recommended. At output voltages below 2.5 V, the capacitance should be in the range of 1 μF. Since this
capacitor is also used as a snubber capacitor for the main switch, using a X5R or X7R ceramic capacitor with
low ESR is important.
11.2.3 Application Curves
FIGURE
Output Voltage TPS61201, Power Save Mode Disabled Figure 16
Output Voltage TPS61202, Power Save Mode Disabled Figure 17
Output Voltage TPS61201, Power Save Mode Enabled Figure 18
Output Voltage TPS61202, Power Save Mode Enabled Figure 19
TPS61201 Load Transient Response Figure 20
TPS61202 Load Transient Response Figure 21
TPS61201 Line Transient Response Figure 22
TPS61202 Line Transient Response Figure 23
TPS61201 Startup after Enable Figure 24
TPS61202 Startup after Enable Figure 25

TPS61200, TPS61201, TPS61202
TPS61201 TPS61202 VI = 1.8 V, RL = 17W

VI = 1.8 V, RL = 11W
VO = 3.3 V, VO = 5 V,
Output Voltage
Power Save Disabled
50 mV/div, AC
Output Voltage Power Save Disabled
20 mV/div, AC
Inductor Current
Inductor Current
200 mA/div, AC
100 mA/div, AC
t - Time - 0.5 ms/div t - Time - 1 ms/div
Figure 16. Output Voltage, Power Save Mode Disabled Figure 17. Output Voltage, Power Save Mode Disabled
VI = 1.8 V, RL = 33 kW TPS61202 VI = 1.8 V, RL = 55 kW

VO = 5 V,
Output Voltage
Output Voltage
20 mV/div, AC
Power Save Enabled
20 mV/div, AC
Inductor Current
Inductor Current
100 mA/div
200 mA/div
TPS61201
VO = 3.3 V,
Power Save Enabled
t - Time - 2 ms/div t - Time - 100 ms/div
Figure 18. Output Voltage in Power Save Mode Figure 19. Output Voltage in Power Save Mode
TPS61201 VI = 1.8 V, IL = 300 mA to 400 mA VI = 1.8 V, IL = 150 mA to 250 mA

TPS61202
VO = 3.3 V VO = 5 V
100 mV/div, AC
Output Voltage
Output Voltage
50 mV/div, AC
Output Current
100 mA/div, AC
Output Current
50 mA/div, AC
Figure 20. Load Transient Response Figure 21. Load Transient Response

TPS61200, TPS61201, TPS61202
VI = 1.8 V to 2.4 V, RL = 11W VI = 3 V to 3.6 V, RL = 17W
500 mV/div, AC
500 mV/div, AC
Input Voltage
Input Voltage
Output Voltage
Output Voltage
20 mV/div, AC
50 mV/div, AC
TPS61202
TPS61201
VO = 5 V
VO = 3.3 V
Figure 22. Line Transient Response Figure 23. Line Transient Response
Enable 5 V/div, DC Enable 5 V/div, DC

Voltage at VAUX 2 V/div, DC
Voltage at VAUX 2 V/div, DC
Output Voltage 2 V/div, DC
Output Voltage 2 V/div, DC
Voltage at L 2 V/div, DC Voltage at L 2 V/div, DC
Inductor Current 500 mA/div, DC Inductor Current 500 mA/div, DC
TPS61201 TPS61201 VI = 1.8 V, RL = 17W

VI = 1.8 V, RL = 11W
VO = 3.3 V VO = 3.3 V
Figure 24. Start-Up After Enable Figure 25. Start-Up After Enable

TPS61200, TPS61201, TPS61202
11.3 System Examples
Figure 26. WLED Driver Circuit (See SLVA364)
L1 4.7µH
Vcell = 0.3 - 0.5V

VIN L
VOUT
TPS61200
VOUT
R1
C1
EN Charge
VCELL CFF
storage
Solar Cell
VAUX UVLO FB
R2 C2 device
PS VAUX VAUX
GND PGND C3
RefDes Value
C1 >10 mF R5
C2 >20 mF VAUX
C3 1 mF
C4
C4 1 mF
C5 10 nF R3
CFF 33 pF
R8
L1 4.7 mH R6
R4 VCELL OPA379
RefDes Value
R1 750 kW
TLV431
R2 200 kW
R3 1 kW
R4 1 MW R7 Power ground
R5 100 W
R6
R7
1 MW
100 kW
MPP circuit C5 Reference ground
R8 200 kW
Figure 27. Solar Cell Circuit (See SLVA345)

TPS61200, TPS61201, TPS61202
System Examples (continued)
L1
Inductor
2.2uH
3.3V
Vout
0.9V to 1.5V R1
Vin
100 TPS61200
Vaux FB C3 C4
1 10 10uF R4
Vout GND 47uF
2 9
L PS 1K
3 8
PGND UVLO
Battery C1 R2 4 7
VIN EN
10uF 5 6
0 C2
100nF TPS61200
R5
1K
R3
1K
Q1
MOSFET-N
GND
Figure 28. Reverse Battery Protection Circuit (See SLVA315)
12 Power Supply Recommendations

The power supply of TPS6120x DC-DC converters can be a single up to triple cell Alkaline, NiCd, NiMH battery
with a typical terminal voltage between 0.7 V and 5.5 V. The TPS6120x can also be powered by one-cell Li-Ion
or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other voltage source like solar
cells or fuel cells with a typical output voltage between 0.3 V and 5.5 V can also be the power supply.
The input supply should be well regulated with the rating of TPS6120x. If the input supply is located more than a
few inches from the device, additional bulk capacitance may be required in addition to the ceramic bypass
capacitors. An electrolytic or tantalum capacitor with a value of 47 µF is a typical choice.

TPS61200, TPS61201, TPS61202
13 Layout
13.1 Layout Guidelines

As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current. See Figure 29 for the recommended layout.
13.2 Layout Example
Figure 29. EVM Layout
13.3 Thermal Considerations

Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-
dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB
• Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6120x devices is 125°C. The thermal
resistance of the 10-pin SON 3 × 3 package (DRC) is RθJA = 41.2 °C/W, when the exposed thermal pad is
soldered. Specified regulator operation is assured to a maximum ambient temperature, TA, of 85°C. Therefore,
the maximum power dissipation is about 971 mW. More power can be dissipated if the maximum ambient
temperature of the application is lower.
TJ(MAX) - TA 125°C - 85°C
PD(MAX) = = = 971mW
RqJA 41.2°C / W (6)

TPS61200, TPS61201, TPS61202
14 Device and Documentation Support
14.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
TPS61200 Click here Click here Click here Click here Click here
14.2 Trademarks
All trademarks are the property of their respective owners.
14.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
14.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 14-Oct-2022
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TPS61200DRCR ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRR Samples
TPS61200DRCRG4 ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRR Samples
TPS61200DRCT ACTIVE VSON DRC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRR Samples
TPS61201DRCR ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRS Samples
TPS61201DRCT ACTIVE VSON DRC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRS Samples
TPS61202DRCR ACTIVE VSON DRC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRT Samples
TPS61202DRCT ACTIVE VSON DRC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 BRT Samples
TPS61202DSCR ACTIVE WSON DSC 10 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CER Samples
TPS61202DSCT ACTIVE WSON DSC 10 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CER Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 14-Oct-2022
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS61200DRCR VSON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS61200DRCT VSON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS61202DSCR WSON DSC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS61202DSCT WSON DSC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS61200DRCR VSON DRC 10 3000 356.0 356.0 35.0
TPS61200DRCR VSON DRC 10 3000 367.0 367.0 35.0
TPS61200DRCT VSON DRC 10 250 210.0 185.0 35.0
TPS61200DRCT VSON DRC 10 250 210.0 185.0 35.0
TPS61201DRCR VSON DRC 10 3000 367.0 367.0 35.0
TPS61201DRCR VSON DRC 10 3000 356.0 356.0 35.0
TPS61201DRCT VSON DRC 10 250 210.0 185.0 35.0
TPS61202DRCR VSON DRC 10 3000 367.0 367.0 35.0
TPS61202DRCR VSON DRC 10 3000 356.0 356.0 35.0
TPS61202DRCT VSON DRC 10 250 210.0 185.0 35.0
TPS61202DSCR WSON DSC 10 3000 356.0 356.0 35.0
TPS61202DSCT WSON DSC 10 250 210.0 185.0 35.0
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRC 10 VSON - 1 mm max height
3 x 3, 0.5 mm pitch PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4226193/A
www.ti.com
PACKAGE OUTLINE
DRC0010J SCALE 4.000
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
3.1 B
A
2.9
PIN 1 INDEX AREA

3.1
2.9
1.0 C
0.8
SEATING PLANE
0.05
0.00 0.08 C
1.65 0.1
2X (0.5)
(0.2) TYP
EXPOSED 4X (0.25)
THERMAL PAD
5 6
2X 11 SYMM
2
2.4 0.1
10
1
8X 0.5 0.30
10X
0.18
PIN 1 ID SYMM
0.1 C A B
(OPTIONAL)
0.5 0.05 C
10X
0.3
4218878/B 07/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRC0010J VSON - 1 mm max height
(1.65)
(0.5)
10X (0.6)
1
10
10X (0.24)
11
SYMM (2.4)
(3.4)
(0.95)
8X (0.5)
5 6
(R0.05) TYP
( 0.2) VIA
TYP
(0.25)
(0.575)
SYMM
(2.8)
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
0.07 MAX EXPOSED METAL ALL AROUND
ALL AROUND
EXPOSED METAL
SOLDER MASK METAL METAL UNDER SOLDER MASK

OPENING SOLDER MASK OPENING
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS

4218878/B 07/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DRC0010J VSON - 1 mm max height
2X (1.5)
(0.5)
SYMM
EXPOSED METAL
11 TYP
10X (0.6)
1
10
(1.53)
10X (0.24) 2X
(1.06)
SYMM
(0.63)
8X (0.5)
6
5
(R0.05) TYP
4X (0.34)
4X (0.25)
(2.8)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:

80% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4218878/B 07/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
DSC0010J SCALE 4.000
WSON - 0.8 mm max height
3.1 B
A
2.9
PIN 1 INDEX AREA

3.1
2.9
0.8 C
0.7
SEATING PLANE
0.05
0.00 0.08 C
1.65 0.1
2X (0.5)
(0.2) TYP
EXPOSED 4X (0.25)
THERMAL PAD
5 6
2X 11 SYMM
2
2.4 0.1
10
1
8X 0.5 0.30
10X
0.18
PIN 1 ID SYMM
0.1 C A B
(OPTIONAL)
0.5 0.05 C
10X
0.3
4221826/D 08/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DSC0010J WSON - 0.8 mm max height
(1.65)
(0.5)
10X (0.6)
1
10
10X (0.24)
11
SYMM (2.4)
(3.4)
(0.95)
8X (0.5)
5 6
(R0.05) TYP
( 0.2) VIA
TYP
(0.25)
(0.575)
SYMM
(2.8)
LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
0.07 MAX EXPOSED METAL ALL AROUND
ALL AROUND
EXPOSED METAL
SOLDER MASK METAL METAL UNDER SOLDER MASK

OPENING SOLDER MASK OPENING
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS

4221826/D 08/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DSC0010J WSON - 0.8 mm max height
2X (1.5)
(0.5)
SYMM
EXPOSED METAL
11 TYP
10X (0.6)
1
10
(1.53)
10X (0.24) 2X
(1.06)
SYMM
(0.63)
8X (0.5)
6
5
(R0.05) TYP
4X (0.34)
4X (0.25)
(2.8)
SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 11:

80% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4221826/D 08/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022, Texas Instruments Incorporated

Tps 61200

Uploaded by

Copyright:

Available Formats

Tps 61200

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Tps 61200

Uploaded by

Copyright:

Available Formats

Product Sample & Technical Tools & Support &

Folder Buy Documents Software Community

TPS61200, TPS61201, TPS61202

TPS6120x Low Input Voltage Synchronous Boost Converter

2 Applications Device Information(1)

Changes from Revision D (March 2013) to Revision E Page

Changes from Revision C (September 2012) to Revision D Page

Changes from Revision B (FEBRUARY 2008) to Revision C Page

2 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

Changes from Revision A (JUNE 2007) to Revision B Page

Changes from Original (MARCH 2007) to Revision A Page

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 3

TA OUTPUT VOLTAGE (1) PART NUMBER (2)

7 Pin Configuration and Functions

DSC and DRC Package

4 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

8.2 ESD Ratings

8.3 Recommended Operating Conditions

8.4 Thermal Information

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 5

8.5 Electrical Characteristics

6 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

8.6 Typical Characteristics

1200 TPS61200 VI = 1.8 V

Figure 3. Efficiency vs Output Current Figure 4. Efficiency vs Output Current

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 7

Figure 5. Efficiency vs Output Current Figure 6. Efficiency vs Output Current

Figure 7. Efficiency vs Output Current Figure 8. Efficiency vs Input Voltage

Figure 9. Efficiency vs Input Voltage Figure 10. Efficiency vs Input Voltage

8 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

Figure 13. Output Voltage vs Output Current

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 9

9 Parameter Measurement Information

Figure 14. Parameter Measurement Schematic

10 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

10.2 Functional Block Diagram

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 11

10.3 Feature Description

10.3.1.1 Synchronous Operation

10.3.1.2 Down Regulation

10.3.1.3 Device Enable

10.3.1.4 Softstart and Short-Circuit Protection

12 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated

Product Folder Links: TPS61200 TPS61201 TPS61202

Feature Description (continued)

10.3.1.5 Current Limit

10.3.1.6 Undervoltage Lockout

10.3.1.7 Thermal Shutdown

10.4 Device Functional Modes

10.4.2 Down Conversion Mode

Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 13

11 Application and Implementation

11.1 Application Information

11.2 Typical Application

11.2.1 Design Requirements