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Mi Chapter 5

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48 views31 pages

Mi Chapter 5

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Havishey Jotaniya
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5 8085 Instruction Set and ALP e ] a wes ‘ toes St and NP a seen 4 PE or GIL © byte Byles :2 i oar eo eid fain Orin mals ome | bat ¢ . ‘Data tranafer operatony, trons {| anion Tie waranty ade 20 Sey cepa | Contents * Asthmatic operation | Desc tne menor) lato pec + Logical o [empte: \¢ 6.4 Instruction Classification. ...............+. Wintorst9, -- + Marks 4 Branch operations and | Sov on 4 6.2 Instruction Set of 8085. ...............+. Summer04,10,13,15,16,17,18,19, * Stack Input/Output and Machine contra! operations | | Wintor-10,15,16,17,18,19, - Marks 8 = | ‘ 5.3 Addressing Modes. «. Summer-13,15,18, } 1. sph the clacton of te irate | | . vee cess Winttor-13,16,18,19, «+++ ++ Marks 7 2+ Deseret categories of intrction wed fr | | | 5._Deveribe the diferent types of instraction ses | | | 5.4 Assembly Language Programming ......... Summer-14,17, Winter-16,- - Mark 1 SEE 5.5 Programming Exomples............,...-. SUmmer-04, 08,13,18,19, eT patig ee ie ont eae ceeeeeeeeeeceeees Mint0r16,19, © + Marks 10 [econ ote 108, M.D — — 5.6 Instruction Comparisons, .......++..++0++ WIM@RAS, < +0 ++ 6050+ ++ Marks 7 i Operation rd + 1 Dyten 3 6.7 Instruction Formats... sec eeceeeeees Winton, oes oes + Marks 7 a | |e oa Ths porarn cpl daa edna | and Ans a Messing _ = Netaten | SG roo un a 5.8 Short Questions and Answers Mery eaten plied by HL pie ple og IN ~ | (site Sree Fa | eample: A= | 9, 2} A= 10100011 = ASH, 3 40 adds 0110 0000 because (higher nibble) 1010 > 9, 1A = 0000 0011 = 03 BCD, CF. ‘Addressing Mode : Implied ered Description : This instruction increments the contents of specified register by 1. The result is stored in the same register. The register ris Sbit general purpose register such as A,B, C.D, Hand L. : Example: B= 10H INR B ; This instruction will increment the contents of B register (10H) by one and stores the result (1041 = 11H) inthe same ie Flags Affected: Z,P, A.C T- states 4 serpent nd ht in seas hance tant LP fie Opeaton iM Ma Dye | : location pointed by HL register Desciption This intron increments the cates of ps by Tie rel stored ae same memery Icon The HL roger pur weds 8 | memory pointer. eases | Example : HL = 2050H, (20508) » 30H | INR M; This instruction will increment the contents of memory locaton pointed by HL. register alr, 80H, Le: data 30H by one. It wil store the result (90 ¢ 1 = 31H) at the same place. i : SZPAC ‘Addressing Mode : Register Indirect Flags Affected: ZAC & | Machine Cycles: OF, MR. MR ates: 10 | yt | LINX 3p Operation : rp = tp +1 ; | Desat t instruction increments the contents of register ‘by one. The result is stored | |g utente es fo cotta i INX Hj This instruction wil increment the contents of HL register pair (LOFFH) by one. It will | | store the result (LOFF +1 = 1100H) in the same Le. HL register pair: {This instruction decrements the contents of the specified register by one. It stores Den the tame sepsis, The register rs Sit general purpose register such as A,B,C, D, | | E Hand lL } TECHNICAL PUBLICATIONS? « An up thrust for knowiedgo Secrets so {ossianaten Saar | Mecgrenuerand hits a LM Ak OE] | —E EP an — + AAM Byte | DCR M ; This instruction will decrement the contents of ‘ANA M. Operation: A A | i, ABOH, (a data 2H by ore wil ore he re > I's Sf ns et sie n a et ; Piet th be cts ty ‘lags Affected : §, Z,P, A, C wate iter pa fs wed a « memory point, —— LT states: 10 | Example : DE 10204 | DCX D ; This instruction c | orth oa Gs Jnr a, Se EM Fa LRH by on nd cumple: A = 10101010 (AH, B = O01 FH) ANA B ; This instroction will ‘AND the contents of B con SLT al ee Cava O05 ta ecmmetene, nr San onan of 1010 1010 0000 1111 0000 1010 = OAH TEOMCALPURUCATIONS®- An te ot af Exaple (ost), HL = 20508 | {As cto sk, HL = 25H at al ANAM a in aly Nar 630 wl ee sa ca nt | | | | | 0101 0101 1011 0011 0001 coor are area POPE Tat Gaeiicria ANT data | 5 +: This instruction AND» the § bit date given in the instruction with the | Cece int and ores rr the scum itor. pT: ample: A= Jot 008 VANE SEH ; Thi istction wl AND the contents of accumulator (83H) with 3FHL. It Cit bro De 1011 0011 ORL daa 0011 0011 =33H [AND operation clears bits of a binary number. The task of clearing a bitin a binary number called masking, The Fig. 821 shows the process of masking. bse rere | ‘a20scrt + 10110011 (83H) =uH =0AC#1 XXXX XXX X Unknown Bit binary number 111 0000 Meskingpatm XXX 0000 Rawk \— season ots Fig. 52.1 Masking using AND operation Fags Affected : Al, CY = 0 AC = 1 TEOOWCAL PRUCATIN Anu Bt wtp = 8085 insiuction Set and ALP Operation: AC A@ r Descrpln : This natuctonloely XORs the cates ofthe specie sgt with te | contents of accumulator and stores the result in the accumulator, The register is Bit general _Purpose register such as A,B,C, D,E, Hand L. me } ‘Example : A = 1010 1010 (AH), C = 0010 1101 (2DH) XRA C } This instruction will XOR the contenis with | Seman wl neh nd seas cea nah te ot ot 1010 1010 0010 1101 1000 0111= (7H) iii ioaes hea Tg aaa Machine Cyeles : OF ESS ee [xRAM Operation: A A@ M Descpio : This irtrcton lily NOR the contents of anor Lc poled by HL Fee i mbt ty om so pee ee | Example : A= 0101 0101 (S54), HL = 20508 and (20504) 2031 001 (B34) XRA M ; This instruction will logically XOR the contents of memory. location pointed by HL Feguter pale GOSI edn BSH ith the contents of sccumaltr GE) wl ore he Fst (E6H) in the accumulator. 0101 0101 1011 0011 1110: 0110= E6H Asig Mode epi in| ap Add ACY = 086 =9 LT = states :7 Operation : A «AO data (8) Description : This instruction logically XORS the 8 bit data given in the instruction with the lator ad tors the rel i he ac = 10110011 3H i XRI_ B9H This instruction veil logically XOR the contents of accumilator (BSE) with 39H. It | Tit sore he tesl (SAH) in th accumir ? ‘yo11 ott | oo11 1001 | Too 1010=saH | | st if some bits of 2 ‘or memory location nwst be inverted. This | Ta ROR rion ber by verted oF conpemered Tas (sated In | [eet aa XXX XXX Unknown Bi binary number | @ 00.00 1111 Patt for keting lower 4s Les XXX ORRRR © Result | \— veri ts | | Fig, 5.2.2 Inversion of part ‘of a number using XOR operation Bytes :1 Dessipon Ts matron legal OR he nets of pci pie ih he ott pesenPltoe and vores the result inthe accumlator. Each bitin the accumlator is ORed with | ing bit in rgter tie. Dy bitin accumulator is Ofed with Dp Bit in register, Dy Sn | | Qinith Dy irr and 40'0n upto Dy Bi. The register rs Bit general purpoe register such as A, (REDE and, I | | example : A = 1010 1010 (AAHD, B = 001 0010 (12H) | CORA B ; This instruction will lopially OR the contents of B register. with the contents of | | Seeumulto, I wl store the result (BAH) inthe accumulator. 1010 1010 | 0001 oo10 1011 1010=BAH TECHNICAL PUBLICATIONS” « An up tht for inowledge TECHNICAL PUBLICATIONS® - Anup thrust or knutedgo 6 é | : 1 « specie register fom cetenty of the | Description : This instruction logically ORs the contents of location | Dene the condition figs as a result of the subtraction. It sets zero Mag 4, = Fo | giter pe with cots een ha me meme rt pit by || Reali a ee a a ren of te bint Me EC DE] @ SS irae es eT aac || tan agi Acie mer PO a, | ample += O10 o101 (54), HL. = 20504 and oso + 1011 con, | | Taample : A= 011100 (Bi) and D = 1011 1001 (690 | QRA M ; This nsrucion wil lolly OR the contents of mevery seen ie Le A ee en the contents of D mer with the conti of | | Tetie pat BSH) withthe contents of accumulator (SSH). It wl sxe he eae AD || 4 caer flag wl et afer the execution ofthe instruction, | 0101 o101 | 6 | 1011 0011 j = t shila 7 tl ! 33 = « | Addressing Mode: Register Indirect | Flags Affected AIL CY =0AC=0 the contents of the memory location specified by HL [ina Bis : Deseo gon the cates ofthe accumutor and sts the conden fags as a rent of | 2 ie a S| Pan? sco seo fag f= M and sts cary ag A.M. The TIL register pli used TS ESET a as a memory pointe. BS oid @ HRI datas ie “Operation 1A. AY data (6) Byte 12] Example : A = 1011 1000 (BSH), HL = 2050H and (2050H) = 1011 1000 (88H) es CMP M ; This instruction will compare the contents of Description : This instruction ‘ORs the bit data conn fe is, essay iter fn the irstrvton with the i | i i Beample | A = 1011 0011 @63E9 | i € ‘ORI Ost ; This instracton wil logically OR the contents of Se ot: Ti traction lhe accumulator (BD) with OSH. 1 it e 1011 0011 € 0000 1000 am lt Es Deaton: Tis intron subacts the 6 bit data given inthe instruction from the contents of | 2 1011 1011 = BBE Serum ed a endo gs rok of bacon sr ag A= ats | ae . ‘The OR instruction is used to set (make one) any bit in the binary number. This is iustrated in fi ons cary. O08 WAS detain Fa ae Las @ Re 5 ‘ sample : A= 1011 1010 GAH) KXXK x ii 8 ys CPT 30H ; Tis instruction wil compare 30H with the contents of scurnulato (BAH. Here fi <- hiss om |[A> data fo aero and cary both Nags wil reset afer te execaton of the imsteuton | 114 0000 Seorppaten ee : le ES Asts0.0.0 0.15 Mode :Inumedlate Flags Affected: Le Ra sae Adtoning Make; Irene | agp ted ees exits Machine yes: OF, MR. T= sate: 7 & | e TECHNICAL PUBLICATIONS® - An up tnust for kaculedye 1S +40 9 tnt fr inonledge | Operation: CY 4 Deseription : This instruct scarry Mage Example: Corry fag « 0 STC: This instruction will et the cary fag = 1 Addressing Mode : implied | Machine Cycles: OF Tyo etetaas a aT yemc Operation : CY — TY Description : This instruction complements the carry fag. | Example : Camry fag © 1 -CMC This istration wil complement the carry ag Le. ‘Addressing Mode : Implied | Machine Cycles: OF carry flag = 0 Operation: AA Description : This instruction complements each bit ofthe accumulator Example : A = 1000 1000 (88H) EMA. 5 This instruction will complement ¢2ch bit of accumulator Le. A = 0111 0111 (7H) “Addressing Mode: Implied Description : This instruction rotates the ante of the acurultor ft bya psn i by {s placed in By as well as in CY. ree Abor execution Tuample A » ODIO (57H) and CY =1 RLC ; After execution of the instruction the ccumulator contents will be (1010 1110) AEH and TEGICALPUBLEATIONS® An pt rape 5.18 £2085 instruction Set and ALP ae Bytes :1 | J Microprocessor and interfacing 5-19 ‘Addressing Mode : Implied Machine Cycle Flags Affecte qTestates:4 Description : This instruction rotates the contents of the accumulator right by one position. Bit By is placed in By as well as in CY. PeLeTeTeTeTe ToT]: | | seample t 00 ALD and Cr = Bey Ale earater ef erences nes wl be (010) AD nd So ey | Addressing Mode ; Implied Operation: By, + By By CY, CY EB, | Description Tis instructon oats the contents ofthe accumulator et by one position, Bi By is placed in CY and CY is placed in By Botore execution =P Pla ToT WIT Ater execution (Jef [%s]%[%]% Jer] [Example A = 20101301 (ADH) and CY = 0 } RAL ; Alter execution ofthe instruction secumalator contents willbe (010 1010) SAH and carry. | flag wil se. — | Addesing Mode + Implied Fags Affected : CY TECHNICAL PUBLICATIONS® - An up thrust for knowledge 2085 instruction Sat ond ALP Operation : B,_; By, By cy, CyB, Bytes 11 Description : This instruction rotates the c tenis of 4s placed In CY and CY is placed in By n't te Secular right by one position. Bit By Betoreexveuton cy After execution EPREREER) f Frample + A = 1010 0011 (ASH) and Cy = 0 RAR : After execution ofthe instruction accumulator contents willbe (0101 OOO) SIE | ag al set, ce Cee ‘Stack Operations ‘The stack is a portion of read/write memory set aside by the user for the purpose of storing information temporarily. When the information is written on the stack, the operation is called PUSH. When the information is read from stack, the operation is called POP. ‘The first information pushed on to the stack is the last information popped off from the stack. This type of operation is known as a first in, last out (FILO). This stack is implemented with the help of special memory pointer register. The special pointer register is called the stack pointer, During PUSH and POP operation, stack pointer register gives the address of memory where the information is to be stored or to be read. The stack pointer’s contents are automatically manipulated to point to stack top. The memory location currently pointed by stack pointer is called top of stack. TECHCAL PUBLICATIONS? - A pr owe _Meroprocessor and interfacing 8085 instruction Sot and ALP PUSH 1p Operation: SP SP 1, (SP) —rpH, SP f ‘+ The assembler substitutes the required machine code for each instruction in assembly language. 4, It also calculates the required address in memory for each symbolic name of a memoty location and substitutes those addresses for the names, ‘+ Thus, the assembler converts the whole assembly language program into binary codes and then it assembles the machine understandable code into the main TECHNICAL PUBLICATIONS® - An up thet for knowedge TECHNICAL PUBLICATIONS® - An up thrust for knowledge Functions of an assembler are listed below. 1. It translates mnemonic register addresses to system addresses, -messages on syntax errors. 3. It assembles all the codes in the main memory for execution, 4.1 the assembly language Program is large, it provides linking facility among the subroutines, 5.1 facilitates the generation of output on required output medium. | Advantag of assembly language programming : 1. They are easy to understand and use, " 2. They are less error prone than machine language. 3: They require less memory and other resources then higher level languages. Thus ‘hey are more efficient than higher level langauge programs. Disadvantages of assembly language programming : 1. Machine dependent : Depends on the architecture of the computer. 2. Harder to learn: It is harder to learn than higher level language “3, Slow development process 4. Less efficient than machine language. 5. There is no support for modem software ‘engineering technology. High-level Language * A programming language in which the program statements are not closely related to the internal characteristics of the computer is called a high-level language. Thus ‘high level language programs can be machine independent, TECHNICAL PUBLICATIONS® «Anup tu for nowlege lerprecessor and interfacing Soa - i ‘+ High level programs may be used with different types of computers with little or no modification, This reduces the re-programming time. vn + As a general rule, one statement in a high level programming language 7 expand into several machine language instructions, This is in contrast to assembly languages, where one statement normally generates one machine language instruction, ‘High level programming languages were developed to make programming easier and less error-prone. High-level languages fall somewhere between natural languages and machine languages and were developed to make the programming process more efficient. Examples of higher level languages are : C, Pascal, COBOL, FORTRAN, BASIC C4, ete, Advantages of high-level programming 1, Programs are easly readable and understandable. 2, They are machine independent, 3. Program can be easily debugged. 4. They aze easier to maintain. 5. Permits faster development with low cost. 6. Keeping documentation is easy. Disadvantages of high-level programming : I 1. Poor control on hardware. 2. Less efficent, } 3. Porting a program to a new machine is not always easy. { Sr.No. Machine Language |_ Assembly Language 1 reaemanic which |the operation. Processor dependent and res knowl | requires know! of als of proce |ial So Progam. © Wena Raton asp oeaw oun £2005 Instvction Sot end ALP =; L eo! aoaaae agate iat e »@ Microprocessor a 88807 and Interfacing 5-42 £8085 instruction Set and ALP [Pegams tives [Propane have more ecution time, execution |exection tine 5. Program development is | Program de _—— ~ Program development is | Program development is bate Comercevergen* = language. | —— {tis not user friendly. _| tis less user friendly. It is user friendly. Table 5.4.1 Comparison between various microcomputer languages Assembly Language Program to Machine Language Program Once the assembly langua iti it ig program is ready, it is necessary to convert it in the machine language program. It is possible to do this by referring the proper hex code for tach assembly instruction from the 6085 instruction set manual. Ths proces is known as hand assembly and the resulted machine 1: is code, Let us see the hex code for our progam. Se ss Haown as ex ‘Mnemonics Hex code MMVI A, 20H SEH + Opeode 20H = Operand MVIB, 404 OSH = Opcode SOH = Operand ADD B SOH + Opcode ‘STA 2200H ma” Opeode GOH + Operand (lower byte of address) 22H Operand (higher byte of address) HUT 76H — Opcode Storing Hex Code in the Memory Once the hex code is ready, it has to be loaded in the memory of specially designed microprocessor system (Microprocessor training kit) for execution. To perform this task we should know the address range of read/write memory in the system, Let us assume that the read/write memory ranges from 2000H to 22FFH. The microprocessor training Kit has keypad to enter the hex code in the memory. It provides a special routines TECHNICAL PUBLICATIONS® - An up trust for hnowiedge ‘Microprocessor and Interfacing sa £8085 Instruction Set and ALP * (monitor program) to enter a hex code byte by byte and execute the program. Typical steps for storing hex code in the memory from address 2000H are as follows 1, Reset the microprocessor system by pressing the RESET key. 2. Enter into store mode by pressing SET key. 3. Enter the address of the memory 2000H, where the first hex code (starting address of the program) isto be stored using hex keys. 4. Enter the hex code using hex keys. 5. Increment the memory address by 1 using INC key. 6. Repeat steps 4 and 5 until the last hex code, EEX Executing the Program The nticroprocessor training kit provides a procedure to execute the program. To activate the procedure we have to enter the starting address of the program (2000H in ‘our example). To enter this address we have to go into execute mode by pressing GO key and enter the starting address using hex keys. Once the starting address is entered, the program can be executed by pressing EXECUTE key. The EXECUTE key procedure loads the starting address of our program, 2000H into the program counter and program control is transferred from monitor program to our program. ‘After this microprocessor reads one hex code at a time, and when it fetches the complete instruction, it executes that instruction. Then it fetches the next instruction and this process continues until the last instruction in the program is executed. 1, What is program ? 2. What isan assembler ? GTU 3. Explain the process of writing assembly language program with the help of example 4. What do you meen by hand assembly ? Explain with the help of example, 5. Draw and explain machine language instruction format 6, State and explain advantages end disadvantages of machine language. | 7. Give the general format of essembly language instruction with example, | 18. What i assembler 2 Explain working oft. State functions of i. | 9, State and explain advantages anc disadvantages of assembly language. | 10, State advantages and disadventages of higher-level language. 11, Diferentat betzeen assembly level language and machine lve language. j Mezoprecessor wd Interfoing su Programming Examples 8085 instruction Set ond ALP i Lab Experiment 5.5.1: Sic 8-i dtu in meme. ‘Stutument : Store the data byte 52H into memory location 2000H, Program 1 : MVLA,52H ——_; Store 52H in the accumulator STA.2000H —_; Copy accumulator contents at address 2000 iT # Terminate program execution Program 2 : 10H, 20008; Load HE, with 20008 MVIM, S2H Store 62H in memory ication pointed by HL register pair (20008) Hut + Terminate program execution ‘The result of both programs will be the same. In program 1 direct addressing instruction is used, whereas in program 2 indirect addressing instruction is used. Lab Experiment 5.5.2 : Exchuogs the eactets of memory locations, Statement = Exchange the contents of memory locations 1000H and 2000H_ Program 1: LDA 1000H —_—_—; Get the contents of memory location 1000H into accumulator MOVE, A + Save the contents in B register LDA 2000H —_—_—; Get the contents of memory location 2000H into accumulator. ‘STA 10008 —_; Store the contents of accumulator at address 10004. MOV A.B Get the saved contents back into A register ‘STA 20008 ‘Store the contents of accumulator at address 2000H HLT Terminate program execution Program 2: LX1H, 1000H Initialize HL register pair as a pointer to memory location 1000H XID, 2000; Intalize DE register pair as a pointer to memory location 20008 MOV BM. Get the contents of memory location 1000H into B register LDAX D Get the ronsemts of memory location 2000H into A register MOV M, A Store the contents of A register into memery location 1000H MOV A, B + Copy the contents of B register nto accumulator ‘STAXD + Store the contents of A register into memory location 2000H. aur } Terminate program execution In Program 1 direct addressing instructions are used, whereas in Program 2 indirect addressing instructions are used, i TECHCAL PUBLCATIONG® Anup tt rope eoprcesser and intetcng Lab Experiment 5.5.3 : Add two &- 20008 Stalenaat : Add the contents of memory locations and 2001H and place the result in memory location 2002H. ‘Sample problem Get the second number or — oe ae — a fai etapa sa sem] ae ae iene oD Ak cond epee Cea) INKH ‘HL points 2002H =. eas eco Lab Experiment 5.5.4 : Scbtract two 8-bit numbers. Steel: Subtract the contents of memory Flowchart location 2001H from the memory location 2O0H and place the result in memory Cea) location 2002H. sample protien [[osensannoe | (aon) = sit wou) = amt (apa aaa enut = StH 19H = 2 Source rogam nout Lae MOV A.M: Get it operand ome | HL potmt 000 SBM joubact cond opeand [cement] on $ MU poe 20a MOVM A} Soest a 202K GD wr ; Teminatepogram ton TECHRUCAL PUBLICATIONS® - An up tt lr nowiedge eedee ee ea@medd & => 28 =® =3 2 = ~~ MecPVCRCe0r and neti 5 2085 inaction Stand ALP 1 Mererocesso and netcng a7 2085 nstucton Stand ALP Leb Experiment 5.5.5 Aad two 16-tit somber, higher byte addition using ADC instruction. In program 2 16-bit addition instruction (DAD) is used. Stems : Add the 16-bit number in memory locations 2000H and 2001H to the 16-bit ‘number in memory locations 2002H and 2003H. The most significant eight bits of the {bo numbers to be added are in memary locations 2001H and 2008H. Store the result in Joon” ; Put D and E contents on stack Por = PSW Get contents of D and E in A and F, respectively Write a program to find whether two 16-bit mumbers are equal or not? If they are equal clear the acciimulator, otherwise store FEN. GET Solution: Assume that two 16-bit numbers are stored in DE and HL registers, respectively." ; Compare lower, byte j ifequal zero fag is set MOV A, L xRA OE TECHNICAL PUBLICATIONS® « An up trust for knowtedge ersprocessoc and intrtacing 5-58 2085 instruction Set ond ALP Nz LAST +if2=1 compare higher bytes MOV A, H + compare higher byte RAD + ifequal, zero flag is set wz stor iif 2=1, numbers are equal and A = 0 Last: MVLA, FFE hence make A = FFA sToP: HUT 1 Stop execution CHEERED vite 6085 instrclions to sore OOH in fag register, Solution ; MIVIE,OOH Load E register with ott Pus D + Save DE oa stack Porrsw + Load the contents of E register (stored in stack) {in Mag register, Le, OOF L at kek tr rater? Epi emi on of rae | eran a 2 Wt tof S05 ese agg isco 1 wk he pene of BCD mene. | maa 2. Whit an B05 prgen a oo EYws sel mer etn 2100 Hee 200 H repel no 4. Write ascnbly langage ropa td aon of 8% namie with ar Spey the memory ton of ch end every ston, Instruction Comparisons (SERIES) compare instrctions SUB A’énd MVi'A) OOH, Solution This instruction subtracts the This instruction loads. JH contents of register A from: register A. ‘teelf and stores result (00H) in | eA Register addressing mode Immediate aidressng mode | ‘This. instruction affects all, This instruction dees not ae flags. flags. 4 5-87 teropocessr and interes 4 | restotes required | omar at Ope in E So — ‘- (CERT compre instructions SUB B and CMP B. ups SSSC | | ‘One byte instruction (One byte instruction | sant BSH oe | ‘This instruction subtracts the This begergpe ter ty the! sente fer B from contents ‘eon! Y ind Sues result im epter A and fects the Ag reper A and affects the flags according contents Yo contents of registers A and B. 1 elt Result of A= B i stored in Result of A - B is not stored repiter A } t | i | coorkall | ee TECHWCAL PUBLICATIONS? - An up trust fr knowiedge —— SE] TDs iron dows not fect Tis iemacton dos nt af 1B r Required T-states 0 a | Required machine cycles 1. Opcode fetch A Opsode ach 2 Memory read procemat, ae, sae ‘This instruction does not affect This instruction does not affect AT pe. Ate th ton in FC so tat processor fetches contents of HL register foe inition fom aires ino FC to. tht” proce 20H. felches next instruction from) address specified by HL! eae 2 Ss Sein pel ee ‘Addressing Mode Direet Indirect tas tha rasan dv head a Required T-states Required Machine Cycles EEE compare structs Hr ant NOP. eRe s Solution Parameter HLT of instruction byte One byte instruction TEOOALPURLCATIONS®- Aneto (One byte natracton cexncston of subrovtine. data temporarily in memery. 2 CALL instruction stowe the addess of next PUSH instruction sores meister contents in| Instruction efter i im the stack and loads the stacks < 1 (PC th adress given i the instruction. RET invruction loads the address from POP instricio stack into PC. fom the stake 7 ‘Sienilarities + 1. They use stack memory. 2. CALL and PUSH instructions decrement stack pointer by 2. 3. RET and POP instructions increment stack pointer by 2. ! 4. Instructions do not affect flags except POP PSW instruction. { 1. Compare the similarities and diferences of CALL and RET instructions with PUSH and POP snstructons 12. Explain the operational difeence betwen the flowing pars of instructions. 0) SPHL and XTHL f) CALL ar and MP addr {i LHLD and SHLD aide io) XRA.A ond MVI A, OOH 8) INR A and ADIO1 H_—2i) DAD RP and DAA. 3. Compare the following instructions of 8085 microprocessor = LDA C000 and LHLD C000 i)_RRC and RAR TECHNICAL PUBLICATIONS® - An up thrust fr knowledge Miroprocessor ard Interfacing 5-60 a :! 4. Compare the instructions of 8085 micropracese 1) LXIH 1234H and LHLD 1234H 2) RAL end RLC 3) IMP 1000H and CALL'1000H eee — GEE Instruction Formats ‘The G085A instruction set consists of one, two and three byte instructions. The frst byte is always the opcode; in two-byte instructions the second byte is usually data; in three byte instructions the last two bytes present address or 16-bit data, Sra 4 pees (b) Two byte instruction aie Fis | A Instruction format 1, Ohe byte instruction ; For Example : MOV A, B whose opcode is 78H which is one byte. This instruction copies the contents of B register in A register. 2, Two byte instruction : For Example : MVI B, 02H. The opcode for this instruction is O6H and is always followed by a byte data (02H in this case). This instruction is a two byte instruction ‘Which copies immediate data into B register. 3. Three byte instruction : For Example : JMP 6200H. The opcode for, this instruction is CH and is always followed by I6-bit address (6200H in this cise). This instruction is a three byte instruction which loads 16-bit address into program counter. 1, Describe the instruction forma of 8085 microprocessor. 2. What is the purpose of temporary registers Q and Z jn 8085 microprocessor ? 5-6 mtn texan r contents 3 Wit racine with le hy of erate rms Sine 9g : tons befor ane ofr exeaton of the instruction : i) STAX i | registersimemary lection before contents 4k Write instruction format and expan with the help of appropriate example showing contents of egistersmemory locations before and after execution ofthe instruction DLDAX i DAA EEE] short Questions and Answers Fill n the Blanks with Answers 1 MVIr, data(6) instruction has __ addressing mode. (Ans. :immediatel 2 MVIM, data(8) instruction has __ addressing mode. (Ans. indirect, immediate] Q3 After execution of ANA r instruction CY = ___, AC = __. TAns.: 0,1) 4 After execution of XRA M instruction CY. = __, AC = __. Ans.:0,01 5 ___ bytes are required for the instruction "SUI data(6)". (Ans. :21 6 Flag affected due to execution of "RAR" instruction is __. fans: CY] Q7 Number of bytes required for the instruction "JMP addr” are tans. :3) Q8 Number of bytes required by “CALL addr” instruction are _. Tans.:3) Q9 Addressing mode of "IN addr(8)" is _. (Ans. : direct) Q.10 How many number of bytes are required for the instruction DI? [Ans.:1] Q.11 Which flags are affected due to execution of "CMP r" instruction ? [Ans.: All] Q.42_ Which flags are affected due to execution of "DCR M" instruction ? UAns.:5,Z,P, AG CY] Q.13. After execution of "RAL" instruction, bit BO is replaced by bit. fAns.:CY] Multiple Choice Questions with Answers. Q.14 ‘LDA 3000H' means _. (a) emmy ea 15] 20008 HA €) A+ 000) A @ 30008 tans.) ee TECHNICAL PUBLICATIONS? - Aa up thst for owacye onl on!

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