The major parts are

▪ central processing unit or CPU

▪ memory
▪ input and output circuitry or I/O.
Connecting these parts together are three sets of parallel lines called buses.
The three buses are
➢ address bus
➢ data bus and
➢ control bus.
i) MEMORY: The memory section usually consists of a mixture of RAM and ROM. It
may also have magnetic floppy disks, magnetic hard disks, or laser optical disks.
Memory has two purposes. The first purpose is to store the binary codes for the
sequence of instructions you want the computer to carry out. The second purpose of
the memory is to store the binary-coded data with which the computer is going to be
working.
ii) INPUT/OUTPUT: The input/output or I/O section allows the computer to take in
data from the outside world or send data to the outside world. These allow the user
and the computer to communicate with each other.
iii) CPU: The central processing unit or CPU controls the operation of the
computer.
✓ It fetches binary-coded instruction of the computer.
✓ It fetches binary-coded instructions from memory, decodes the instructions
into a series of simple actions, and carries out these actions.
✓ The CPU contains an arithmetic logic unit, or ALU. Which can perform add,
subtract, OR, AND, invert, or exclusive-OR operations on binary words when
instructed to do so.
✓ The CPU also contains an address counter which is used to hold the address of
the next instruction or data to be fetched from memory, general-purpose
registers which are used for temporary storage of binary data, and circuitry
which generates the control bus signals.
iv) ADDRESS BUS: The address bus consists of 16, 20, 24, or more parallel signal lines.
▪ On these lines the CPU sends out the address of the memory location that is to be
written to or read from.
▪ The number of address lines determines the number of memory locations that the
CPU can address.
▪ If the CPU has N address lines then it can directly address 2^N memory locations.

v) DATA BUS: The data bus consists of 8, 16, 32 or more parallel signal lines.
▪ As indicated by the double-ended arrows on the data bus line, the data bus
lines are bi-directional.
▪ This means that the CPU can read data in on these lines from memory or
from a port as well as send data out on these lines to memory location or to a
port.
▪ Many devices in a system will have their outputs connected to the data bus,
but the outputs of only one device at a time will be enabled.
vi) CONTROL BUS: The control bus consists of 4-10 parallel signal
lines.
▪ The CPU sends out signals on the control bus to enable the outputs of
addressed memory devices or port devices.
▪ Typical control bus signals are memory read, memory write, I/O read,
and I/O writer.
▪ To read a byte of data from a memory location, for example, the CPU
sends out the address of the desired byte on the address bus and then
sends out a memory read signal on the control bus.
History of mp
 8086 Microprocessor features:

1. It is 16-bit microprocessor
2. It has a 16-bit data bus, so it can read data from or write data to memory and
ports either 16-bit or 8-bit at a time.
3. It has 20 bit address bus and can access up to 220 memory locations (1 MB).
4. It can support up to 64K I/O ports
5. It provides 14, 16-bit registers
6. It has multiplexed address and data bus AD0-AD15 & A16-A19
7. It requires single phase clock with 33% duty cycle to provide internal timing.
8. Prefetches up to 6 instruction bytes from memory and queues them in order to
speed up the processing.
9. 8086 supports 2 modes of operation
a. Minimum mode
b. Maximum mode
Intel 8086
internal
architecture
Architecture of 8086 microprocessor:
❑ As shown in the above figure, the 8086 CPU is divided into two independent functional parts
✓ Bus Interface Unit(BIU)
✓ Execution Unit(EU)
❑ Dividing the work between these two units’ speeds up processing.
Interface act as a mediator for execution parts to external device (RAM, ROM, I/O )
or it is a bridge between external device and processor.
Function of the Bus Interface Unit (BIU):
➢ Fetches instructions or data from memory
➢ Reads data from ports
➢ Write data to memory
➢ writes data to ports.
➢ In simple words, the BIU handles all transfers of data and addresses on the buses
for the execution unit.

BIU consists of three functional parts

1.Instruction pointer (IP)
2.Segment register
3.Instruction queue
1. Instruction pointer (IP)—16 bit register that store or keep the address of
memory location of next instruction to be executed.
2. Segment register: The memory space 1Mb of 8086 is segmented in to 4
blocks (4 segment register). This 1 megabyte memory is divided into 16
logical segments. Each blocks specified by register with maximum size of
64Kb. All are 16 bit register
▪ The 4 segment registers are :
a.Code segment register (CS)
b.Data segment register (DS)
c.Stack segment register (SS)
d.Extra segment register (ES)
❑ Code segment register (CS): is used for addressing memory location in the code segment of the
memory, where the executable program is stored.
❑ Data segment register (DS): points to the data segment of the memory where the data is stored.
❑ Extra Segment Register (ES) : also refers to a segment in the memory which is another data
segment in the memory.
❑ Stack Segment Register (SS): is used for addressing stack segment of the memory. The stack
segment is that segment of memory which is used to store stack data
3. Instruction queue:
❖ BIU performs its operation in parallel with EU
❖ BIU fetches instruction byte while execution unit is executing
operation.
❖ The pre-fetched instruction is send in group of high speed register
called instruction queue.
The Execution Unit (EU):
✓ The execution unit tells the BIU where to fetch instructions or data from, decodes
instructions, and executes instructions.
✓ The EU contains control circuitry, which directs internal operations(to perform
various internal operations).
✓ A decoder in the EU translates instructions fetched from memory into a series of
actions, which the EU carries out.
✓ The EU has a 16-bit arithmetic logic unit (ALU) which can add, subtract, AND, OR,
XOR, increment, decrement, complement or shift binary numbers.
✓ The main functions of EU are:
o Decoding of Instructions
o Execution of instructions
Steps
▪ EU extracts instructions from top of queue in BIU
▪ Decode the instructions
▪ Generates operands if necessary
▪ Passes operands to BIU & requests it to perform read or write bus cycles to memory or I/O
▪ Perform the operation specified by the instruction on operands
 Functional parts of execution unit
❖General Purpose Register (GPRs)
❖Pointer and index register
❖ALU
❖Flag register
❖Timer and control unit
General Data Registers:
❖The registers AX, BX, CX and DX are the general purpose 16-bit registers.
❖AX is used as 16-bit accumulator. The lower 8-bit is designated as AL and higher 8-bit is designated as AH. AL
can be used as an 8-bit accumulator for 8-bit operation.
❖All data register can be used as either 16 bit or 8 bit. BX is a 16 bit register, but BL indicates the lower 8-bit of
BX and BH indicates the higher 8-bit of BX.
❖The register BX is used as offset storage for forming physical address in case of certain addressing modes.
❖The register CX is used default counter in case of string and loop instructions.
❖DX register is a general purpose register which may be used as an implicit operand or destination in case of a few
instructions.
Pointers and Index Registers:
➢ The index and pointer registers are given below:
o BP—Base pointer
o SP—Stack pointer
o SI—Source index
o DI—Destination index

❑The pointers registers contain offset within the particular segments.

❑The pointer register BP contains offset within the data segment.
❑Thee pointer register SP contains offset within the stack segment.
❑The index registers are used as general purpose registers as well as for offset storage
in case of indexed, base indexed and relative base indexed addressing modes.
❑The register SI is used to store the offset of source data in data segment.
❑The register DI is used to store the offset of destination in data or extra segment.
❑The index registers are particularly useful for string manipulation
8086 flag register and its functions:
❑ The 8086 flag register contents indicate the results of computation in the ALU.
It also contains some flag bits to control the CPU operations.
❑ A 16 bit flag register is used in 8086 (9 flags). It is divided into two parts .
o Condition code or status flags (6 flags)-
o Machine control flags (3 flags)-direction, interrupt enable and trap
❑ The condition code flag register is the lower byte of the 16-bit flag register.
The condition code flag register is identical to 8085 flag register, with an
additional overflow flag.
❑ The control flag register is the higher byte of the flag register. It contains
three flags namely direction flag (D), interrupt flag (I) and trap flag (T).
8086 HAS PIPELINING ARCHITECTURE:
❖ While the EU is decoding an instruction or executing an instruction, which does not
require use of the buses, the BIU fetches up to six instruction bytes for the following
instructions.
❖ The BIU stores these pre-fetched bytes in a first-in-first-out register set called a queue.
❖ When the EU is ready for its next instruction from the queue in the BIU. This is much
faster than sending out an address to the system memory and waiting for memory to
send back the next instruction byte or bytes.
❖ Except in the case of JMP and CALL instructions, where the queue must be dumped and
then reloaded starting from a new address, this pre-fetch and queue scheme greatly
speeds up processing.
❖ Fetching the next instruction while the current instruction executes is called pipelining.
Register organization:
❖ 8086 has a powerful set of registers known as general purpose registers and special
purpose registers.
❖ All of them are 16-bit registers.
❑ General purpose registers:
▪ These registers can be used as either 8-bit registers or 16-bit registers.
▪ They may be either used for holding data, variables and intermediate results
temporarily or for other purposes like a counter or for storing offset address for some
particular addressing modes etc.

❑ Special purpose registers:

▪ These registers are used as segment registers, pointers, index registers or as offset storage
registers for particular addressing modes.
❖ The 8086 registers are classified into the following types:
➢ General Data Registers
➢ Segment Registers
➢ Pointers and Index Registers
➢ Flag Register
 In-circuit emulator
▪ An In-circuit emulator (ICE) is a debugging tool that allows you to
access a target MCU for in-depth debugging.
▪ A genuine ICE requires you to remove the microcontroller and to insert
the ICE in its place, most commonly using an adapter. In-circuit
emulation is rather rare in these days of high-performance, relatively
low-cost processors because ICE needs to be invisible to the system,
which is difficult to do with extremely fast, memory-intensive chips.
❑ ICE consists of a hardware board with accompanying software for the host computer.
❑ The ICE is physically connected between the host computer and the target MCU.
❑ The debugger on the host establishes a connection to the MCU via the ICE.