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Final Prep

The document discusses designing voting systems using adders and counters. It provides solutions to designing an 11-person voting system that counts the number of votes and non-votes using the least components. It also discusses implementing a counter using D flip-flops to count the sequence A-B-C-D-E-B-D-F-C-A. The solution provides the state diagram and equations to determine the next state for the counter.

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Rayan syed
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25 views4 pages

Final Prep

The document discusses designing voting systems using adders and counters. It provides solutions to designing an 11-person voting system that counts the number of votes and non-votes using the least components. It also discusses implementing a counter using D flip-flops to count the sequence A-B-C-D-E-B-D-F-C-A. The solution provides the state diagram and equations to determine the next state for the counter.

Uploaded by

Rayan syed
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Question:

Design an 11-person voting system using necessary full adder(s) and parallel adder(s). Which will count
i) How many people voted?
ii) How many people did not vote?
Your circuit diagram should be efficient, i.e. use the least amount of components.

Solution:
[Keep in mind that, you need to design a single circuit that will do both tasks]

Basics =>
Using a Half adder how many votes can you count?
=> 2

Using a Full adder how many votes can you count?


=> 3

Using a 4-bit Parallel adder how many votes can you count?
=> 3

circuit:

Question: Implement the following counter using D flip flop(s)


A-B-C-D-E-B-D-F-C-A

Solution:
As mentioned we have to use D flipflops to create the counter,
So, We need 3 D flipflops.
In a D flipflop, We take only a single input called D and we have 3 D flipflops so we will work with 3 input variables
DA DB DC. Consequently, we need to figure out input equations for the three input variables.

First, we figure out the next states from the state diagram that we drew above.

# Using three variables 8 states are possible: 000, 001, 010, 011, 100, 101, 110, 111 but in our diagram, we used 6 of them
only. 110 and 111 these two states remained unused. So, what will be the next states for them?
i) you can refer to the initial state or
ii) you can put don't cares (XXX) or
iii) Look what is said in the question. If something like this is said “ States that are absent in your state diagram refer
to _ _ _ state as next state for them” then follow that.
I have referred back to the initial state(000) in this case.

# From the state 000 there is only one hand visible which shows what is the next state if the input x is 0 but
What would be the next state if the input x is 1?
=> in this case for the present state 000 the next state will be the same as, if the input x = 0 that is 001 in our
diagram.

A B C X A+ B+ C+ DA DB DC

0 0 0 0 0 0 1 0 0 1

0 0 0 1 0 0 1 0 0 1

0 0 1 0 0 1 0 0 1 0

0 0 1 1 0 1 1 0 1 1

0 1 0 0 0 1 1 0 1 1

0 1 0 1 0 0 0 0 0 0

0 1 1 0 1 0 0 1 0 0

0 1 1 1 1 0 1 1 0 1

1 0 0 0 0 0 1 0 0 1

1 0 0 1 0 0 1 0 0 1

1 0 1 0 0 1 0 0 1 0

1 0 1 1 0 1 0 0 1 0

1 1 0 0 0 0 0 0 0 0

1 1 0 1 0 0 0 0 0 0

1 1 1 0 0 0 0 0 0 0

1 1 1 1 0 0 0 0 0 0

In order to figure out DA, DB, DC you need the excitation table of D flipflop.
Which is, D = next state. Hence, DA = A+
DB = B+
DC = C+
Now, we take the min terms to figure out the equations,
DA = ⅀ (6,7)
DB = ⅀ (2, 3, 4, 10, 11)
DC = ⅀ (0, 1, 3, 4, 7, 8, 9)
Put them in Kmap. You need to do three different Kmaps to get the three equations,
[A, B, C, X are the input variables of the KMAP]

DA = A’B’C
DB = A’BC’X’ + B’C
DC = A’C’X’ + A’CX + B’C’

Question:
How many address lines do we need for a 64 MB RAM with 16 byte/words?
Answer: 64 MB = 64 X 1024 KB
= 64 X 1024 X 1024 B
So, number of Words = ( 64 X 1024 X 1024 ) / 16 = 4194304 = 2 ^ 22
Finally, 22 address lines are required.

[ log2(4194304) = 22 ]

Question:
Design a 2048 x 32 KB-words RAM showing internal details.
Answer:
For this type of question be careful about the unit.
Always check the unit of the right side of the multiplication sign in case it is not in bit convert it to bit.
In our case, 2048 x 32 KB-words

32 KB = 32 X 1024 X 8 its = 262144 bits

Now rephrase your question as,


Design a 2048 x 262144 bit-words RAM showing internal details.

Then we need to find the decoder size,


For that, we refer to the left side of the multiplication sign.

2048 = 2 ^ 11
So, we have 11 address lines, meaning decoder size = 11 X 2^11
How many binary cells in a word? => look at the right side of the multiplication sign in our rephrased question.
We see 262144 bits.
1 binary cell can store 1 bit, Hence in order to store 262144 bits in a word we require 262144 binary cells.

We know,
Decoder size = 11 X 2^11
Binary cells/ word = 262144

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