Input / Output Instructions

(i) IN Port (Inputs the data from the port)

In this instruction the data available at the specified port address is moved to the
accumulator.
[A]← data from port

It is two byte instruction and no flag is affected after the execution of this instruction.
This instruction is basically used to read the data from the input devices such as data
read from key board, switches etc. during the computer run.

(ii) OUT Port (Outputs the data to the port)

This two byte output instruction is used to send the contents of accumulator to the
specified port.
Output ← [A]
Time Delay Introduced by a Register Pair

Label Mnemonics Operand Comments

LXI D, F424 H ;Loads DE register pair
LOOP DCX D ;Decrements DE register
pair by one.
MOV A, E ;Moves the contents of E
register to accumulator.
ORA D ;ORing of the contents of D and
E registers are performed to set
the zero flag.
JNZ LOOP ;If result ≠ 0 jump to loop

RET ;Go back to main program.

 Mnemonics T-states
LXI 10
DCX 5 24 T-states are used for the inner
MOV 5
loop and 10+7+10 = 27 T-states
ORA 4
JNZ LOOP 10/7 are used for outer loop.
RET 10

• In this program the execution of loop is for 62500 times (as F424 H = 6250010).

• The condition for the check of zero flag can not be applied just after DCX
instruction, since no flag gets affected with this instruction. So to check the
zero flag ORA instruction affect the zero flag.

• The zero flag will be set if the contents of both D and E registers are zero.
The time delay introduced by the inner loop is:

TLOOP = 62500 x 24 x Time of one T-state.

If the system clock frequency is 3 MHz, then

TLOOP = 62500 x 24 x (1/3) µsec = 500000 µsec

= 0.5 sec.
Delay introduced for outside loop is:
Tout = 27x1x (1/3)µsec
= 9 µ sec
So the total time delay introduced by the above subroutine program is given by:

TDelay = 0.5 sec + 9 µsec

≈ 5.0 sec
What maximum delay can be introduced by the subroutine program using a register
pair? Let the system clock frequency is 3 MHz.

The subroutine program for the delay using a register pair is given as:

Label Mnemonics Operand • The maximum delay can be

LXI D, FFFF H introduced if the maximum number
LOOP DCX D (FFFF H) is taken in DE register
MOV A, E pair.
ORA D
JNZ LOOP
RET

FFFF H = 6553510
So TLOOP = 65535 x 24 x (1/3) µsec + 27x1x (1/3) µsec
= 524280+9 µsec
= 524289 µsec
= 0.52 sec
 Write a program in assembly language to introduce a time delay of 1 sec using a
register pair. Let the system clock frequency is 3 MHz.

For one sec delay, the program can be executed as given below:

Label Mnemonics Operand

MVI C, 02 H
LOOP1 CALL DELAY
DCR C • In this program the
JNZ LOOP1 subroutine program
HLT is run two times as
Subroutine Program: subroutine program
Label Mnemonics Operand in one go
DELAY LXI D, F424 H introduces a time
LOOP DCX D delay of 0.5 sec.
MOV A, E
ORA D
JNZ LOOP
RET
Write a program in assembly language using instructions 8085 to find the smaller of two
numbers stored in memory locations 2501 H and 2502 H. Store the result in 2503 H
memory location.
Write a program in assembly language using instructions of 8085 to add two hexadecimal
numbers stored in memory locations 2501 H and 2502 H. The answer should be stored in
2503 H memory location. The carry if any should be stored in 2504 H memory location.
Write a program in assembly language for SAP-III computers to find the sum of a series
1+2+3+……+10 (or sum of first 10 natural numbers).
Write a program using SAP-III instructions to check the even parity or the odd parity of the
number stored in memory location 2010 H. Send 00 H or EE H at the output port 02 H if the
parity is odd or even respectively.
Label Mnemonics Operand Comments
LXI H, 2010 H ;Initializes the H-L register pair with the
address of the location.
MOV A, M ;Moves the number to accumulator.
ORA A ;ORing of A with A will load the same
number to accumulator. The parity flag
will be affected with this operation.
JPO ODD ;Jump to ODD if parity is odd.
MVI A, EE H ;Load EE H to accumulator for even
parity.
OUT 02 H ;EE is sent to output port 02H.
JMP END ;Jump to end.
ODD MVI A, 00 H ;Load 00 H to accumulator for odd
parity.
OUT 02 H ;00 is sent to output port 02H.
END HLT
Write an assembly language program of 8085 to find 1’s complement of n (decimal number)
bytes of data stored in memory location starting at 2501 H. The number n (decimal number)
is stored in memory location 2500 H. Store the result in memory locations starting at 2601
H.
Label Mnemonics Operand Comments
Write an assembly language program of 8085 to find 2’s complement of a 16 bit number stored
in memory locations 2101 H and 2102 H. The least significant byte is in 2101 H. The result is to
be stored in memory locations 2103 H and 2104 H.
Write an assembly language program of 8085 to find 2’s complement of N bytes ( N ≥ 2 ).
The number of bytes N in hexadecimal is stored in 2100 H. The bytes are stored in memory
locations starting at 2101 H. The least significant byte is in 2101 H. The result is to be
stored in memory locations starting at 2201 H.
16 data bytes are stored in memory locations 2001 H to 2010 H. Write an assembly
language program of 8085 to transfer this block of data bytes to memory locations 2501 to
2510 H in the reverse order (i.e. the data of 2001 is to transferred to 2510 H and data of
2002 H to 250F H and so on).
Write an ALP for 8085 to find the Fibonacci series. Sixteen terms of this series are to be
store in the memory locations starting at 2101 H. Let 00 H and 01 H data are stored in
memory locations 2101 H and 2102 H respectively before the execution of the program
The terms of Fibonacci series are given as:
1, 1, 2, 3, 5, 8, 13, 21,. . . . .
Write an ALP for 8085 to find the square root of a given number (perfect positive square)
stored in memory location 2101 H and the result is to be stored in memory location 2102 H.
Use the subtraction of successive odd integers.