Coa Solution
Coa Solution
Section B
a. Evaluate the arithmetic statement X= (A+B) * (C+D) using a general register computer with
three address, two address and one address instruction format a program to evaluate the
expression?
b. Perform the division process of 00001111 by 0011 (use a dividend of 8 bits )
c. A two way set associative cache memory uses blocks of 4 words. The cache can accommodate
a total of 2048 words from memory. The main memory size is 128K x 32.
I) Formulate all pertinent information required to construct the cache memory?
II) What is the size of Cache Memory?
d. What is associative memory? Explain with the help of a block diagram. Also mention the
situation in which associative memory can be effective utilized?
Answer: - Associative Memory: - A memory unit accessed by content is called is called an
associative memory or content addressable memory (CAM)
The block diagram of an associative memory is displayed in Figure below.
Key register offers a mask for choosing a specific key or field in argument word. The complete
argument is compared with every memory word if key register contains all 1s. Or else only those bits in
argument which have 1s in their corresponding positions of key register are compared. So the key
offers a mask or identifying information that specifies how reference to memory is made.
To explain with a numerical illustration assume that argument register A and key register K have the bit
configuration displayed below. Only three leftmost bits of a compared with memory words since K has
1's on these positions.
e. A Computer uses a memory unit with 256K words of 32bits each. A binary instruction code is
stored in one word of memory. The instruction has four parts:
An indirect bit, an operation code, a register code part to specify one of 64 registers and an
address part
(i) How many bits are there in the operation code, the register code part and the address
part?
(ii) Draw the instruction word format and indicate the number of bits in each part?
(iii) How many bits are there in the data and address inputs of the memory?