Adc 0808
Adc 0808
The ADC0808, ADC0809 data acquisition component is a monolithic CMOS device with an 8-
bit analog-to-digital converter, 8-channel multiplexer and microprocessor compatible control
logic. The 8-bit A/D converter uses successive approximation as the conversion technique. The
converter features a high impedance chopper stabilized comparator, a 256R voltage divider with
analog switch tree and a successive approximation register. The 8-channel multiplexer can
directly access any of 8-single-ended analog signals.
Features
Key Specifications
Resolution 8 Bits
Total Unadjusted Error ±1⁄2 LSB and ±1 LSB
Single Supply 5 VDC
Low Power 15 mW
Conversion Time 100 μs
Functional Description
Multiplexer. The device contains an 8-channel single-ended analog signal multiplexer. A
particular input channel is selected by using the address decoder. The below table shows the
input states for the address lines to select any channel. The address is latched into the decoder on
the low-to-high transition of the address latch enable signal.
CONVERTER CHARACTERISTICS
The Converter
The heart of this single chip data acquisition system is its 8-bit analog-to-digital converter. The
converter is designed to give fast, accurate, and repeatable conversions over a wide range of
temperatures. The converter is partitioned into 3 major sections: the 256R ladder network, the
successive approximation register, and the comparator. The converter’s digital outputs are
positive true. The 256R ladder network approach (Figure 1) was chosen over the conventional
R/2R ladder because of its inherent monotonicity, which guarantees no missing digital codes.
Monotonicity is particularly important in closed loop feedback control systems. A non-
monotonic relationship can cause oscillations that will be catastrophic for the system.
Additionally, the 256R network does not cause load variations on the reference voltage.
The A/D converter’s successive approximation register (SAR) is reset on the positive edge of the
start conversion (SC) pulse. The conversion is begun on the falling edge of the start conversion
pulse. A conversion in process will be interrupted by receipt of a new start conversion pulse.
Continuous conversion may be accomplished by tying the end of conversion (EOC) output to the
SC input. If used in this mode, an external start conversion pulse should be applied after power
up. End-of-conversion will go low between 0 and 8 clock pulses after the rising edge of start
conversion. The most important section of the A/D converter is the comparator. It is this section
which is responsible for the ultimate accuracy of the entire converter. It is also the comparator
drift which has the greatest influence on the repeatability of the device. A chopper-stabilized
comparator provides the most effective method of satisfying all the converter requirements.
I/O Pins
Address Latch Enable ALE: The address is latched on the Low – High transition of ALE.
START: The ADC’s Successive Approximation Register (SAR) is reset on the positive edge i.e.
Low- High of the Start Conversion pulse. Whereas the conversion is begun on the falling edge
i.e. high – Low of the pulse.
Output Enable: Whenever data has to be read from the ADC, Output Enable pin has to be
pulled high thus enabling the TRI-STATE outputs, allowing data to be read from the data pins
D0-D7.
End of Conversion (EOC): This Pin becomes high when the conversion has ended, so the
controller comes to know that the data can now be read from the data pins.
Clock: External clock pulses are to be given to the ADC; this can be given either from LM 555
in Astable mode or the controller can also be used to give the pulses.
Algorithm
1. Start.
2. Select the channel.
3. A Low – High transition on ALE to latch in the address.
4. A Low – High transition on Start to reset the ADC’s SAR.
5. A High – Low transition on ALE.
6. A High – Low transition on start to start the conversion.
7. Wait for End of cycle (EOC) pin to become high.
8. Make Output Enable pin High.
9. Take Data from the ADC’s output
10. Make Output Enable pin Low.
11. Stop
The clock can also be provided through the controller thus eliminating the need of external
circuit for clock.
Suppose Vref+ is connected to Vcc i.e. 5V & Vref- is connected to the ground, then the step size will
be
Step size= (5 - 0)/256= 19.53 mv.
Calculating Dout
The data we get at the D0 - D7 depends upon the step size & the Input voltage i.e. Vin.
Dout = Vin /step Size.
ADC interface with the Microcontroller
The address and data pins of ADC can be connected to any of the ports of 8051