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8048 MC

The document discusses the memory architecture and instruction set of an 8-bit microcontroller. It describes the separation of program memory from data and stack memory. Program memory is up to 4KB consisting of on-chip and external memory. Data memory includes 64B of on-chip RAM and up to 256B of external RAM, including memory used for registers and an 8-level deep stack. The microcontroller has two interrupts, 27 I/O lines, and instructions for arithmetic, logic, branching, and I/O operations using various addressing modes.

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0% found this document useful (0 votes)
120 views4 pages

8048 MC

The document discusses the memory architecture and instruction set of an 8-bit microcontroller. It describes the separation of program memory from data and stack memory. Program memory is up to 4KB consisting of on-chip and external memory. Data memory includes 64B of on-chip RAM and up to 256B of external RAM, including memory used for registers and an 8-level deep stack. The microcontroller has two interrupts, 27 I/O lines, and instructions for arithmetic, logic, branching, and I/O operations using various addressing modes.

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goutt
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Data memory and stack memory occupy the same memory space.

Program memory is separate


from data and stack memory.

Program memory consists of 1 KB on-chip masked ROM and up to 3 KB of external program


memory. It is possible to disable on-chip memory and use up to 4 KB of external memory. In any
case the total size of supported program memory is 4 KB. Conditional branch and unconditional
indirect jump instructions can be used to jump within current 256-byte program memory page.
Unconditional jump and call instructions are used to address within current 2 KB program
memory block. Due to the way how the program counter register is incremented (see "Registers"
below), going from the first 2 KB program memory block to the second 2 KB block, or vice
versa, should be programmed as SEL MB0 (or SEL MB1) followed by JMP or CALL
instruction.

Data memory consists of 64 bytes of on-chip RAM and up to 256 bytes of external RAM:

 16 bytes of on-chip RAM are used for 2 banks of working registers, located at addresses
00h - 07h (bank 0) and 18h - 1Fh (bank 1). This memory can be accessed by the
microcontroller directly.
 Up to 16 bytes of on-chip RAM at addresses 08h - 17h are used as stack memory.
 The rest of the on-chip RAM can be accessed only indirectly.
 Up to 256 bytes of external memory can be accessed using MOVX instruction.

Stack is stored in data memory locations 08h - 17h (8 - 23) and can be 8-levels deep. The stack
starts at location 08h and grows upwards. When a CALL instruction is executed the return
address (12 bits) and the upper 4 bits of the program status word (CY, AC, F0 and BS flags) are
stored in the stack. If the user program does not use all stack levels then part of the stack memory
(2 bytes per stack level) can be reused for data storage.

Reserved locations:

 0000h - the MCU starts executing instructions at this address after RESET.
 0003h - the MCU jumps to this address when an external interrupt occurs.
 0007h - the MCU jumps to this address when a timer/counter interrupt occurs.

Interrupts
The processor has two maskable interrupts:

INT external interrupt. When the interrupt occurs the microcontroller disables further interrupts,
saves the program counter and part of the program status word into stack, and jumps to address
0003h. This address usually contains a jump instruction to interrupt processing routine. To return
from the interrupt the routine should use RETR instruction. If necessary, the interrupt can be
enabled or disabled using EN I or DIS I instructions. When interrupt is disabled it is possible to
check if there is a pending interrupt using JNI instruction.
Timer/counter interrupt. This interrupt occurs when the counter overflows, i.e. when it has the
value FFh and it's incremented. When the interrupt occurs the microcontroller disables further
interrupts, saves the program counter and part of the program status word into stack, and jumps
to address 0007h. This address usually contains a jump instruction to interrupt processing
routine. To return from the interrupt the routine should use RETR instruction. If necessary, the
interrupt can be enabled or disabled using EN TCNTI or DIS TCNTI instructions. The
timer/counter interrupt has lower priority than the external INT interrupt - when both of them
occur at the same time the MCU calls the INT interrupt processing routine.

I/O ports
27 I/O lines:

 8-bit quasi-bidirectional ports 1 and 2.


 8-bit bidirectional BUS port.
 3 TEST inputs (T0, T1 and INT) that can be tested by conditional JT/JNT instructions.

Registers
Program counter (12-bit). The most significant bit of the program counter is not updated when
the program counter is incremented. To tell the MCU to set/reset this bit the program should use
SEL MB1 or SEL MB0 instructions. The bit value specified by the SEL MB instruction will be
set when the next unconditional JMP or CALL instruction is executed.

Accumulator is used for data moving, arithmetic, logic and I/O operations.

Working registers are used for temporary data storage. These registers can be addressed directly
by many instructions. There are two sets of working registers - bank 0 and bank 1, each bank has
8 working registers. First two registers in each bank are RAM pointer registers (see below).
Working registers are located in RAM, their addresses are 00h - 07h for register bank 0, and 18h
- 1Fh for register bank 1. To switch between different banks of working registers use SEL RB
instruction.

RAM pointer registers are used by many instructions to address RAM indirectly. These registers
are located in RAM. Their addresses are 00h and 01h for register bank 0, and 18h and 19h for
register bank 1.

Program status word consists of the following bits:

 Carry (CY) - set to 1 if there was a carry from the most significant bit during last ADD
operation.
 Auxiliary carry (AC) - set by last ADD instruction.
 Flag 0 (F0) - user flag. This flag can be set/reset by user program, and can be tested using
JF0 instruction. The MCU also has flag 1 that can be set/reset/tested similar to flag 0, but
the flag 1 is not a part of program status word register.
 Register bank select (BS) - set to 0 to use the bank 0 (RAM locations 00h - 07h), set to 1
for the bank 1 (RAM locations 18h - 1Fh).
 Stack pointer (3 bits) - specifies RAM location where return pointer and partial program
status word will be saved after next CALL instruction. The stack pointer address is
calculated as: <stack pointer> * 2 + 8.

Instruction Set
8048 instruction set consists of the following instructions:

 Data moving instructions.


 Arithmetic - add, increment and decrement. There are no subtract and compare
instructions.
 Logic - rotate, AND, OR, exclusive OR, NOT and bit test.
 Control transfer - conditional branch (limited to current 256-byte page) and unconditional
jumps and calls (limited to current 2 KB memory block).
 Input/Output instructions - input, output and logic operations with port data.
 Timer/counter related instructions - start, stop and read value of the timer/counter.
 Other - flag operations, decimal adjust, nibble swap, memory bank selection,
enable/disable interrupts, etc.

Instruction length can be one or two bytes.

Addressing modes
Implied - the data value/data address is implicitly associated with the instruction.

Accumulator - the instruction implies that the accumulator contains the data.

Register - references data in one of 8 working registers in the currently selected data memory
bank.

Immediate - 8-bit data is provided in the instruction.

Absolute - the instruction operand specifies the memory address where control is transferred.
The instruction may have 8-bit or 11-bit operand:
 8-bit operands are used to transfer control within current 256-byte program memory
page.
 11-bit operands are used to transfer control within current 2 KB program memory block.

Register indirect - instruction specifies RAM pointer register that contains RAM address, where
data is located.

Accumulator indirect - the accumulator contains a program memory address within current
256-byte program memory page where the program control will be transferred.

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