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This document provides a diagram and labeling of the pin connections on an STM32F107VCT6 microcontroller. It shows the pin assignments for various peripherals including USB, USART, SPI, I2S, CAN, Ethernet, LCD, and debugging interfaces. The pins are grouped by their locations on the microcontroller package with labels indicating the alternate functions for each pin.

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100% found this document useful (1 vote)
89 views1 page

2 - Mcu

This document provides a diagram and labeling of the pin connections on an STM32F107VCT6 microcontroller. It shows the pin assignments for various peripherals including USB, USART, SPI, I2S, CAN, Ethernet, LCD, and debugging interfaces. The pins are grouped by their locations on the microcontroller package with labels indicating the alternate functions for each pin.

Uploaded by

Hung
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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5 4 3 2 1

JP2
1
[7] WAKEUP
2
3
[6] MII_CRS
1 2 U1 STM32F107VCT6
[3] SD_CS
JP9 MII_CRS 23 81 CAN1_RX
D [6] PA0 PA0/WKUP/USART2_CTS/ADC12_IN0/TIME_CH1_ETR/TIM5_CH1/ETH_MII_CRS_WKUP PD0 PD0 [4] D
RMII_REF_CLK 24 82 CAN1_TX
[6] PA1 PA1/USART2_RTS/ADC12_IN1/TIM5_CH2/TIM2_CH2/ETH_MII_RX_CLK/ETH_RMII_REF_CLK PD1 PD1 [4]
1 2 MII_MDIO 25 83 LED1
[3] SPI1_SCK [6] PA2 PA2/USART2_TX/TIM5_CH3/ADC12_IN2/TIM2_CH3/ETH_MDIO PD2/TIM3_ETR/USART5_RX PD2 [7]
JP10 MII_COL 26 84 LED2
[6] PA3 PA3/USART2_RX/TIM5_CH4/ADC12_IN3/TIM2_CH4/ETH_MII_COL PD3 PD3 [7]
DAC_OUT1 29 85 LED3
[7] PA4 PA4/SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4 PD4 PD4 [7]
DAC_OUT2 30 86 UART2_TX
[7] PA5 PA5/SPI1_SCK/DAC_OUT2/ADC12_IN5 PD5 PD5 [4]
JP3 SPI1_MISO 31 87 UART2_RX
[3] PA6 PA6/SPI1_MISO/ADC12_IN6/TIM3_CH1 PD6 PD6 [4]
1 SPI1_MOSI 32 88 LED4
[4] USB_VBUS [3] PA7 PA7/SPI1_MOSI/ADC12_IN7/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV PD7 PD7 [7]
2
3 MCO 67 55 MII_RX_DV/RMII_CRSDV
[4] USART1_TX [6] PA8 PA8/USART1_CK/OTG_FS_SOF/TIM1_CH1/MCO PD8 PD8 [6]
68 56 MII_RXD0
[] PA9 PA9/USART1_TX/TIM1_CH2/OTG_FS_VBUS PD9 PD9 [6]
JP5 69 57 MII_RXD1
[] PA10 PA10/USART1_RX/TIM1_CH3/OTG_FS_ID PD10 PD10 [6]
1 USB_DM 70 58 MII_RXD2
[4] USB_ID [4] PA11 PA11/USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM PD11 PD11 [6]
2 USB_DP 71 59 MII_RXD3
[4] PA12 PA12/USART1_RTS/OTG_FS_DP/CAN1_TX/TIM1_ETR PD12 PD12 [6]
3 TMS/SWDIO 72 60 LCD_RS
[4] USART1_RX [5] PA13 PA13/JTMS/SWDIO PD13 PD13 [7]
TCK/SWCLK 76 61 LCD_WR
[5] PA14 PA14/JTCK/SWCLK PD14 PD14 [7]
JP13 TDI 77 62 LCD_RD
[5] PA15 PA15/JTDI/SPI3_NSS/I2S3_WS PD15 PD15 [7]
1
3V3
2 R1 10K ADC_IN1 35 97 DB00
[7] PB0 PB0/ADC12_IN8/TIM3_CH3/ETH_MII_RXD2 PE0/TIM4_ETR PE0 [7]
3 ADC_IN2 36 98 DB01
GND [7] PB1 PB1/ADC12_IN9/TIM3_CH4/ETH_MII_RXD3 PE1 PE1 [7]
37 1 DB02
[] PB2 PB2/BOOT1 PE2/TRACECK PE2 [7]
TDO/SWO 89 2 DB03
[5] PB3 PB3/JTDO/SPI3_SCK/I2S3_CK PE3/TRACED0 PE3 [7]
TRST 90 3 DB04
[7] DATA_LE [5] PB4 PB4/NJTRST/SPI3_MISO PE4/TRACED1 PE4 [7]
R2 0R CAN2_RX 91 4 DB05
[4] PB5 PB5/I2C1_SMBA/SPI3_MOSI/ETH_PPS_OUT/I2S3_SD PE5/TRACED2 PE5 [7]
CAN2_TX 92 5 DB06
C [4] PB6 PB6/I2C1_SCL/TIM4_CH1 PE6/TRACED3 PE6 [7] C
I2C1_SDA 93 38 DB07
[] PB7 PB7/I2C1_SDA/TIM4_CH2 PE7 PE7 [7]
1 2
[3] I2C1_SCL
JP11
[6] PB8
MII_TXD3 95
96 PB8/TIM4_CH3/ETH_MII_TXD3
STM32F107VT6 PE8
39
40
DB08
DB09 PE8 [7]
[3] I2C1_SDA [] PB9 PB9/TIM4_CH4 PE9 PE9 [7]
MII_RX_ER 47 41 DB10
[6] PB10 PB10/I2C2_SCL/USART3_TX/ETH_MII_RX_ER PE10 PE10 [7]
MII_TX_EN 48 42 DB11
[3] F_CS [6] PB11 PB11/I2C2_SDA/USART3_RX/ETH_MII_TX_EN/ETH_RMII_TX_EN PE11 PE11 [7]
MII_TXD0 51 43 DB12
[6] PB12 PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/ETH_MII_TXD0/ETH_RMII_TXD0 PE12 PE12 [7]
MII_TXD1 52 44 DB13
[3] SD_CD [6] PB13 PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/ETH_MII_TXD1/ETH_RMII_TXD1 PE13 PE13 [7]
53 45 DB14
[] PB14 PB14/SPI2_MISO/TIM1_CH2N/USART3_RTS PE14 PE14 [7]
54 46 DB15
[] PB15 PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N PE15 PE15 [7]
[4] USB_PowerON
15 73
[] PC0 PC0/ADC12_IN10 NC
MII_MDC 16 C1 22p
[7] Potentio_meter [6] PC1 PC1/ADC12_IN11/ETH_MDC
JP6 MII_TXD2 17 12
[6] PC2 PC2/ADC12_IN12/ETH_MII_TXD2 OSC_IN 3V3
1 MII_TX_CLK 18
[7] TP_INT [6] PC3 PC3/ADC12_IN13/ETH_MII_TX_CLK
2 SD_PWR 33 Y1 JP15
[3] PC4 PC4/ADC12_IN14/ETH_MII_RXD0/ETH_RMII_RXD0 GND
3 34 25M C2 22p 1
[6] MII_INT [] PC5 PC5/ADC12_IN15/ETH_MII_RXD1/ETH_RMII_RXD1
63 13 2
[] PC6 PC6/I2S2_MCK OSC_OUT
64 3
[] PC7 PC7/I2S3_MCK GND
94 R3 10K
3V3 BOOT0
65
[] PC8 PC8
R4
R5
R6
R7

66 D1 4148
[] PC9 PC9 BootLoder_BOOT0 [4]
SPI3_CLK 78
[7] PC10 PC10/USART4_TX
B SPI3_MISO 79 14 D2 4148 B
[7] PC11 PC11/USART4_RX NRST BootLoader_RESET [4]
SPI3_MOSI 80
[7] PC12 PC12/USART5_TX
10K
10K
10K
10K

TAMPER 7 6
[7] PC13 PC13-TAMPER-RTC VBAT VBAT RESET [3, 5, 6]
R8 0R 8
[7] TP_CS [] PC14 PC14-OSC32_IN
R9 0R 9 49
[7] SD_CS1 [] PC15 PC15-OSC32_OUT VSS_1
R10 0R 74 R11 10K
[7] LCD_CS VSS_2 3V3
R12 0R 50 99
[7] F_CS1 VDD_1 VSS_3 GND
75 27
100 VDD_2 VSS_4 10 C3 S1
3V3 VDD_3 VSS_5
28 RESET
11 VDD_4 19 100n
VDD_5 VSS_A GNDA
22
VDDA VDDA
21 20
VREF+ VREF+ VREF- VREF-

[] PC14
GND
[] PC15 3V3 VBAT
32.768K
Y2
3V3 VDDA VREF+ 3V3
D3
C4 C5 L1 10uH L2 10uH
4148
10p 10p C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 R13 10K
A A
100n 10u 100n 10u 100n 100n 100n 100n 100n 10u 10u
GND GND L3 10uH L4 10uH
+ C17
Created 2012 @ Thegioiic.com
GND GNDA VREF- GND 0.01F Title
TSVN107

Size Document Number Rev


GND B <Doc> A

Date: Monday, June 04, 2012 Sheet 2 of 8


5 4 3 2 1

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